Trait lpc55_hal::typestates::pin::flexcomm::SpiCsPin [−][src]
pub trait SpiCsPin<PIO, SPI> where
PIO: PinId,
SPI: Spi, { const CS: ChipSelect; }
SPI chip select
pub trait SpiCsPin<PIO, SPI> where
PIO: PinId,
SPI: Spi, { const CS: ChipSelect; }
SPI chip select
const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi0<Enabled<()>>> for Pin<PIO, Special<FC0_CTS_SDA_SSEL0>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi0<Enabled<()>>> for Pin<PIO, Special<FC0_RTS_SCL_SSEL1>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi1<Enabled<()>>> for Pin<PIO, Special<FC1_CTS_SDA_SSEL0>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi1<Enabled<()>>> for Pin<PIO, Special<FC1_RTS_SCL_SSEL1>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi2<Enabled<()>>> for Pin<PIO, Special<FC2_CTS_SDA_SSEL0>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi2<Enabled<()>>> for Pin<PIO, Special<FC2_RTS_SCL_SSEL1>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi3<Enabled<()>>> for Pin<PIO, Special<FC3_CTS_SDA_SSEL0>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi3<Enabled<()>>> for Pin<PIO, Special<FC3_RTS_SCL_SSEL1>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi3<Enabled<()>>> for Pin<PIO, Special<FC3_SSEL2>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi3<Enabled<()>>> for Pin<PIO, Special<FC3_SSEL3>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi4<Enabled<()>>> for Pin<PIO, Special<FC4_CTS_SDA_SSEL0>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi4<Enabled<()>>> for Pin<PIO, Special<FC4_RTS_SCL_SSEL1>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi4<Enabled<()>>> for Pin<PIO, Special<FC4_SSEL2>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi4<Enabled<()>>> for Pin<PIO, Special<FC4_SSEL3>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi5<Enabled<()>>> for Pin<PIO, Special<FC5_CTS_SDA_SSEL0>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi5<Enabled<()>>> for Pin<PIO, Special<FC5_RTS_SCL_SSEL1>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi6<Enabled<()>>> for Pin<PIO, Special<FC6_CTS_SDA_SSEL0>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi6<Enabled<()>>> for Pin<PIO, Special<FC6_RTS_SCL_SSEL1>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi7<Enabled<()>>> for Pin<PIO, Special<FC7_CTS_SDA_SSEL0>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi7<Enabled<()>>> for Pin<PIO, Special<FC7_RTS_SCL_SSEL1>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi8<Enabled<()>>> for Pin<PIO, Special<HS_SPI_SSEL0>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi8<Enabled<()>>> for Pin<PIO, Special<HS_SPI_SSEL1>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi8<Enabled<()>>> for Pin<PIO, Special<HS_SPI_SSEL2>>
[src]const CS: ChipSelect
[src]impl<PIO: PinId> SpiCsPin<PIO, Spi8<Enabled<()>>> for Pin<PIO, Special<HS_SPI_SSEL3>>
[src]const CS: ChipSelect
[src]impl<SPI: Spi> SpiCsPin<NoPio, SPI> for NoCs
[src]const CS: ChipSelect
[src]