[][src]Type Definition lpc54606_pac::syscon::CAN0CLKDIV

type CAN0CLKDIV = Reg<u32, _CAN0CLKDIV>;

MCAN0 clock divider

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see can0clkdiv module

Trait Implementations

impl Readable for CAN0CLKDIV[src]

read() method returns can0clkdiv::R reader structure

impl ResetValue for CAN0CLKDIV[src]

Register CAN0CLKDIV reset()'s with value 0x4000_0000

type Type = u32

Register size

impl Writable for CAN0CLKDIV[src]

write(|w| ..) method takes can0clkdiv::W writer structure