1#[doc = "Reader of register LSR"]
2pub type R = crate::R<u32, super::LSR>;
3#[doc = "Reader of field `IMP`"]
4pub type IMP_R = crate::R<bool, bool>;
5#[doc = "Lock Status. This bit is HIGH when the device is locked, and LOW when unlocked.\n\nValue on reset: 0"]
6#[derive(Clone, Copy, Debug, PartialEq)]
7pub enum STATUS_A {
8 #[doc = "0: Access permitted."]
9 STATUS_0 = 0,
10 #[doc = "1: Write access to the component is blocked. All writes to control registers are ignored. Reads are permitted."]
11 STATUS_1 = 1,
12}
13impl From<STATUS_A> for bool {
14 #[inline(always)]
15 fn from(variant: STATUS_A) -> Self {
16 variant as u8 != 0
17 }
18}
19#[doc = "Reader of field `STATUS`"]
20pub type STATUS_R = crate::R<bool, STATUS_A>;
21impl STATUS_R {
22 #[doc = r"Get enumerated values variant"]
23 #[inline(always)]
24 pub fn variant(&self) -> STATUS_A {
25 match self.bits {
26 false => STATUS_A::STATUS_0,
27 true => STATUS_A::STATUS_1,
28 }
29 }
30 #[doc = "Checks if the value of the field is `STATUS_0`"]
31 #[inline(always)]
32 pub fn is_status_0(&self) -> bool {
33 *self == STATUS_A::STATUS_0
34 }
35 #[doc = "Checks if the value of the field is `STATUS_1`"]
36 #[inline(always)]
37 pub fn is_status_1(&self) -> bool {
38 *self == STATUS_A::STATUS_1
39 }
40}
41#[doc = "Reader of field `s8BIT`"]
42pub type S8BIT_R = crate::R<bool, bool>;
43impl R {
44 #[doc = "Bit 0 - Lock mechanism is implemented. This bit always reads 1."]
45 #[inline(always)]
46 pub fn imp(&self) -> IMP_R {
47 IMP_R::new((self.bits & 0x01) != 0)
48 }
49 #[doc = "Bit 1 - Lock Status. This bit is HIGH when the device is locked, and LOW when unlocked."]
50 #[inline(always)]
51 pub fn status(&self) -> STATUS_R {
52 STATUS_R::new(((self.bits >> 1) & 0x01) != 0)
53 }
54 #[doc = "Bit 2 - Access Lock Register size. This bit reads 0 to indicate a 32-bit register is present."]
55 #[inline(always)]
56 pub fn s8bit(&self) -> S8BIT_R {
57 S8BIT_R::new(((self.bits >> 2) & 0x01) != 0)
58 }
59}