lpc54606_pac/can0/
rxf1c.rs

1#[doc = "Reader of register RXF1C"]
2pub type R = crate::R<u32, super::RXF1C>;
3#[doc = "Writer for register RXF1C"]
4pub type W = crate::W<u32, super::RXF1C>;
5#[doc = "Register RXF1C `reset()`'s with value 0"]
6impl crate::ResetValue for super::RXF1C {
7    type Type = u32;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `F1SA`"]
14pub type F1SA_R = crate::R<u16, u16>;
15#[doc = "Write proxy for field `F1SA`"]
16pub struct F1SA_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> F1SA_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u16) -> &'a mut W {
23        self.w.bits = (self.w.bits & !(0x3fff << 2)) | (((value as u32) & 0x3fff) << 2);
24        self.w
25    }
26}
27#[doc = "Reader of field `F1S`"]
28pub type F1S_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `F1S`"]
30pub struct F1S_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> F1S_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x7f << 16)) | (((value as u32) & 0x7f) << 16);
38        self.w
39    }
40}
41#[doc = "Reader of field `F1WM`"]
42pub type F1WM_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `F1WM`"]
44pub struct F1WM_W<'a> {
45    w: &'a mut W,
46}
47impl<'a> F1WM_W<'a> {
48    #[doc = r"Writes raw bits to the field"]
49    #[inline(always)]
50    pub unsafe fn bits(self, value: u8) -> &'a mut W {
51        self.w.bits = (self.w.bits & !(0x7f << 24)) | (((value as u32) & 0x7f) << 24);
52        self.w
53    }
54}
55#[doc = "Reader of field `F1OM`"]
56pub type F1OM_R = crate::R<bool, bool>;
57#[doc = "Write proxy for field `F1OM`"]
58pub struct F1OM_W<'a> {
59    w: &'a mut W,
60}
61impl<'a> F1OM_W<'a> {
62    #[doc = r"Sets the field bit"]
63    #[inline(always)]
64    pub fn set_bit(self) -> &'a mut W {
65        self.bit(true)
66    }
67    #[doc = r"Clears the field bit"]
68    #[inline(always)]
69    pub fn clear_bit(self) -> &'a mut W {
70        self.bit(false)
71    }
72    #[doc = r"Writes raw bits to the field"]
73    #[inline(always)]
74    pub fn bit(self, value: bool) -> &'a mut W {
75        self.w.bits = (self.w.bits & !(0x01 << 31)) | (((value as u32) & 0x01) << 31);
76        self.w
77    }
78}
79impl R {
80    #[doc = "Bits 2:15 - Rx FIFO 1 start address."]
81    #[inline(always)]
82    pub fn f1sa(&self) -> F1SA_R {
83        F1SA_R::new(((self.bits >> 2) & 0x3fff) as u16)
84    }
85    #[doc = "Bits 16:22 - Rx FIFO 1 size 0 = No Rx FIFO 1."]
86    #[inline(always)]
87    pub fn f1s(&self) -> F1S_R {
88        F1S_R::new(((self.bits >> 16) & 0x7f) as u8)
89    }
90    #[doc = "Bits 24:30 - Rx FIFO 1 watermark 0 = Watermark interrupt disabled."]
91    #[inline(always)]
92    pub fn f1wm(&self) -> F1WM_R {
93        F1WM_R::new(((self.bits >> 24) & 0x7f) as u8)
94    }
95    #[doc = "Bit 31 - FIFO 1 operation mode."]
96    #[inline(always)]
97    pub fn f1om(&self) -> F1OM_R {
98        F1OM_R::new(((self.bits >> 31) & 0x01) != 0)
99    }
100}
101impl W {
102    #[doc = "Bits 2:15 - Rx FIFO 1 start address."]
103    #[inline(always)]
104    pub fn f1sa(&mut self) -> F1SA_W {
105        F1SA_W { w: self }
106    }
107    #[doc = "Bits 16:22 - Rx FIFO 1 size 0 = No Rx FIFO 1."]
108    #[inline(always)]
109    pub fn f1s(&mut self) -> F1S_W {
110        F1S_W { w: self }
111    }
112    #[doc = "Bits 24:30 - Rx FIFO 1 watermark 0 = Watermark interrupt disabled."]
113    #[inline(always)]
114    pub fn f1wm(&mut self) -> F1WM_W {
115        F1WM_W { w: self }
116    }
117    #[doc = "Bit 31 - FIFO 1 operation mode."]
118    #[inline(always)]
119    pub fn f1om(&mut self) -> F1OM_W {
120        F1OM_W { w: self }
121    }
122}
lpc54606_pac/can0/rxf1c.rs

lpc54606_pac/can0/
rxf1c.rs
