lpc54606_pac/crc_engine/
mode.rs1#[doc = "Reader of register MODE"]
2pub type R = crate::R<u32, super::MODE>;
3#[doc = "Writer for register MODE"]
4pub type W = crate::W<u32, super::MODE>;
5#[doc = "Register MODE `reset()`'s with value 0"]
6impl crate::ResetValue for super::MODE {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `CRC_POLY`"]
14pub type CRC_POLY_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `CRC_POLY`"]
16pub struct CRC_POLY_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> CRC_POLY_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u8) -> &'a mut W {
23 self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
24 self.w
25 }
26}
27#[doc = "Reader of field `BIT_RVS_WR`"]
28pub type BIT_RVS_WR_R = crate::R<bool, bool>;
29#[doc = "Write proxy for field `BIT_RVS_WR`"]
30pub struct BIT_RVS_WR_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> BIT_RVS_WR_W<'a> {
34 #[doc = r"Sets the field bit"]
35 #[inline(always)]
36 pub fn set_bit(self) -> &'a mut W {
37 self.bit(true)
38 }
39 #[doc = r"Clears the field bit"]
40 #[inline(always)]
41 pub fn clear_bit(self) -> &'a mut W {
42 self.bit(false)
43 }
44 #[doc = r"Writes raw bits to the field"]
45 #[inline(always)]
46 pub fn bit(self, value: bool) -> &'a mut W {
47 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
48 self.w
49 }
50}
51#[doc = "Reader of field `CMPL_WR`"]
52pub type CMPL_WR_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `CMPL_WR`"]
54pub struct CMPL_WR_W<'a> {
55 w: &'a mut W,
56}
57impl<'a> CMPL_WR_W<'a> {
58 #[doc = r"Sets the field bit"]
59 #[inline(always)]
60 pub fn set_bit(self) -> &'a mut W {
61 self.bit(true)
62 }
63 #[doc = r"Clears the field bit"]
64 #[inline(always)]
65 pub fn clear_bit(self) -> &'a mut W {
66 self.bit(false)
67 }
68 #[doc = r"Writes raw bits to the field"]
69 #[inline(always)]
70 pub fn bit(self, value: bool) -> &'a mut W {
71 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
72 self.w
73 }
74}
75#[doc = "Reader of field `BIT_RVS_SUM`"]
76pub type BIT_RVS_SUM_R = crate::R<bool, bool>;
77#[doc = "Write proxy for field `BIT_RVS_SUM`"]
78pub struct BIT_RVS_SUM_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> BIT_RVS_SUM_W<'a> {
82 #[doc = r"Sets the field bit"]
83 #[inline(always)]
84 pub fn set_bit(self) -> &'a mut W {
85 self.bit(true)
86 }
87 #[doc = r"Clears the field bit"]
88 #[inline(always)]
89 pub fn clear_bit(self) -> &'a mut W {
90 self.bit(false)
91 }
92 #[doc = r"Writes raw bits to the field"]
93 #[inline(always)]
94 pub fn bit(self, value: bool) -> &'a mut W {
95 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
96 self.w
97 }
98}
99#[doc = "Reader of field `CMPL_SUM`"]
100pub type CMPL_SUM_R = crate::R<bool, bool>;
101#[doc = "Write proxy for field `CMPL_SUM`"]
102pub struct CMPL_SUM_W<'a> {
103 w: &'a mut W,
104}
105impl<'a> CMPL_SUM_W<'a> {
106 #[doc = r"Sets the field bit"]
107 #[inline(always)]
108 pub fn set_bit(self) -> &'a mut W {
109 self.bit(true)
110 }
111 #[doc = r"Clears the field bit"]
112 #[inline(always)]
113 pub fn clear_bit(self) -> &'a mut W {
114 self.bit(false)
115 }
116 #[doc = r"Writes raw bits to the field"]
117 #[inline(always)]
118 pub fn bit(self, value: bool) -> &'a mut W {
119 self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
120 self.w
121 }
122}
123impl R {
124 #[doc = "Bits 0:1 - CRC polynomial: 1X = CRC-32 polynomial 01 = CRC-16 polynomial 00 = CRC-CCITT polynomial"]
125 #[inline(always)]
126 pub fn crc_poly(&self) -> CRC_POLY_R {
127 CRC_POLY_R::new((self.bits & 0x03) as u8)
128 }
129 #[doc = "Bit 2 - Data bit order: 1 = Bit order reverse for CRC_WR_DATA (per byte) 0 = No bit order reverse for CRC_WR_DATA (per byte)"]
130 #[inline(always)]
131 pub fn bit_rvs_wr(&self) -> BIT_RVS_WR_R {
132 BIT_RVS_WR_R::new(((self.bits >> 2) & 0x01) != 0)
133 }
134 #[doc = "Bit 3 - Data complement: 1 = 1's complement for CRC_WR_DATA 0 = No 1's complement for CRC_WR_DATA"]
135 #[inline(always)]
136 pub fn cmpl_wr(&self) -> CMPL_WR_R {
137 CMPL_WR_R::new(((self.bits >> 3) & 0x01) != 0)
138 }
139 #[doc = "Bit 4 - CRC sum bit order: 1 = Bit order reverse for CRC_SUM 0 = No bit order reverse for CRC_SUM"]
140 #[inline(always)]
141 pub fn bit_rvs_sum(&self) -> BIT_RVS_SUM_R {
142 BIT_RVS_SUM_R::new(((self.bits >> 4) & 0x01) != 0)
143 }
144 #[doc = "Bit 5 - CRC sum complement: 1 = 1's complement for CRC_SUM 0 = No 1's complement for CRC_SUM"]
145 #[inline(always)]
146 pub fn cmpl_sum(&self) -> CMPL_SUM_R {
147 CMPL_SUM_R::new(((self.bits >> 5) & 0x01) != 0)
148 }
149}
150impl W {
151 #[doc = "Bits 0:1 - CRC polynomial: 1X = CRC-32 polynomial 01 = CRC-16 polynomial 00 = CRC-CCITT polynomial"]
152 #[inline(always)]
153 pub fn crc_poly(&mut self) -> CRC_POLY_W {
154 CRC_POLY_W { w: self }
155 }
156 #[doc = "Bit 2 - Data bit order: 1 = Bit order reverse for CRC_WR_DATA (per byte) 0 = No bit order reverse for CRC_WR_DATA (per byte)"]
157 #[inline(always)]
158 pub fn bit_rvs_wr(&mut self) -> BIT_RVS_WR_W {
159 BIT_RVS_WR_W { w: self }
160 }
161 #[doc = "Bit 3 - Data complement: 1 = 1's complement for CRC_WR_DATA 0 = No 1's complement for CRC_WR_DATA"]
162 #[inline(always)]
163 pub fn cmpl_wr(&mut self) -> CMPL_WR_W {
164 CMPL_WR_W { w: self }
165 }
166 #[doc = "Bit 4 - CRC sum bit order: 1 = Bit order reverse for CRC_SUM 0 = No bit order reverse for CRC_SUM"]
167 #[inline(always)]
168 pub fn bit_rvs_sum(&mut self) -> BIT_RVS_SUM_W {
169 BIT_RVS_SUM_W { w: self }
170 }
171 #[doc = "Bit 5 - CRC sum complement: 1 = 1's complement for CRC_SUM 0 = No 1's complement for CRC_SUM"]
172 #[inline(always)]
173 pub fn cmpl_sum(&mut self) -> CMPL_SUM_W {
174 CMPL_SUM_W { w: self }
175 }
176}