Struct lpc43xx::qei::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub con: CON,
    pub stat: STAT,
    pub conf: CONF,
    pub pos: POS,
    pub maxpos: MAXPOS,
    pub cmpos0: CMPOS0,
    pub cmpos1: CMPOS1,
    pub cmpos2: CMPOS2,
    pub inxcnt: INXCNT,
    pub inxcmp0: INXCMP0,
    pub load: LOAD,
    pub time: TIME,
    pub vel: VEL,
    pub cap: CAP,
    pub velcomp: VELCOMP,
    pub filterpha: FILTERPHA,
    pub filterphb: FILTERPHB,
    pub filterinx: FILTERINX,
    pub window: WINDOW,
    pub inxcmp1: INXCMP1,
    pub inxcmp2: INXCMP2,
    pub iec: IEC,
    pub ies: IES,
    pub intstat: INTSTAT,
    pub ie: IE,
    pub clr: CLR,
    pub set: SET,
    // some fields omitted
}

Register block

Fields

con: CON

0x00 - Control register

stat: STAT

0x04 - Encoder status register

conf: CONF

0x08 - Configuration register

pos: POS

0x0c - Position register

maxpos: MAXPOS

0x10 - Maximum position register

cmpos0: CMPOS0

0x14 - position compare register 0

cmpos1: CMPOS1

0x18 - position compare register 1

cmpos2: CMPOS2

0x1c - position compare register 2

inxcnt: INXCNT

0x20 - Index count register

inxcmp0: INXCMP0

0x24 - Index compare register 0

load: LOAD

0x28 - Velocity timer reload register

time: TIME

0x2c - Velocity timer register

vel: VEL

0x30 - Velocity counter register

cap: CAP

0x34 - Velocity capture register

velcomp: VELCOMP

0x38 - Velocity compare register

filterpha: FILTERPHA

0x3c - Digital filter register on input phase A (QEI_A)

filterphb: FILTERPHB

0x40 - Digital filter register on input phase B (QEI_B)

filterinx: FILTERINX

0x44 - Digital filter register on input index (QEI_IDX)

window: WINDOW

0x48 - Index acceptance window register

inxcmp1: INXCMP1

0x4c - Index compare register 1

inxcmp2: INXCMP2

0x50 - Index compare register 2

iec: IEC

0xfd8 - Interrupt enable clear register

ies: IES

0xfdc - Interrupt enable set register

intstat: INTSTAT

0xfe0 - Interrupt status register

ie: IE

0xfe4 - Interrupt enable register

clr: CLR

0xfe8 - Interrupt status clear register

set: SET

0xfec - Interrupt status set register

Trait Implementations