Module lpc43xx::cgu::base_out_clk
[−]
[src]
Output stage 20 control register for base clock BASE_OUT_CLK
Structs
R |
Value read from the register |
W |
Value to write to the register |
_AUTOBLOCKW |
Proxy |
_CLK_SELW |
Proxy |
_PDW |
Proxy |
Enums
AUTOBLOCKR |
Possible values of the field |
AUTOBLOCKW |
Values that can be written to the field |
CLK_SELR |
Possible values of the field |
CLK_SELW |
Values that can be written to the field |
PDR |
Possible values of the field |
PDW |
Values that can be written to the field |