Struct lpc43xx::usart0::RegisterBlock
[−]
[src]
#[repr(C)]pub struct RegisterBlock { pub rbr: RBR, pub dlm: DLM, pub iir: IIR, pub lcr: LCR, pub lsr: LSR, pub scr: SCR, pub acr: ACR, pub icr: ICR, pub fdr: FDR, pub osr: OSR, pub hden: HDEN, pub scictrl: SCICTRL, pub rs485ctrl: RS485CTRL, pub rs485adrmatch: RS485ADRMATCH, pub rs485dly: RS485DLY, pub syncctrl: SYNCCTRL, pub ter: TER, // some fields omitted }
Register block
Fields
rbr: RBR
0x00 - Receiver Buffer Register. Contains the next received character to be read (DLAB = 0).
dlm: DLM
0x04 - Divisor Latch MSB. Most significant byte of the baud rate divisor value. The full divisor is used to generate a baud rate from the fractional rate divider (DLAB = 1).
iir: IIR
0x08 - Interrupt ID Register. Identifies which interrupt(s) are pending.
lcr: LCR
0x0c - Line Control Register. Contains controls for frame formatting and break generation.
lsr: LSR
0x14 - Line Status Register. Contains flags for transmit and receive status, including line errors.
scr: SCR
0x1c - Scratch Pad Register. Eight-bit temporary storage for software.
acr: ACR
0x20 - Auto-baud Control Register. Contains controls for the auto-baud feature.
icr: ICR
0x24 - IrDA control register (USART3 only)
fdr: FDR
0x28 - Fractional Divider Register. Generates a clock input for the baud rate divider.
osr: OSR
0x2c - Oversampling Register. Controls the degree of oversampling during each bit time.
hden: HDEN
0x40 - Half-duplex enable Register
scictrl: SCICTRL
0x48 - Smart card interface control register
rs485ctrl: RS485CTRL
0x4c - RS-485/EIA-485 Control. Contains controls to configure various aspects of RS-485/EIA-485 modes.
rs485adrmatch: RS485ADRMATCH
0x50 - RS-485/EIA-485 address match. Contains the address match value for RS-485/EIA-485 mode.
rs485dly: RS485DLY
0x54 - RS-485/EIA-485 direction control delay.
syncctrl: SYNCCTRL
0x58 - Synchronous mode control register.
ter: TER
0x5c - Transmit Enable Register. Turns off USART transmitter for use with software flow control.