Struct lpc176x_5x::syscon::pll1stat::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn msel1(&self) -> MSEL1R

Bits 0:4 - Read-back for the PLL1 Multiplier value. This is the value currently used by PLL1.

pub fn psel1(&self) -> PSEL1R

Bits 5:6 - Read-back for the PLL1 Divider value. This is the value currently used by PLL1.

pub fn plle1_stat(&self) -> PLLE1_STATR

Bit 8 - Read-back for the PLL1 Enable bit. When one, PLL1 is currently activated. When zero, PLL1 is turned off. This bit is automatically cleared when Power-down mode is activated.

pub fn pllc1_stat(&self) -> PLLC1_STATR

Bit 9 - Read-back for the PLL1 Connect bit. When PLLC and PLLE are both one, PLL1 is connected as the clock source for the microcontroller. When either PLLC or PLLE is zero, PLL1 is bypassed and the oscillator clock is used directly by the microcontroller. This bit is automatically cleared when Power-down mode is activated.

pub fn plock1(&self) -> PLOCK1R

Bit 10 - Reflects the PLL1 Lock status. When zero, PLL1 is not locked. When one, PLL1 is locked onto the requested frequency.