Struct lpc176x_5x::emac::rxfilterwolstatus::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn auw(&self) -> AUWR

Bit 0 - AcceptUnicastWoL. When the value is 1, a unicast frames caused WoL.

pub fn abw(&self) -> ABWR

Bit 1 - AcceptBroadcastWoL. When the value is 1, a broadcast frame caused WoL.

pub fn amw(&self) -> AMWR

Bit 2 - AcceptMulticastWoL. When the value is 1, a multicast frame caused WoL.

pub fn auhw(&self) -> AUHWR

Bit 3 - AcceptUnicastHashWoL. When the value is 1, a unicast frame that passes the imperfect hash filter caused WoL.

pub fn amhw(&self) -> AMHWR

Bit 4 - AcceptMulticastHashWoL. When the value is 1, a multicast frame that passes the imperfect hash filter caused WoL.

pub fn apw(&self) -> APWR

Bit 5 - AcceptPerfectWoL. When the value is 1, the perfect address matching filter caused WoL.

pub fn rfw(&self) -> RFWR

Bit 7 - RxFilterWoL. When the value is 1, the receive filter caused WoL.

pub fn mpw(&self) -> MPWR

Bit 8 - MagicPacketWoL. When the value is 1, the magic packet filter caused WoL.