Struct lpc13xx::i2c::SCLL

pub struct SCLL { /* fields omitted */ }

SCL Duty Cycle Register Low Half Word. Determines the low time of the I2C clock. I2nSCLL and I2nSCLH together determine the clock frequency generated by an I2C master and certain times used in slave mode.

Methods

impl SCLL

pub fn modify<F>(&self, f: F) where
    F: FnOnce(&R, &'w mut W) -> &'w mut W, 

Modifies the contents of the register

pub fn read(&self) -> R

Reads the contents of the register

pub fn write<F>(&self, f: F) where
    F: FnOnce(&mut W) -> &mut W, 

Writes to the register

pub fn reset(&self)

Writes the reset value to the register

Trait Implementations