Struct lpc13xx::ct32b0::bmcr::R
[−]
[src]
pub struct R { /* fields omitted */ }Value read from the register
Methods
impl R[src]
pub fn bits(&self) -> u32[src]
Value of the register as raw bits
pub fn mr0i(&self) -> MR0IR[src]
Bit 0 - Interrupt on MR0: an interrupt is generated when MR0 matches the value in the TC.
pub fn mr0r(&self) -> MR0RR[src]
Bit 1 - Reset on MR0: the TC will be reset if MR0 matches it.
pub fn mr0s(&self) -> MR0SR[src]
Bit 2 - Stop on MR0: the TC and PC will be stopped and TCR[0] will be set to 0 if MR0 matches the TC.
pub fn mr1i(&self) -> MR1IR[src]
Bit 3 - Interrupt on MR1: an interrupt is generated when MR1 matches the value in the TC.
pub fn mr1r(&self) -> MR1RR[src]
Bit 4 - Reset on MR1: the TC will be reset if MR1 matches it.
pub fn mr1s(&self) -> MR1SR[src]
Bit 5 - Stop on MR1: the TC and PC will be stopped and TCR[0] will be set to 0 if MR1 matches the TC.
pub fn mr2i(&self) -> MR2IR[src]
Bit 6 - Interrupt on MR2: an interrupt is generated when MR2 matches the value in the TC.
pub fn mr2r(&self) -> MR2RR[src]
Bit 7 - Reset on MR2: the TC will be reset if MR2 matches it.
pub fn mr2s(&self) -> MR2SR[src]
Bit 8 - Stop on MR2: the TC and PC will be stopped and TCR[0] will be set to 0 if MR2 matches the TC.
pub fn mr3i(&self) -> MR3IR[src]
Bit 9 - Interrupt on MR3: an interrupt is generated when MR3 matches the value in the TC.
pub fn mr3r(&self) -> MR3RR[src]
Bit 10 - Reset on MR3: the TC will be reset if MR3 matches it.
pub fn mr3s(&self) -> MR3SR[src]
Bit 11 - Stop on MR3: the TC and PC will be stopped and TCR[0] will be set to 0 if MR3 matches the TC.