lpc13xx_pac/lpc1313/syscon/
sysoscctrl.rs

1#[doc = "Register `SYSOSCCTRL` reader"]
2pub struct R(crate::R<SYSOSCCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SYSOSCCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SYSOSCCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SYSOSCCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SYSOSCCTRL` writer"]
17pub struct W(crate::W<SYSOSCCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SYSOSCCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SYSOSCCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SYSOSCCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `BYPASS` reader - Bypass system oscillator"]
38pub type BYPASS_R = crate::BitReader<BYPASS_A>;
39#[doc = "Bypass system oscillator\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq)]
41pub enum BYPASS_A {
42    #[doc = "0: Oscillator is not bypassed."]
43    OSCILLATOR_IS_NOT_BY = 0,
44    #[doc = "1: Bypass enabled. PLL input (sys_osc_clk) is fed directly from the XTALIN and XTALOUT pins."]
45    BYPASS_ENABLED_PLL_ = 1,
46}
47impl From<BYPASS_A> for bool {
48    #[inline(always)]
49    fn from(variant: BYPASS_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl BYPASS_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> BYPASS_A {
57        match self.bits {
58            false => BYPASS_A::OSCILLATOR_IS_NOT_BY,
59            true => BYPASS_A::BYPASS_ENABLED_PLL_,
60        }
61    }
62    #[doc = "Checks if the value of the field is `OSCILLATOR_IS_NOT_BY`"]
63    #[inline(always)]
64    pub fn is_oscillator_is_not_by(&self) -> bool {
65        *self == BYPASS_A::OSCILLATOR_IS_NOT_BY
66    }
67    #[doc = "Checks if the value of the field is `BYPASS_ENABLED_PLL_`"]
68    #[inline(always)]
69    pub fn is_bypass_enabled_pll_(&self) -> bool {
70        *self == BYPASS_A::BYPASS_ENABLED_PLL_
71    }
72}
73#[doc = "Field `BYPASS` writer - Bypass system oscillator"]
74pub type BYPASS_W<'a, const O: u8> = crate::BitWriter<'a, u32, SYSOSCCTRL_SPEC, BYPASS_A, O>;
75impl<'a, const O: u8> BYPASS_W<'a, O> {
76    #[doc = "Oscillator is not bypassed."]
77    #[inline(always)]
78    pub fn oscillator_is_not_by(self) -> &'a mut W {
79        self.variant(BYPASS_A::OSCILLATOR_IS_NOT_BY)
80    }
81    #[doc = "Bypass enabled. PLL input (sys_osc_clk) is fed directly from the XTALIN and XTALOUT pins."]
82    #[inline(always)]
83    pub fn bypass_enabled_pll_(self) -> &'a mut W {
84        self.variant(BYPASS_A::BYPASS_ENABLED_PLL_)
85    }
86}
87#[doc = "Field `FREQRANGE` reader - Determines frequency range for Low-power oscillator."]
88pub type FREQRANGE_R = crate::BitReader<FREQRANGE_A>;
89#[doc = "Determines frequency range for Low-power oscillator.\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq)]
91pub enum FREQRANGE_A {
92    #[doc = "0: 1 - 20 MHz frequency range."]
93    _1__20_MHZ_FREQUENCY = 0,
94    #[doc = "1: 15 - 25 MHz frequency range"]
95    _15__25_MHZ_FREQUENC = 1,
96}
97impl From<FREQRANGE_A> for bool {
98    #[inline(always)]
99    fn from(variant: FREQRANGE_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl FREQRANGE_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> FREQRANGE_A {
107        match self.bits {
108            false => FREQRANGE_A::_1__20_MHZ_FREQUENCY,
109            true => FREQRANGE_A::_15__25_MHZ_FREQUENC,
110        }
111    }
112    #[doc = "Checks if the value of the field is `_1__20_MHZ_FREQUENCY`"]
113    #[inline(always)]
114    pub fn is_1__20_mhz_frequency(&self) -> bool {
115        *self == FREQRANGE_A::_1__20_MHZ_FREQUENCY
116    }
117    #[doc = "Checks if the value of the field is `_15__25_MHZ_FREQUENC`"]
118    #[inline(always)]
119    pub fn is_15__25_mhz_frequenc(&self) -> bool {
120        *self == FREQRANGE_A::_15__25_MHZ_FREQUENC
121    }
122}
123#[doc = "Field `FREQRANGE` writer - Determines frequency range for Low-power oscillator."]
124pub type FREQRANGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, SYSOSCCTRL_SPEC, FREQRANGE_A, O>;
125impl<'a, const O: u8> FREQRANGE_W<'a, O> {
126    #[doc = "1 - 20 MHz frequency range."]
127    #[inline(always)]
128    pub fn _1__20_mhz_frequency(self) -> &'a mut W {
129        self.variant(FREQRANGE_A::_1__20_MHZ_FREQUENCY)
130    }
131    #[doc = "15 - 25 MHz frequency range"]
132    #[inline(always)]
133    pub fn _15__25_mhz_frequenc(self) -> &'a mut W {
134        self.variant(FREQRANGE_A::_15__25_MHZ_FREQUENC)
135    }
136}
137impl R {
138    #[doc = "Bit 0 - Bypass system oscillator"]
139    #[inline(always)]
140    pub fn bypass(&self) -> BYPASS_R {
141        BYPASS_R::new((self.bits & 1) != 0)
142    }
143    #[doc = "Bit 1 - Determines frequency range for Low-power oscillator."]
144    #[inline(always)]
145    pub fn freqrange(&self) -> FREQRANGE_R {
146        FREQRANGE_R::new(((self.bits >> 1) & 1) != 0)
147    }
148}
149impl W {
150    #[doc = "Bit 0 - Bypass system oscillator"]
151    #[inline(always)]
152    pub fn bypass(&mut self) -> BYPASS_W<0> {
153        BYPASS_W::new(self)
154    }
155    #[doc = "Bit 1 - Determines frequency range for Low-power oscillator."]
156    #[inline(always)]
157    pub fn freqrange(&mut self) -> FREQRANGE_W<1> {
158        FREQRANGE_W::new(self)
159    }
160    #[doc = "Writes raw bits to the register."]
161    #[inline(always)]
162    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
163        self.0.bits(bits);
164        self
165    }
166}
167#[doc = "System oscillator control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [sysoscctrl](index.html) module"]
168pub struct SYSOSCCTRL_SPEC;
169impl crate::RegisterSpec for SYSOSCCTRL_SPEC {
170    type Ux = u32;
171}
172#[doc = "`read()` method returns [sysoscctrl::R](R) reader structure"]
173impl crate::Readable for SYSOSCCTRL_SPEC {
174    type Reader = R;
175}
176#[doc = "`write(|w| ..)` method takes [sysoscctrl::W](W) writer structure"]
177impl crate::Writable for SYSOSCCTRL_SPEC {
178    type Writer = W;
179}
180#[doc = "`reset()` method sets SYSOSCCTRL to value 0"]
181impl crate::Resettable for SYSOSCCTRL_SPEC {
182    #[inline(always)]
183    fn reset_value() -> Self::Ux {
184        0
185    }
186}
lpc13xx_pac/lpc1313/syscon/sysoscctrl.rs

lpc13xx_pac/lpc1313/syscon/
sysoscctrl.rs
