lpc11xx/syscon/
sysoscctrl.rs1#[doc = "Reader of register SYSOSCCTRL"]
2pub type R = crate::R<u32, super::SYSOSCCTRL>;
3#[doc = "Writer for register SYSOSCCTRL"]
4pub type W = crate::W<u32, super::SYSOSCCTRL>;
5#[doc = "Register SYSOSCCTRL `reset()`'s with value 0"]
6impl crate::ResetValue for super::SYSOSCCTRL {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Bypass system oscillator.\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum BYPASS_A {
16 #[doc = "0: Oscillator is not bypassed"]
17 NOBYPASS,
18 #[doc = "1: Bypass enabled. PLL input (sys_osc_clk) is fed directly from the XTALIN and XTALOUT pins"]
19 BYPASS_ENABLED_PLL_,
20}
21impl From<BYPASS_A> for bool {
22 #[inline(always)]
23 fn from(variant: BYPASS_A) -> Self {
24 match variant {
25 BYPASS_A::NOBYPASS => false,
26 BYPASS_A::BYPASS_ENABLED_PLL_ => true,
27 }
28 }
29}
30#[doc = "Reader of field `BYPASS`"]
31pub type BYPASS_R = crate::R<bool, BYPASS_A>;
32impl BYPASS_R {
33 #[doc = r"Get enumerated values variant"]
34 #[inline(always)]
35 pub fn variant(&self) -> BYPASS_A {
36 match self.bits {
37 false => BYPASS_A::NOBYPASS,
38 true => BYPASS_A::BYPASS_ENABLED_PLL_,
39 }
40 }
41 #[doc = "Checks if the value of the field is `NOBYPASS`"]
42 #[inline(always)]
43 pub fn is_nobypass(&self) -> bool {
44 *self == BYPASS_A::NOBYPASS
45 }
46 #[doc = "Checks if the value of the field is `BYPASS_ENABLED_PLL_`"]
47 #[inline(always)]
48 pub fn is_bypass_enabled_pll_(&self) -> bool {
49 *self == BYPASS_A::BYPASS_ENABLED_PLL_
50 }
51}
52#[doc = "Write proxy for field `BYPASS`"]
53pub struct BYPASS_W<'a> {
54 w: &'a mut W,
55}
56impl<'a> BYPASS_W<'a> {
57 #[doc = r"Writes `variant` to the field"]
58 #[inline(always)]
59 pub fn variant(self, variant: BYPASS_A) -> &'a mut W {
60 {
61 self.bit(variant.into())
62 }
63 }
64 #[doc = "Oscillator is not bypassed"]
65 #[inline(always)]
66 pub fn nobypass(self) -> &'a mut W {
67 self.variant(BYPASS_A::NOBYPASS)
68 }
69 #[doc = "Bypass enabled. PLL input (sys_osc_clk) is fed directly from the XTALIN and XTALOUT pins"]
70 #[inline(always)]
71 pub fn bypass_enabled_pll_(self) -> &'a mut W {
72 self.variant(BYPASS_A::BYPASS_ENABLED_PLL_)
73 }
74 #[doc = r"Sets the field bit"]
75 #[inline(always)]
76 pub fn set_bit(self) -> &'a mut W {
77 self.bit(true)
78 }
79 #[doc = r"Clears the field bit"]
80 #[inline(always)]
81 pub fn clear_bit(self) -> &'a mut W {
82 self.bit(false)
83 }
84 #[doc = r"Writes raw bits to the field"]
85 #[inline(always)]
86 pub fn bit(self, value: bool) -> &'a mut W {
87 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
88 self.w
89 }
90}
91#[doc = "Determines frequency range for Low-power oscillator.\n\nValue on reset: 0"]
92#[derive(Clone, Copy, Debug, PartialEq)]
93pub enum FREQRANGE_A {
94 #[doc = "0: 1 - 20 MHz frequency range"]
95 LOW,
96 #[doc = "1: 15 - 25 MHz frequency range"]
97 HIGH,
98}
99impl From<FREQRANGE_A> for bool {
100 #[inline(always)]
101 fn from(variant: FREQRANGE_A) -> Self {
102 match variant {
103 FREQRANGE_A::LOW => false,
104 FREQRANGE_A::HIGH => true,
105 }
106 }
107}
108#[doc = "Reader of field `FREQRANGE`"]
109pub type FREQRANGE_R = crate::R<bool, FREQRANGE_A>;
110impl FREQRANGE_R {
111 #[doc = r"Get enumerated values variant"]
112 #[inline(always)]
113 pub fn variant(&self) -> FREQRANGE_A {
114 match self.bits {
115 false => FREQRANGE_A::LOW,
116 true => FREQRANGE_A::HIGH,
117 }
118 }
119 #[doc = "Checks if the value of the field is `LOW`"]
120 #[inline(always)]
121 pub fn is_low(&self) -> bool {
122 *self == FREQRANGE_A::LOW
123 }
124 #[doc = "Checks if the value of the field is `HIGH`"]
125 #[inline(always)]
126 pub fn is_high(&self) -> bool {
127 *self == FREQRANGE_A::HIGH
128 }
129}
130#[doc = "Write proxy for field `FREQRANGE`"]
131pub struct FREQRANGE_W<'a> {
132 w: &'a mut W,
133}
134impl<'a> FREQRANGE_W<'a> {
135 #[doc = r"Writes `variant` to the field"]
136 #[inline(always)]
137 pub fn variant(self, variant: FREQRANGE_A) -> &'a mut W {
138 {
139 self.bit(variant.into())
140 }
141 }
142 #[doc = "1 - 20 MHz frequency range"]
143 #[inline(always)]
144 pub fn low(self) -> &'a mut W {
145 self.variant(FREQRANGE_A::LOW)
146 }
147 #[doc = "15 - 25 MHz frequency range"]
148 #[inline(always)]
149 pub fn high(self) -> &'a mut W {
150 self.variant(FREQRANGE_A::HIGH)
151 }
152 #[doc = r"Sets the field bit"]
153 #[inline(always)]
154 pub fn set_bit(self) -> &'a mut W {
155 self.bit(true)
156 }
157 #[doc = r"Clears the field bit"]
158 #[inline(always)]
159 pub fn clear_bit(self) -> &'a mut W {
160 self.bit(false)
161 }
162 #[doc = r"Writes raw bits to the field"]
163 #[inline(always)]
164 pub fn bit(self, value: bool) -> &'a mut W {
165 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
166 self.w
167 }
168}
169impl R {
170 #[doc = "Bit 0 - Bypass system oscillator."]
171 #[inline(always)]
172 pub fn bypass(&self) -> BYPASS_R {
173 BYPASS_R::new((self.bits & 0x01) != 0)
174 }
175 #[doc = "Bit 1 - Determines frequency range for Low-power oscillator."]
176 #[inline(always)]
177 pub fn freqrange(&self) -> FREQRANGE_R {
178 FREQRANGE_R::new(((self.bits >> 1) & 0x01) != 0)
179 }
180}
181impl W {
182 #[doc = "Bit 0 - Bypass system oscillator."]
183 #[inline(always)]
184 pub fn bypass(&mut self) -> BYPASS_W {
185 BYPASS_W { w: self }
186 }
187 #[doc = "Bit 1 - Determines frequency range for Low-power oscillator."]
188 #[inline(always)]
189 pub fn freqrange(&mut self) -> FREQRANGE_W {
190 FREQRANGE_W { w: self }
191 }
192}