Struct lpc11xx::ct16b0::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub ir: IR,
    pub tcr: TCR,
    pub tc: TC,
    pub pr: PR,
    pub pc: PC,
    pub mcr: MCR,
    pub mr: [MR; 4],
    pub ccr: CCR,
    pub cr: [CR; 2],
    pub emr: EMR,
    pub ctcr: CTCR,
    pub pwmc: PWMC,
    // some fields omitted
}

Register block

Fields

ir: IR

0x00 - Interrupt Register (IR). The IR can be written to clear interrupts. The IR can be read to identify which of five possible interrupt sources are pending

tcr: TCR

0x04 - Timer Control Register (TCR). The TCR is used to control the Timer Counter functions. The Timer Counter can be disabled or reset through the TCR

tc: TC

0x08 - Timer Counter (TC). The 16-bit TC is incremented every PR+1 cycles of PCLK. The TC is controlled through the TCR

pr: PR

0x0c - Prescale Register (PR). When the Prescale Counter (below) is equal to this value, the next clock increments the TC and clears the PC

pc: PC

0x10 - Prescale Counter (PC). The 16-bit PC is a counter which is incremented to the value stored in PR. When the value in PR is reached, the TC is incremented and the PC is cleared. The PC is observable and controllable through the bus interface

mcr: MCR

0x14 - Match Control Register (MCR). The MCR is used to control if an interrupt is generated and if the TC is reset when a Match occurs

mr: [MR; 4]

0x18 - Match Register. MR can be enabled through the MCR to reset the TC, stop both the TC and PC, and/or generate an interrupt every time MR matches the TC

ccr: CCR

0x28 - Capture Control Register (CCR). The CCR controls which edges of the capture inputs are used to load the Capture Registers and whether or not an interrupt is generated when a capture takes place

cr: [CR; 2]

0x2c - Capture Register (CR). CR is loaded with the value of TC when there is an event on the CT16Bn_CAPm input

emr: EMR

0x3c - External Match Register (EMR). The EMR controls the match function and the external match pins CT16B0_MAT[2:0]

ctcr: CTCR

0x70 - Count Control Register (CTCR). The CTCR selects between Timer and Counter mode, and in Counter mode selects the signal and edge(s) for counting

pwmc: PWMC

0x74 - PWM Control Register (PWMCON). The PWMCON enables PWM mode for the external match pins CT16B0_MAT[2:0]