1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u32,
8}
9impl super::TCR {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `CEN`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum CENR {
48 #[doc = "The counters are disabled."]
49 THE_COUNTERS_ARE_DIS,
50 #[doc = "The Timer Counter and Prescale Counter are enabled for counting."]
51 THE_TIMER_COUNTER_AN,
52}
53impl CENR {
54 #[doc = r" Returns `true` if the bit is clear (0)"]
55 #[inline]
56 pub fn bit_is_clear(&self) -> bool {
57 !self.bit()
58 }
59 #[doc = r" Returns `true` if the bit is set (1)"]
60 #[inline]
61 pub fn bit_is_set(&self) -> bool {
62 self.bit()
63 }
64 #[doc = r" Value of the field as raw bits"]
65 #[inline]
66 pub fn bit(&self) -> bool {
67 match *self {
68 CENR::THE_COUNTERS_ARE_DIS => false,
69 CENR::THE_TIMER_COUNTER_AN => true,
70 }
71 }
72 #[allow(missing_docs)]
73 #[doc(hidden)]
74 #[inline]
75 pub fn _from(value: bool) -> CENR {
76 match value {
77 false => CENR::THE_COUNTERS_ARE_DIS,
78 true => CENR::THE_TIMER_COUNTER_AN,
79 }
80 }
81 #[doc = "Checks if the value of the field is `THE_COUNTERS_ARE_DIS`"]
82 #[inline]
83 pub fn is_the_counters_are_dis(&self) -> bool {
84 *self == CENR::THE_COUNTERS_ARE_DIS
85 }
86 #[doc = "Checks if the value of the field is `THE_TIMER_COUNTER_AN`"]
87 #[inline]
88 pub fn is_the_timer_counter_an(&self) -> bool {
89 *self == CENR::THE_TIMER_COUNTER_AN
90 }
91}
92#[doc = "Possible values of the field `CRST`"]
93#[derive(Clone, Copy, Debug, PartialEq)]
94pub enum CRSTR {
95 #[doc = "Do nothing."]
96 DO_NOTHING,
97 #[doc = "The Timer Counter and the Prescale Counter are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR\\[1\\] is returned to zero."]
98 RESET,
99}
100impl CRSTR {
101 #[doc = r" Returns `true` if the bit is clear (0)"]
102 #[inline]
103 pub fn bit_is_clear(&self) -> bool {
104 !self.bit()
105 }
106 #[doc = r" Returns `true` if the bit is set (1)"]
107 #[inline]
108 pub fn bit_is_set(&self) -> bool {
109 self.bit()
110 }
111 #[doc = r" Value of the field as raw bits"]
112 #[inline]
113 pub fn bit(&self) -> bool {
114 match *self {
115 CRSTR::DO_NOTHING => false,
116 CRSTR::RESET => true,
117 }
118 }
119 #[allow(missing_docs)]
120 #[doc(hidden)]
121 #[inline]
122 pub fn _from(value: bool) -> CRSTR {
123 match value {
124 false => CRSTR::DO_NOTHING,
125 true => CRSTR::RESET,
126 }
127 }
128 #[doc = "Checks if the value of the field is `DO_NOTHING`"]
129 #[inline]
130 pub fn is_do_nothing(&self) -> bool {
131 *self == CRSTR::DO_NOTHING
132 }
133 #[doc = "Checks if the value of the field is `RESET`"]
134 #[inline]
135 pub fn is_reset(&self) -> bool {
136 *self == CRSTR::RESET
137 }
138}
139#[doc = "Values that can be written to the field `CEN`"]
140pub enum CENW {
141 #[doc = "The counters are disabled."]
142 THE_COUNTERS_ARE_DIS,
143 #[doc = "The Timer Counter and Prescale Counter are enabled for counting."]
144 THE_TIMER_COUNTER_AN,
145}
146impl CENW {
147 #[allow(missing_docs)]
148 #[doc(hidden)]
149 #[inline]
150 pub fn _bits(&self) -> bool {
151 match *self {
152 CENW::THE_COUNTERS_ARE_DIS => false,
153 CENW::THE_TIMER_COUNTER_AN => true,
154 }
155 }
156}
157#[doc = r" Proxy"]
158pub struct _CENW<'a> {
159 w: &'a mut W,
160}
161impl<'a> _CENW<'a> {
162 #[doc = r" Writes `variant` to the field"]
163 #[inline]
164 pub fn variant(self, variant: CENW) -> &'a mut W {
165 {
166 self.bit(variant._bits())
167 }
168 }
169 #[doc = "The counters are disabled."]
170 #[inline]
171 pub fn the_counters_are_dis(self) -> &'a mut W {
172 self.variant(CENW::THE_COUNTERS_ARE_DIS)
173 }
174 #[doc = "The Timer Counter and Prescale Counter are enabled for counting."]
175 #[inline]
176 pub fn the_timer_counter_an(self) -> &'a mut W {
177 self.variant(CENW::THE_TIMER_COUNTER_AN)
178 }
179 #[doc = r" Sets the field bit"]
180 pub fn set_bit(self) -> &'a mut W {
181 self.bit(true)
182 }
183 #[doc = r" Clears the field bit"]
184 pub fn clear_bit(self) -> &'a mut W {
185 self.bit(false)
186 }
187 #[doc = r" Writes raw bits to the field"]
188 #[inline]
189 pub fn bit(self, value: bool) -> &'a mut W {
190 const MASK: bool = true;
191 const OFFSET: u8 = 0;
192 self.w.bits &= !((MASK as u32) << OFFSET);
193 self.w.bits |= ((value & MASK) as u32) << OFFSET;
194 self.w
195 }
196}
197#[doc = "Values that can be written to the field `CRST`"]
198pub enum CRSTW {
199 #[doc = "Do nothing."]
200 DO_NOTHING,
201 #[doc = "The Timer Counter and the Prescale Counter are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR\\[1\\] is returned to zero."]
202 RESET,
203}
204impl CRSTW {
205 #[allow(missing_docs)]
206 #[doc(hidden)]
207 #[inline]
208 pub fn _bits(&self) -> bool {
209 match *self {
210 CRSTW::DO_NOTHING => false,
211 CRSTW::RESET => true,
212 }
213 }
214}
215#[doc = r" Proxy"]
216pub struct _CRSTW<'a> {
217 w: &'a mut W,
218}
219impl<'a> _CRSTW<'a> {
220 #[doc = r" Writes `variant` to the field"]
221 #[inline]
222 pub fn variant(self, variant: CRSTW) -> &'a mut W {
223 {
224 self.bit(variant._bits())
225 }
226 }
227 #[doc = "Do nothing."]
228 #[inline]
229 pub fn do_nothing(self) -> &'a mut W {
230 self.variant(CRSTW::DO_NOTHING)
231 }
232 #[doc = "The Timer Counter and the Prescale Counter are synchronously reset on the next positive edge of PCLK. The counters remain reset until TCR\\[1\\] is returned to zero."]
233 #[inline]
234 pub fn reset(self) -> &'a mut W {
235 self.variant(CRSTW::RESET)
236 }
237 #[doc = r" Sets the field bit"]
238 pub fn set_bit(self) -> &'a mut W {
239 self.bit(true)
240 }
241 #[doc = r" Clears the field bit"]
242 pub fn clear_bit(self) -> &'a mut W {
243 self.bit(false)
244 }
245 #[doc = r" Writes raw bits to the field"]
246 #[inline]
247 pub fn bit(self, value: bool) -> &'a mut W {
248 const MASK: bool = true;
249 const OFFSET: u8 = 1;
250 self.w.bits &= !((MASK as u32) << OFFSET);
251 self.w.bits |= ((value & MASK) as u32) << OFFSET;
252 self.w
253 }
254}
255impl R {
256 #[doc = r" Value of the register as raw bits"]
257 #[inline]
258 pub fn bits(&self) -> u32 {
259 self.bits
260 }
261 #[doc = "Bit 0 - Counter enable."]
262 #[inline]
263 pub fn cen(&self) -> CENR {
264 CENR::_from({
265 const MASK: bool = true;
266 const OFFSET: u8 = 0;
267 ((self.bits >> OFFSET) & MASK as u32) != 0
268 })
269 }
270 #[doc = "Bit 1 - Counter reset."]
271 #[inline]
272 pub fn crst(&self) -> CRSTR {
273 CRSTR::_from({
274 const MASK: bool = true;
275 const OFFSET: u8 = 1;
276 ((self.bits >> OFFSET) & MASK as u32) != 0
277 })
278 }
279}
280impl W {
281 #[doc = r" Reset value of the register"]
282 #[inline]
283 pub fn reset_value() -> W {
284 W { bits: 0 }
285 }
286 #[doc = r" Writes raw bits to the register"]
287 #[inline]
288 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
289 self.bits = bits;
290 self
291 }
292 #[doc = "Bit 0 - Counter enable."]
293 #[inline]
294 pub fn cen(&mut self) -> _CENW {
295 _CENW { w: self }
296 }
297 #[doc = "Bit 1 - Counter reset."]
298 #[inline]
299 pub fn crst(&mut self) -> _CRSTW {
300 _CRSTW { w: self }
301 }
302}