linux_syscalls/env/aux/
powerpc.rs

1use super::{aux_t, AuxValue, Sealed};
2
3crate::bitflags! {
4    #[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash)]
5    pub enum Features: usize {
6        /// 32-bit mode.
7        B32 = 0x80000000,
8        /// 64-bit mode.
9        B64 = 0x40000000,
10        /// 601 chip, Old POWER ISA.
11        C601_INSTR = 0x20000000,
12        /// SIMD/Vector Unit.
13        HAS_ALTIVEC = 0x10000000,
14        /// Floating Point Unit.
15        HAS_FPU = 0x08000000,
16        /// Memory Management Unit.
17        HAS_MMU = 0x04000000,
18        #[allow(non_upper_case_globals)]
19        /// 4xx Multiply Accumulator.
20        HAS_4xxMAC = 0x02000000,
21        /// Unified I/D cache.
22        UNIFIED_CACHE = 0x01000000,
23        /// Signal Processing ext.
24        HAS_SPE = 0x00800000,
25        /// SPE Float.
26        HAS_EFP_SINGLE = 0x00400000,
27        /// SPE Double.
28        HAS_EFP_DOUBLE = 0x00200000,
29        /// 601/403gx have no timebase
30        NO_TB = 0x00100000,
31        /// POWER4 ISA 2.00
32        POWER4 = 0x00080000,
33        /// POWER5 ISA 2.02
34        POWER5 = 0x00040000,
35        /// POWER5+ ISA 2.03
36        POWER5_PLUS = 0x00020000,
37        /// CELL Broadband Engine
38        CELL_BE = 0x00010000,
39        /// ISA Category Embedded
40        BOOKE = 0x00008000,
41        /// Simultaneous Multi-Threading
42        SMT = 0x00004000,
43        ICACHE_SNOOP = 0x00002000,
44        /// ISA 2.05
45        ARCH_2_05 = 0x00001000,
46        /// PA Semi 6T Core
47        PA6T = 0x00000800,
48        /// Decimal FP Unit
49        HAS_DFP = 0x00000400,
50        /// P6 + mffgpr/mftgpr
51        POWER6_EXT = 0x00000200,
52        /// ISA 2.06
53        ARCH_2_06 = 0x00000100,
54        /// P7 Vector Extension.
55        HAS_VSX = 0x00000080,
56        PSERIES_PERFMON_COMPAT = 0x00000040,
57        TRUE_LE = 0x00000002,
58        PPC_LE = 0x00000001,
59    }
60
61    impl Sealed for Features {}
62    impl AuxValue for Features {
63        fn from(value: aux_t) -> Self {
64            (value as usize).into()
65        }
66    }
67}
68
69crate::bitflags! {
70    #[derive(Clone, Copy, PartialEq, Eq, PartialOrd, Ord, Hash)]
71    pub enum Features2: usize {
72        /// ISA 2.07
73        ARCH_2_07 = 0x80000000,
74        /// Hardware Transactional Memory
75        HAS_HTM = 0x40000000,
76        /// Data Stream Control Register
77        HAS_DSCR = 0x20000000,
78        /// Event Base Branching
79        HAS_EBB = 0x10000000,
80        /// Integer Select
81        HAS_ISEL = 0x08000000,
82        /// Target Address Register
83        HAS_TAR = 0x04000000,
84         /// Target supports vector instruction.
85        HAS_VEC_CRYPTO = 0x02000000,
86        /// Kernel aborts transaction when a syscall is made.
87        HTM_NOSC = 0x01000000,
88        /// ISA 3.0
89        ARCH_3_00 = 0x00800000,
90        /// VSX IEEE Binary Float 128-bit
91        HAS_IEEE128 = 0x00400000,
92        /// darn instruction.
93        DARN = 0x00200000,
94        /// scv syscall.
95        SCV = 0x00100000,
96        /// TM without suspended state.
97        HTM_NO_SUSPEND = 0x00080000,
98        /// ISA 3.1.
99        ARCH_3_1 = 0x00040000,
100        /// Matrix-Multiply Assist.
101        MMA = 0x00020000,
102    }
103
104    impl Sealed for Features2 {}
105    impl AuxValue for Features2 {
106        fn from(value: aux_t) -> Self {
107            (value as usize).into()
108        }
109    }
110}