libttl/lib.rs
1//! # libttl - A Rust library for simulating TTL logic chips.
2//!
3//! This library provides basic building blocks like logic levels and gates,
4//! and implements several common 74xx series TTL chips.
5//!
6//! ## Features
7//!
8//! - `LogicLevel` enum (High, Low) with boolean conversions and NOT operation.
9//! - Basic logic gate implementations (`NotGate`, `AndGate`, `OrGate`, `NandGate`)
10//! behind a `Gate` trait.
11//! - `Chip` trait defining common chip behavior (pin configuration, input/output, update).
12//! - Implementations for:
13//! - `Chip7400` (Quad 2-Input NAND)
14//! - `Chip7404` (Hex Inverter)
15//! - `Chip7408` (Quad 2-Input AND)
16//! - `Chip7432` (Quad 2-Input OR)
17//! - Clocking support is implicit via the `update()` method on chips, simulating
18//! propagation for combinational logic. For sequential circuits (not yet implemented),
19//! a circuit simulator would call `update()` repeatedly.
20//!
21//! ## Example Usage (Testing a 7404 Inverter)
22//!
23//! ```rust
24//! use libttl::logic_level::LogicLevel::{High, Low};
25//! use libttl::chips::{Chip, Chip7404};
26//!
27//! // Create a new 7404 chip instance
28//! let mut chip = Chip7404::new();
29//!
30//! // --- Test Gate 1 (Input Pin 1, Output Pin 2) ---
31//!
32//! // Set Input Pin 1 to Low
33//! chip.set_input(1, Low);
34//! // Update the chip's internal state
35//! chip.update();
36//! // Check Output Pin 2 (should be High)
37//! assert_eq!(chip.get_output(2), High);
38//!
39//! // Set Input Pin 1 to High
40//! chip.set_input(1, High);
41//! // Update the chip's internal state
42//! chip.update();
43//! // Check Output Pin 2 (should be Low)
44//! assert_eq!(chip.get_output(2), Low);
45//! ```
46
47pub mod chips;
48pub mod gates;
49pub mod logic_level;
50pub mod circuit;
51
52// Optional: Re-export key items for convenience
53pub use logic_level::LogicLevel;
54pub use chips::{Chip, PinType};
55pub use gates::Gate;
56pub use circuit::{Circuit, Connection, CircuitError};