Crate libttl

libttl - A Rust library for simulating TTL logic chips.

This library provides basic building blocks like logic levels and gates, and implements several common 74xx series TTL chips.

Features

• LogicLevel enum (High, Low) with boolean conversions and NOT operation.
• Basic logic gate implementations (NotGate, AndGate, OrGate, NandGate) behind a Gate trait.
• Chip trait defining common chip behavior (pin configuration, input/output, update).
• Implementations for:
  • Chip7400 (Quad 2-Input NAND)
  • Chip7404 (Hex Inverter)
  • Chip7408 (Quad 2-Input AND)
  • Chip7432 (Quad 2-Input OR)
• Clocking support is implicit via the update() method on chips, simulating propagation for combinational logic. For sequential circuits (not yet implemented), a circuit simulator would call update() repeatedly.

Example Usage (Testing a 7404 Inverter)

use libttl::logic_level::LogicLevel::{High, Low};
use libttl::chips::{Chip, Chip7404};

// Create a new 7404 chip instance
let mut chip = Chip7404::new();

// --- Test Gate 1 (Input Pin 1, Output Pin 2) ---

// Set Input Pin 1 to Low
chip.set_input(1, Low);
// Update the chip's internal state
chip.update();
// Check Output Pin 2 (should be High)
assert_eq!(chip.get_output(2), High);

// Set Input Pin 1 to High
chip.set_input(1, High);
// Update the chip's internal state
chip.update();
// Check Output Pin 2 (should be Low)
assert_eq!(chip.get_output(2), Low);

Re-exports

pub use logic_level::LogicLevel;

pub use chips::Chip;

pub use chips::PinType;

pub use gates::Gate;

pub use circuit::Circuit;

pub use circuit::Connection;

pub use circuit::CircuitError;

Modules

chips

Module defining the available TTL chips.

circuit

A simple circuit simulator using libttl chips.

gates

Defines the basic logic gates and the Gate trait.

logic_level

Defines the logic levels used in the TTL simulation.