Expand description
ASIC place-and-route framework.
This crate contains interface definitions for place-and-route related algorithms.
The core idea of the framework is to enable independent development of place & route engines which then can easily be plugged together.
§Overview
Incomplete overview:
place- interfaces for placement engines and representations of placement problemsrebuffer- interface for buffer insertion enginesroute- interfaces for routing enginestiming_analysis- interfaces for static timing-analysis (STA) enginesutil- useful functions which don’t yet have their own category
Re-exports§
pub use libreda_db;
Modules§
- db
- The
preludehelps to import most commonly used modules. - design
- A
Designstructure collects information necessary for the place and route steps. This includes the netlist and layout, properties of cell instances, etc. BetweenDesignstructures and place & route engines lies an abstraction layer made by traits such asPlacementProblem. - legalize
- Interface definitions for legalization engines (also known as detail placement).
- metrics
- Metrics and statistics for evaluating placement & routing quality.
- place
- Interface definitions for placement related algorithms.
- rebuffer
- Trait definitions for re-buffering of high-fanout nets. This includes clock-tree and buffer-tree generators.
- route
- Interface definitions for routing related algorithms.
- timing_
analysis - Interfaces for timing analysis engines.
- util
- Collection of utility functions.