1use serde::Serialize;
6
7use crate::execution::LogicalQubit;
8
9pub(crate) mod su2;
10pub(crate) mod u2;
11pub(crate) mod util;
12pub(crate) mod x;
13
14#[derive(Debug, Clone, Copy, PartialEq, Eq, Serialize, Hash)]
15pub enum AuxMode {
16 Clean,
17 Dirty,
18}
19
20#[derive(Debug, Clone, Copy, PartialEq, Eq, Serialize, Default, Hash)]
21pub enum Algorithm {
22 VChain(AuxMode),
23 SingleAux(AuxMode),
24 #[default]
25 LinearDepth,
26 Network,
27 SU2,
28 SU2Rewrite,
29 Optimal,
30 CU2,
31}
32
33impl std::fmt::Display for Algorithm {
34 fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
35 write!(f, "{:?}", self)
36 }
37}
38
39#[derive(Debug, Clone, Default)]
40pub(crate) struct Schema {
41 pub algorithm: Algorithm,
42 pub aux_qubits: Option<Vec<LogicalQubit>>,
43}
44
45#[derive(Debug, Clone, Default)]
46pub(crate) enum State {
47 #[default]
48 Begin,
49 End,
50}
51
52#[derive(Debug, Clone, Default)]
53pub(crate) struct Registry {
54 pub algorithm: Algorithm,
55 pub aux_qubits: Option<Vec<LogicalQubit>>,
56 pub interacting_qubits: Option<Vec<LogicalQubit>>,
57 pub state: State,
58 pub num_u4: usize,
59}
60
61impl Algorithm {
62 pub fn aux_needed(&self, control_size: usize) -> usize {
63 match self {
64 Algorithm::VChain(_) => control_size - 2,
65 Algorithm::SingleAux(_) => 1,
66 Algorithm::LinearDepth => 0,
67 Algorithm::Network => control_size - 1,
68 Algorithm::SU2 => 0,
69 Algorithm::SU2Rewrite => 1,
70 Algorithm::Optimal => 0,
71 Algorithm::CU2 => 0,
72 }
73 }
74
75 pub fn aux_mode(&self) -> AuxMode {
76 match self {
77 Algorithm::VChain(mode) => *mode,
78 Algorithm::SingleAux(mode) => *mode,
79 _ => AuxMode::Clean,
80 }
81 }
82
83 pub fn need_aux(&self) -> bool {
84 self.aux_needed(100) > 0
85 }
86}