Expand description
§libcpuid_dump
This library is extracted from Umio-Yasuno/cpuid_dump_rs.
If you need an advanced and useful library for CPU information that can also check featureflags, I would recommend gz/rust-cpuid.
§Reference
§CPUID
Modules§
Macros§
Structs§
- Address
Size - Physical/Virtual Addresses size (bit) available from
CPUID.(EAX=8000_0008h):EAX
- AmdExt
Topo - AMD Extended Topology, available from
CPUID.(EAX=8000_0026h, ECX=n)
- AmdProc
Topo - Information available from
CPUID.(EAX=8000_001Eh)
, AMD CPU only - AmdSize
Id - Information available from
CPUID.(EAX=8000_0001h)
, AMD CPU only - Cache
Prop - CPU cache information
- Cache
Prop Count - FamMod
Step - Family/Model/Stepping
- Hybrid
Info - Information of the Intel hybrid architecture, available from
CPUID.(EAX=1Ah):EAX
- Info01h
- Information available from
CPUID.(EAX=01h):EBX
- Intel
ExtTopo - Intel Extended Topology, available from
CPUID.(EAX=0Bh, ECX=n)
orCPUID.(EAX=1Fh, ECX=n)
- Intel
TlbParam - Monitor
Mwait - Information available from
CPUID.(EAX=05h)
- Proc
Info - Codename, Micro-architecture, Stepping, ProcessNode
- Proc
Name - Processor name
- Tlb
- TlbInfo
- Topo
Cache Info - TopoId
- Topology ID (SMT, Core, Pkg, X2APIC)
- Topo
Part Info - Vendor
Enums§
- AmdCodename
- List of AMD CPU (SoC) codenmaes
- AmdCore
Type - Used for AmdExtTopo
- AmdMicro
Arch - List of AMD micro-architectures
- AmdNative
Model Id - Used for AmdExtTopo
- AmdPkg
Type - Information available from
CPUID.(EAX=8000_0001h)
, AMD CPU only - AmdTopo
Level Type - Used for AmdExtTopo
- Cache
Type - CPU cache type
- CpuCodename
- CPU (SoC) codenames by vendor
- CpuMicro
Arch - CPU micro-architectures by vendor
- CpuStepping
- Stepping information (A0, A1, B0 …)
- CpuVendor
- List of x86_64 CPU vendors
- Hybrid
Core Type - Used for HybridInfo. The core-type within the Intel hybrid architecture.
- Intel
Codename - List of Intel CPU (SoC) codenmaes
- Intel
Micro Arch - List of Intel micro-architectures
- Intel
Native Model Id - The micro-arhitecture within the Inel hybrid architecture.
It is determined from
CPUID.(EAX=1Ah):EAX
. - Intel
TlbType - Micro
Arch Level - Micro-architecture level defined by the x86-64 psABI
- Process
Node - TlbAssoc
- TlbType
- Topo
Level Type - Used for IntelExtTopo
- Unit
- Used for CacheProp
- Zhaoxin
Codename - List of Zhaoxin CPU (SoC) codenmaes
- Zhaoxin
Micro Arch - List of Zhaoxin micro-architectures