Crate libcpuid_dump

Source
Expand description

Modules§

util

Macros§

cpuid
initial_apic_id
max_apic_id

Structs§

AddressSize
Physical/Virtual Addresses size (bit) available from CPUID.(EAX=8000_0008h):EAX
AmdExtTopo
AMD Extended Topology, available from CPUID.(EAX=8000_0026h, ECX=n)
AmdProcTopo
Information available from CPUID.(EAX=8000_001Eh), AMD CPU only
AmdSizeId
Information available from CPUID.(EAX=8000_0001h), AMD CPU only
CacheProp
CPU cache information
CachePropCount
FamModStep
Family/Model/Stepping
HybridInfo
Information of the Intel hybrid architecture, available from CPUID.(EAX=1Ah):EAX
Info01h
Information available from CPUID.(EAX=01h):EBX
IntelExtTopo
Intel Extended Topology, available from CPUID.(EAX=0Bh, ECX=n) or CPUID.(EAX=1Fh, ECX=n)
IntelTlbParam
MonitorMwait
Information available from CPUID.(EAX=05h)
ProcInfo
Codename, Micro-architecture, Stepping, ProcessNode
ProcName
Processor name
Tlb
TlbInfo
TopoCacheInfo
TopoId
Topology ID (SMT, Core, Pkg, X2APIC)
TopoPartInfo
Vendor

Enums§

AmdCodename
List of AMD CPU (SoC) codenmaes
AmdCoreType
Used for AmdExtTopo
AmdMicroArch
List of AMD micro-architectures
AmdNativeModelId
Used for AmdExtTopo
AmdPkgType
Information available from CPUID.(EAX=8000_0001h), AMD CPU only
AmdTopoLevelType
Used for AmdExtTopo
CacheType
CPU cache type
CpuCodename
CPU (SoC) codenames by vendor
CpuMicroArch
CPU micro-architectures by vendor
CpuStepping
Stepping information (A0, A1, B0 …)
CpuVendor
List of x86_64 CPU vendors
HybridCoreType
Used for HybridInfo. The core-type within the Intel hybrid architecture.
IntelCodename
List of Intel CPU (SoC) codenmaes
IntelMicroArch
List of Intel micro-architectures
IntelNativeModelId
The micro-arhitecture within the Inel hybrid architecture. It is determined from CPUID.(EAX=1Ah):EAX.
IntelTlbType
MicroArchLevel
Micro-architecture level defined by the x86-64 psABI
ProcessNode
TlbAssoc
TlbType
TopoLevelType
Used for IntelExtTopo
Unit
Used for CacheProp
ZhaoxinCodename
List of Zhaoxin CPU (SoC) codenmaes
ZhaoxinMicroArch
List of Zhaoxin micro-architectures