Crate kime_cpu 

The CPU backend. FP32 reference kernels first, because every other backend is tested against them, then INT8 kernels for AVX2, AVX-512 VNNI, AMX and NEON i8mm. See spec/10-cpu.md.

One of the six crates where unsafe is allowed. Every block carries a // SAFETY: comment that names the invariant which makes it sound.

Re-exports

pub use compat::Compat;

pub use compat::Input;

pub use compat::Output;

pub use compat::executor;

pub use compat::executor_from;

pub use plan::CpuBackend;

pub use plan::CpuPlan;

Modules

attention

Multi head self attention over a batch of sequences packed end to end.

compat

The Laya compat graph on the reference kernels: ModernBERT or mmBERT, the type embedding, the two layer decision head, the option scorer and the act head, as DecisionModel.forward in Laya 0.3.7 runs them in FP32.

gemm

FP32 matrix products in the layout of a PyTorch Linear: y = x wᵀ + b, with x as [m, k] and w as [n, k], both row major.

ops

The elementwise and per row ops of the compat graph, in FP32.

par

Splitting work across threads.

plan

The CPU backend: graphs lowered to a list of steps over one arena, run on a persistent pool.

pool

A pool of worker threads that lives as long as the backend, from spec/10-cpu.md.