1#[doc = r" Value read from the register"]
2pub struct R {
3 bits: u8,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7 bits: u8,
8}
9impl super::IR {
10 #[doc = r" Modifies the contents of the register"]
11 #[inline]
12 pub fn modify<F>(&self, f: F)
13 where
14 for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15 {
16 let bits = self.register.get();
17 let r = R { bits: bits };
18 let mut w = W { bits: bits };
19 f(&r, &mut w);
20 self.register.set(w.bits);
21 }
22 #[doc = r" Reads the contents of the register"]
23 #[inline]
24 pub fn read(&self) -> R {
25 R {
26 bits: self.register.get(),
27 }
28 }
29 #[doc = r" Writes to the register"]
30 #[inline]
31 pub fn write<F>(&self, f: F)
32 where
33 F: FnOnce(&mut W) -> &mut W,
34 {
35 let mut w = W::reset_value();
36 f(&mut w);
37 self.register.set(w.bits);
38 }
39 #[doc = r" Writes the reset value to the register"]
40 #[inline]
41 pub fn reset(&self) {
42 self.write(|w| w)
43 }
44}
45#[doc = "Possible values of the field `TNP`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum TNPR {
48 #[doc = "3/16."]
49 _00,
50 #[doc = "1/16."]
51 _01,
52 #[doc = "1/32."]
53 _10,
54 #[doc = "1/4."]
55 _11,
56}
57impl TNPR {
58 #[doc = r" Value of the field as raw bits"]
59 #[inline]
60 pub fn bits(&self) -> u8 {
61 match *self {
62 TNPR::_00 => 0,
63 TNPR::_01 => 1,
64 TNPR::_10 => 2,
65 TNPR::_11 => 3,
66 }
67 }
68 #[allow(missing_docs)]
69 #[doc(hidden)]
70 #[inline]
71 pub fn _from(value: u8) -> TNPR {
72 match value {
73 0 => TNPR::_00,
74 1 => TNPR::_01,
75 2 => TNPR::_10,
76 3 => TNPR::_11,
77 _ => unreachable!(),
78 }
79 }
80 #[doc = "Checks if the value of the field is `_00`"]
81 #[inline]
82 pub fn is_00(&self) -> bool {
83 *self == TNPR::_00
84 }
85 #[doc = "Checks if the value of the field is `_01`"]
86 #[inline]
87 pub fn is_01(&self) -> bool {
88 *self == TNPR::_01
89 }
90 #[doc = "Checks if the value of the field is `_10`"]
91 #[inline]
92 pub fn is_10(&self) -> bool {
93 *self == TNPR::_10
94 }
95 #[doc = "Checks if the value of the field is `_11`"]
96 #[inline]
97 pub fn is_11(&self) -> bool {
98 *self == TNPR::_11
99 }
100}
101#[doc = "Possible values of the field `IREN`"]
102#[derive(Clone, Copy, Debug, PartialEq)]
103pub enum IRENR {
104 #[doc = "IR disabled."]
105 _0,
106 #[doc = "IR enabled."]
107 _1,
108}
109impl IRENR {
110 #[doc = r" Returns `true` if the bit is clear (0)"]
111 #[inline]
112 pub fn bit_is_clear(&self) -> bool {
113 !self.bit()
114 }
115 #[doc = r" Returns `true` if the bit is set (1)"]
116 #[inline]
117 pub fn bit_is_set(&self) -> bool {
118 self.bit()
119 }
120 #[doc = r" Value of the field as raw bits"]
121 #[inline]
122 pub fn bit(&self) -> bool {
123 match *self {
124 IRENR::_0 => false,
125 IRENR::_1 => true,
126 }
127 }
128 #[allow(missing_docs)]
129 #[doc(hidden)]
130 #[inline]
131 pub fn _from(value: bool) -> IRENR {
132 match value {
133 false => IRENR::_0,
134 true => IRENR::_1,
135 }
136 }
137 #[doc = "Checks if the value of the field is `_0`"]
138 #[inline]
139 pub fn is_0(&self) -> bool {
140 *self == IRENR::_0
141 }
142 #[doc = "Checks if the value of the field is `_1`"]
143 #[inline]
144 pub fn is_1(&self) -> bool {
145 *self == IRENR::_1
146 }
147}
148#[doc = "Values that can be written to the field `TNP`"]
149pub enum TNPW {
150 #[doc = "3/16."]
151 _00,
152 #[doc = "1/16."]
153 _01,
154 #[doc = "1/32."]
155 _10,
156 #[doc = "1/4."]
157 _11,
158}
159impl TNPW {
160 #[allow(missing_docs)]
161 #[doc(hidden)]
162 #[inline]
163 pub fn _bits(&self) -> u8 {
164 match *self {
165 TNPW::_00 => 0,
166 TNPW::_01 => 1,
167 TNPW::_10 => 2,
168 TNPW::_11 => 3,
169 }
170 }
171}
172#[doc = r" Proxy"]
173pub struct _TNPW<'a> {
174 w: &'a mut W,
175}
176impl<'a> _TNPW<'a> {
177 #[doc = r" Writes `variant` to the field"]
178 #[inline]
179 pub fn variant(self, variant: TNPW) -> &'a mut W {
180 {
181 self.bits(variant._bits())
182 }
183 }
184 #[doc = "3/16."]
185 #[inline]
186 pub fn _00(self) -> &'a mut W {
187 self.variant(TNPW::_00)
188 }
189 #[doc = "1/16."]
190 #[inline]
191 pub fn _01(self) -> &'a mut W {
192 self.variant(TNPW::_01)
193 }
194 #[doc = "1/32."]
195 #[inline]
196 pub fn _10(self) -> &'a mut W {
197 self.variant(TNPW::_10)
198 }
199 #[doc = "1/4."]
200 #[inline]
201 pub fn _11(self) -> &'a mut W {
202 self.variant(TNPW::_11)
203 }
204 #[doc = r" Writes raw bits to the field"]
205 #[inline]
206 pub fn bits(self, value: u8) -> &'a mut W {
207 const MASK: u8 = 3;
208 const OFFSET: u8 = 0;
209 self.w.bits &= !((MASK as u8) << OFFSET);
210 self.w.bits |= ((value & MASK) as u8) << OFFSET;
211 self.w
212 }
213}
214#[doc = "Values that can be written to the field `IREN`"]
215pub enum IRENW {
216 #[doc = "IR disabled."]
217 _0,
218 #[doc = "IR enabled."]
219 _1,
220}
221impl IRENW {
222 #[allow(missing_docs)]
223 #[doc(hidden)]
224 #[inline]
225 pub fn _bits(&self) -> bool {
226 match *self {
227 IRENW::_0 => false,
228 IRENW::_1 => true,
229 }
230 }
231}
232#[doc = r" Proxy"]
233pub struct _IRENW<'a> {
234 w: &'a mut W,
235}
236impl<'a> _IRENW<'a> {
237 #[doc = r" Writes `variant` to the field"]
238 #[inline]
239 pub fn variant(self, variant: IRENW) -> &'a mut W {
240 {
241 self.bit(variant._bits())
242 }
243 }
244 #[doc = "IR disabled."]
245 #[inline]
246 pub fn _0(self) -> &'a mut W {
247 self.variant(IRENW::_0)
248 }
249 #[doc = "IR enabled."]
250 #[inline]
251 pub fn _1(self) -> &'a mut W {
252 self.variant(IRENW::_1)
253 }
254 #[doc = r" Sets the field bit"]
255 pub fn set_bit(self) -> &'a mut W {
256 self.bit(true)
257 }
258 #[doc = r" Clears the field bit"]
259 pub fn clear_bit(self) -> &'a mut W {
260 self.bit(false)
261 }
262 #[doc = r" Writes raw bits to the field"]
263 #[inline]
264 pub fn bit(self, value: bool) -> &'a mut W {
265 const MASK: bool = true;
266 const OFFSET: u8 = 2;
267 self.w.bits &= !((MASK as u8) << OFFSET);
268 self.w.bits |= ((value & MASK) as u8) << OFFSET;
269 self.w
270 }
271}
272impl R {
273 #[doc = r" Value of the register as raw bits"]
274 #[inline]
275 pub fn bits(&self) -> u8 {
276 self.bits
277 }
278 #[doc = "Bits 0:1 - Transmitter narrow pulse"]
279 #[inline]
280 pub fn tnp(&self) -> TNPR {
281 TNPR::_from({
282 const MASK: u8 = 3;
283 const OFFSET: u8 = 0;
284 ((self.bits >> OFFSET) & MASK as u8) as u8
285 })
286 }
287 #[doc = "Bit 2 - Infrared enable"]
288 #[inline]
289 pub fn iren(&self) -> IRENR {
290 IRENR::_from({
291 const MASK: bool = true;
292 const OFFSET: u8 = 2;
293 ((self.bits >> OFFSET) & MASK as u8) != 0
294 })
295 }
296}
297impl W {
298 #[doc = r" Reset value of the register"]
299 #[inline]
300 pub fn reset_value() -> W {
301 W { bits: 0 }
302 }
303 #[doc = r" Writes raw bits to the register"]
304 #[inline]
305 pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
306 self.bits = bits;
307 self
308 }
309 #[doc = "Bits 0:1 - Transmitter narrow pulse"]
310 #[inline]
311 pub fn tnp(&mut self) -> _TNPW {
312 _TNPW { w: self }
313 }
314 #[doc = "Bit 2 - Infrared enable"]
315 #[inline]
316 pub fn iren(&mut self) -> _IRENW {
317 _IRENW { w: self }
318 }
319}