k64/ftm3/
csc.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::CSC {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = "Possible values of the field `DMA`"]
46#[derive(Clone, Copy, Debug, PartialEq)]
47pub enum DMAR {
48    #[doc = "Disable DMA transfers."]
49    _0,
50    #[doc = "Enable DMA transfers."]
51    _1,
52}
53impl DMAR {
54    #[doc = r" Returns `true` if the bit is clear (0)"]
55    #[inline]
56    pub fn bit_is_clear(&self) -> bool {
57        !self.bit()
58    }
59    #[doc = r" Returns `true` if the bit is set (1)"]
60    #[inline]
61    pub fn bit_is_set(&self) -> bool {
62        self.bit()
63    }
64    #[doc = r" Value of the field as raw bits"]
65    #[inline]
66    pub fn bit(&self) -> bool {
67        match *self {
68            DMAR::_0 => false,
69            DMAR::_1 => true,
70        }
71    }
72    #[allow(missing_docs)]
73    #[doc(hidden)]
74    #[inline]
75    pub fn _from(value: bool) -> DMAR {
76        match value {
77            false => DMAR::_0,
78            true => DMAR::_1,
79        }
80    }
81    #[doc = "Checks if the value of the field is `_0`"]
82    #[inline]
83    pub fn is_0(&self) -> bool {
84        *self == DMAR::_0
85    }
86    #[doc = "Checks if the value of the field is `_1`"]
87    #[inline]
88    pub fn is_1(&self) -> bool {
89        *self == DMAR::_1
90    }
91}
92#[doc = r" Value of the field"]
93pub struct ELSAR {
94    bits: bool,
95}
96impl ELSAR {
97    #[doc = r" Value of the field as raw bits"]
98    #[inline]
99    pub fn bit(&self) -> bool {
100        self.bits
101    }
102    #[doc = r" Returns `true` if the bit is clear (0)"]
103    #[inline]
104    pub fn bit_is_clear(&self) -> bool {
105        !self.bit()
106    }
107    #[doc = r" Returns `true` if the bit is set (1)"]
108    #[inline]
109    pub fn bit_is_set(&self) -> bool {
110        self.bit()
111    }
112}
113#[doc = r" Value of the field"]
114pub struct ELSBR {
115    bits: bool,
116}
117impl ELSBR {
118    #[doc = r" Value of the field as raw bits"]
119    #[inline]
120    pub fn bit(&self) -> bool {
121        self.bits
122    }
123    #[doc = r" Returns `true` if the bit is clear (0)"]
124    #[inline]
125    pub fn bit_is_clear(&self) -> bool {
126        !self.bit()
127    }
128    #[doc = r" Returns `true` if the bit is set (1)"]
129    #[inline]
130    pub fn bit_is_set(&self) -> bool {
131        self.bit()
132    }
133}
134#[doc = r" Value of the field"]
135pub struct MSAR {
136    bits: bool,
137}
138impl MSAR {
139    #[doc = r" Value of the field as raw bits"]
140    #[inline]
141    pub fn bit(&self) -> bool {
142        self.bits
143    }
144    #[doc = r" Returns `true` if the bit is clear (0)"]
145    #[inline]
146    pub fn bit_is_clear(&self) -> bool {
147        !self.bit()
148    }
149    #[doc = r" Returns `true` if the bit is set (1)"]
150    #[inline]
151    pub fn bit_is_set(&self) -> bool {
152        self.bit()
153    }
154}
155#[doc = r" Value of the field"]
156pub struct MSBR {
157    bits: bool,
158}
159impl MSBR {
160    #[doc = r" Value of the field as raw bits"]
161    #[inline]
162    pub fn bit(&self) -> bool {
163        self.bits
164    }
165    #[doc = r" Returns `true` if the bit is clear (0)"]
166    #[inline]
167    pub fn bit_is_clear(&self) -> bool {
168        !self.bit()
169    }
170    #[doc = r" Returns `true` if the bit is set (1)"]
171    #[inline]
172    pub fn bit_is_set(&self) -> bool {
173        self.bit()
174    }
175}
176#[doc = "Possible values of the field `CHIE`"]
177#[derive(Clone, Copy, Debug, PartialEq)]
178pub enum CHIER {
179    #[doc = "Disable channel interrupts. Use software polling."]
180    _0,
181    #[doc = "Enable channel interrupts."]
182    _1,
183}
184impl CHIER {
185    #[doc = r" Returns `true` if the bit is clear (0)"]
186    #[inline]
187    pub fn bit_is_clear(&self) -> bool {
188        !self.bit()
189    }
190    #[doc = r" Returns `true` if the bit is set (1)"]
191    #[inline]
192    pub fn bit_is_set(&self) -> bool {
193        self.bit()
194    }
195    #[doc = r" Value of the field as raw bits"]
196    #[inline]
197    pub fn bit(&self) -> bool {
198        match *self {
199            CHIER::_0 => false,
200            CHIER::_1 => true,
201        }
202    }
203    #[allow(missing_docs)]
204    #[doc(hidden)]
205    #[inline]
206    pub fn _from(value: bool) -> CHIER {
207        match value {
208            false => CHIER::_0,
209            true => CHIER::_1,
210        }
211    }
212    #[doc = "Checks if the value of the field is `_0`"]
213    #[inline]
214    pub fn is_0(&self) -> bool {
215        *self == CHIER::_0
216    }
217    #[doc = "Checks if the value of the field is `_1`"]
218    #[inline]
219    pub fn is_1(&self) -> bool {
220        *self == CHIER::_1
221    }
222}
223#[doc = "Possible values of the field `CHF`"]
224#[derive(Clone, Copy, Debug, PartialEq)]
225pub enum CHFR {
226    #[doc = "No channel event has occurred."]
227    _0,
228    #[doc = "A channel event has occurred."]
229    _1,
230}
231impl CHFR {
232    #[doc = r" Returns `true` if the bit is clear (0)"]
233    #[inline]
234    pub fn bit_is_clear(&self) -> bool {
235        !self.bit()
236    }
237    #[doc = r" Returns `true` if the bit is set (1)"]
238    #[inline]
239    pub fn bit_is_set(&self) -> bool {
240        self.bit()
241    }
242    #[doc = r" Value of the field as raw bits"]
243    #[inline]
244    pub fn bit(&self) -> bool {
245        match *self {
246            CHFR::_0 => false,
247            CHFR::_1 => true,
248        }
249    }
250    #[allow(missing_docs)]
251    #[doc(hidden)]
252    #[inline]
253    pub fn _from(value: bool) -> CHFR {
254        match value {
255            false => CHFR::_0,
256            true => CHFR::_1,
257        }
258    }
259    #[doc = "Checks if the value of the field is `_0`"]
260    #[inline]
261    pub fn is_0(&self) -> bool {
262        *self == CHFR::_0
263    }
264    #[doc = "Checks if the value of the field is `_1`"]
265    #[inline]
266    pub fn is_1(&self) -> bool {
267        *self == CHFR::_1
268    }
269}
270#[doc = "Values that can be written to the field `DMA`"]
271pub enum DMAW {
272    #[doc = "Disable DMA transfers."]
273    _0,
274    #[doc = "Enable DMA transfers."]
275    _1,
276}
277impl DMAW {
278    #[allow(missing_docs)]
279    #[doc(hidden)]
280    #[inline]
281    pub fn _bits(&self) -> bool {
282        match *self {
283            DMAW::_0 => false,
284            DMAW::_1 => true,
285        }
286    }
287}
288#[doc = r" Proxy"]
289pub struct _DMAW<'a> {
290    w: &'a mut W,
291}
292impl<'a> _DMAW<'a> {
293    #[doc = r" Writes `variant` to the field"]
294    #[inline]
295    pub fn variant(self, variant: DMAW) -> &'a mut W {
296        {
297            self.bit(variant._bits())
298        }
299    }
300    #[doc = "Disable DMA transfers."]
301    #[inline]
302    pub fn _0(self) -> &'a mut W {
303        self.variant(DMAW::_0)
304    }
305    #[doc = "Enable DMA transfers."]
306    #[inline]
307    pub fn _1(self) -> &'a mut W {
308        self.variant(DMAW::_1)
309    }
310    #[doc = r" Sets the field bit"]
311    pub fn set_bit(self) -> &'a mut W {
312        self.bit(true)
313    }
314    #[doc = r" Clears the field bit"]
315    pub fn clear_bit(self) -> &'a mut W {
316        self.bit(false)
317    }
318    #[doc = r" Writes raw bits to the field"]
319    #[inline]
320    pub fn bit(self, value: bool) -> &'a mut W {
321        const MASK: bool = true;
322        const OFFSET: u8 = 0;
323        self.w.bits &= !((MASK as u32) << OFFSET);
324        self.w.bits |= ((value & MASK) as u32) << OFFSET;
325        self.w
326    }
327}
328#[doc = r" Proxy"]
329pub struct _ELSAW<'a> {
330    w: &'a mut W,
331}
332impl<'a> _ELSAW<'a> {
333    #[doc = r" Sets the field bit"]
334    pub fn set_bit(self) -> &'a mut W {
335        self.bit(true)
336    }
337    #[doc = r" Clears the field bit"]
338    pub fn clear_bit(self) -> &'a mut W {
339        self.bit(false)
340    }
341    #[doc = r" Writes raw bits to the field"]
342    #[inline]
343    pub fn bit(self, value: bool) -> &'a mut W {
344        const MASK: bool = true;
345        const OFFSET: u8 = 2;
346        self.w.bits &= !((MASK as u32) << OFFSET);
347        self.w.bits |= ((value & MASK) as u32) << OFFSET;
348        self.w
349    }
350}
351#[doc = r" Proxy"]
352pub struct _ELSBW<'a> {
353    w: &'a mut W,
354}
355impl<'a> _ELSBW<'a> {
356    #[doc = r" Sets the field bit"]
357    pub fn set_bit(self) -> &'a mut W {
358        self.bit(true)
359    }
360    #[doc = r" Clears the field bit"]
361    pub fn clear_bit(self) -> &'a mut W {
362        self.bit(false)
363    }
364    #[doc = r" Writes raw bits to the field"]
365    #[inline]
366    pub fn bit(self, value: bool) -> &'a mut W {
367        const MASK: bool = true;
368        const OFFSET: u8 = 3;
369        self.w.bits &= !((MASK as u32) << OFFSET);
370        self.w.bits |= ((value & MASK) as u32) << OFFSET;
371        self.w
372    }
373}
374#[doc = r" Proxy"]
375pub struct _MSAW<'a> {
376    w: &'a mut W,
377}
378impl<'a> _MSAW<'a> {
379    #[doc = r" Sets the field bit"]
380    pub fn set_bit(self) -> &'a mut W {
381        self.bit(true)
382    }
383    #[doc = r" Clears the field bit"]
384    pub fn clear_bit(self) -> &'a mut W {
385        self.bit(false)
386    }
387    #[doc = r" Writes raw bits to the field"]
388    #[inline]
389    pub fn bit(self, value: bool) -> &'a mut W {
390        const MASK: bool = true;
391        const OFFSET: u8 = 4;
392        self.w.bits &= !((MASK as u32) << OFFSET);
393        self.w.bits |= ((value & MASK) as u32) << OFFSET;
394        self.w
395    }
396}
397#[doc = r" Proxy"]
398pub struct _MSBW<'a> {
399    w: &'a mut W,
400}
401impl<'a> _MSBW<'a> {
402    #[doc = r" Sets the field bit"]
403    pub fn set_bit(self) -> &'a mut W {
404        self.bit(true)
405    }
406    #[doc = r" Clears the field bit"]
407    pub fn clear_bit(self) -> &'a mut W {
408        self.bit(false)
409    }
410    #[doc = r" Writes raw bits to the field"]
411    #[inline]
412    pub fn bit(self, value: bool) -> &'a mut W {
413        const MASK: bool = true;
414        const OFFSET: u8 = 5;
415        self.w.bits &= !((MASK as u32) << OFFSET);
416        self.w.bits |= ((value & MASK) as u32) << OFFSET;
417        self.w
418    }
419}
420#[doc = "Values that can be written to the field `CHIE`"]
421pub enum CHIEW {
422    #[doc = "Disable channel interrupts. Use software polling."]
423    _0,
424    #[doc = "Enable channel interrupts."]
425    _1,
426}
427impl CHIEW {
428    #[allow(missing_docs)]
429    #[doc(hidden)]
430    #[inline]
431    pub fn _bits(&self) -> bool {
432        match *self {
433            CHIEW::_0 => false,
434            CHIEW::_1 => true,
435        }
436    }
437}
438#[doc = r" Proxy"]
439pub struct _CHIEW<'a> {
440    w: &'a mut W,
441}
442impl<'a> _CHIEW<'a> {
443    #[doc = r" Writes `variant` to the field"]
444    #[inline]
445    pub fn variant(self, variant: CHIEW) -> &'a mut W {
446        {
447            self.bit(variant._bits())
448        }
449    }
450    #[doc = "Disable channel interrupts. Use software polling."]
451    #[inline]
452    pub fn _0(self) -> &'a mut W {
453        self.variant(CHIEW::_0)
454    }
455    #[doc = "Enable channel interrupts."]
456    #[inline]
457    pub fn _1(self) -> &'a mut W {
458        self.variant(CHIEW::_1)
459    }
460    #[doc = r" Sets the field bit"]
461    pub fn set_bit(self) -> &'a mut W {
462        self.bit(true)
463    }
464    #[doc = r" Clears the field bit"]
465    pub fn clear_bit(self) -> &'a mut W {
466        self.bit(false)
467    }
468    #[doc = r" Writes raw bits to the field"]
469    #[inline]
470    pub fn bit(self, value: bool) -> &'a mut W {
471        const MASK: bool = true;
472        const OFFSET: u8 = 6;
473        self.w.bits &= !((MASK as u32) << OFFSET);
474        self.w.bits |= ((value & MASK) as u32) << OFFSET;
475        self.w
476    }
477}
478#[doc = "Values that can be written to the field `CHF`"]
479pub enum CHFW {
480    #[doc = "No channel event has occurred."]
481    _0,
482    #[doc = "A channel event has occurred."]
483    _1,
484}
485impl CHFW {
486    #[allow(missing_docs)]
487    #[doc(hidden)]
488    #[inline]
489    pub fn _bits(&self) -> bool {
490        match *self {
491            CHFW::_0 => false,
492            CHFW::_1 => true,
493        }
494    }
495}
496#[doc = r" Proxy"]
497pub struct _CHFW<'a> {
498    w: &'a mut W,
499}
500impl<'a> _CHFW<'a> {
501    #[doc = r" Writes `variant` to the field"]
502    #[inline]
503    pub fn variant(self, variant: CHFW) -> &'a mut W {
504        {
505            self.bit(variant._bits())
506        }
507    }
508    #[doc = "No channel event has occurred."]
509    #[inline]
510    pub fn _0(self) -> &'a mut W {
511        self.variant(CHFW::_0)
512    }
513    #[doc = "A channel event has occurred."]
514    #[inline]
515    pub fn _1(self) -> &'a mut W {
516        self.variant(CHFW::_1)
517    }
518    #[doc = r" Sets the field bit"]
519    pub fn set_bit(self) -> &'a mut W {
520        self.bit(true)
521    }
522    #[doc = r" Clears the field bit"]
523    pub fn clear_bit(self) -> &'a mut W {
524        self.bit(false)
525    }
526    #[doc = r" Writes raw bits to the field"]
527    #[inline]
528    pub fn bit(self, value: bool) -> &'a mut W {
529        const MASK: bool = true;
530        const OFFSET: u8 = 7;
531        self.w.bits &= !((MASK as u32) << OFFSET);
532        self.w.bits |= ((value & MASK) as u32) << OFFSET;
533        self.w
534    }
535}
536impl R {
537    #[doc = r" Value of the register as raw bits"]
538    #[inline]
539    pub fn bits(&self) -> u32 {
540        self.bits
541    }
542    #[doc = "Bit 0 - DMA Enable"]
543    #[inline]
544    pub fn dma(&self) -> DMAR {
545        DMAR::_from({
546            const MASK: bool = true;
547            const OFFSET: u8 = 0;
548            ((self.bits >> OFFSET) & MASK as u32) != 0
549        })
550    }
551    #[doc = "Bit 2 - Edge or Level Select"]
552    #[inline]
553    pub fn elsa(&self) -> ELSAR {
554        let bits = {
555            const MASK: bool = true;
556            const OFFSET: u8 = 2;
557            ((self.bits >> OFFSET) & MASK as u32) != 0
558        };
559        ELSAR { bits }
560    }
561    #[doc = "Bit 3 - Edge or Level Select"]
562    #[inline]
563    pub fn elsb(&self) -> ELSBR {
564        let bits = {
565            const MASK: bool = true;
566            const OFFSET: u8 = 3;
567            ((self.bits >> OFFSET) & MASK as u32) != 0
568        };
569        ELSBR { bits }
570    }
571    #[doc = "Bit 4 - Channel Mode Select"]
572    #[inline]
573    pub fn msa(&self) -> MSAR {
574        let bits = {
575            const MASK: bool = true;
576            const OFFSET: u8 = 4;
577            ((self.bits >> OFFSET) & MASK as u32) != 0
578        };
579        MSAR { bits }
580    }
581    #[doc = "Bit 5 - Channel Mode Select"]
582    #[inline]
583    pub fn msb(&self) -> MSBR {
584        let bits = {
585            const MASK: bool = true;
586            const OFFSET: u8 = 5;
587            ((self.bits >> OFFSET) & MASK as u32) != 0
588        };
589        MSBR { bits }
590    }
591    #[doc = "Bit 6 - Channel Interrupt Enable"]
592    #[inline]
593    pub fn chie(&self) -> CHIER {
594        CHIER::_from({
595            const MASK: bool = true;
596            const OFFSET: u8 = 6;
597            ((self.bits >> OFFSET) & MASK as u32) != 0
598        })
599    }
600    #[doc = "Bit 7 - Channel Flag"]
601    #[inline]
602    pub fn chf(&self) -> CHFR {
603        CHFR::_from({
604            const MASK: bool = true;
605            const OFFSET: u8 = 7;
606            ((self.bits >> OFFSET) & MASK as u32) != 0
607        })
608    }
609}
610impl W {
611    #[doc = r" Reset value of the register"]
612    #[inline]
613    pub fn reset_value() -> W {
614        W { bits: 0 }
615    }
616    #[doc = r" Writes raw bits to the register"]
617    #[inline]
618    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
619        self.bits = bits;
620        self
621    }
622    #[doc = "Bit 0 - DMA Enable"]
623    #[inline]
624    pub fn dma(&mut self) -> _DMAW {
625        _DMAW { w: self }
626    }
627    #[doc = "Bit 2 - Edge or Level Select"]
628    #[inline]
629    pub fn elsa(&mut self) -> _ELSAW {
630        _ELSAW { w: self }
631    }
632    #[doc = "Bit 3 - Edge or Level Select"]
633    #[inline]
634    pub fn elsb(&mut self) -> _ELSBW {
635        _ELSBW { w: self }
636    }
637    #[doc = "Bit 4 - Channel Mode Select"]
638    #[inline]
639    pub fn msa(&mut self) -> _MSAW {
640        _MSAW { w: self }
641    }
642    #[doc = "Bit 5 - Channel Mode Select"]
643    #[inline]
644    pub fn msb(&mut self) -> _MSBW {
645        _MSBW { w: self }
646    }
647    #[doc = "Bit 6 - Channel Interrupt Enable"]
648    #[inline]
649    pub fn chie(&mut self) -> _CHIEW {
650        _CHIEW { w: self }
651    }
652    #[doc = "Bit 7 - Channel Flag"]
653    #[inline]
654    pub fn chf(&mut self) -> _CHFW {
655        _CHFW { w: self }
656    }
657}
k64/ftm3/csc.rs

k64/ftm3/
csc.rs
