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Crate k580_core

Crate k580_core 

Source

Re-exports§

pub use bus::NullBus;
pub use bus::PortBus;
pub use decode::InstructionInfo;
pub use decode::decode_opcode;
pub use decode::is_undocumented_opcode;
pub use error::CoreError;
pub use error::DecodeError;
pub use error::PortError;
pub use error::ValidationError;
pub use flags::Flags;
pub use machine_cycle::MachineCycleKind;
pub use machine_cycle::MachineCycleKinds;
pub use machine_cycle::MachineCycleLayout;
pub use machine_cycle::MachineCycleLengths;
pub use machine_cycle::MachineCyclePosition;
pub use machine_cycle::kind_at;
pub use machine_cycle::layout_for;
pub use machine_cycle::position_for;
pub use memory::Memory64K;
pub use registers::RegisterName;
pub use registers::Registers;
pub use state::Cpu8080State;
pub use state::InstructionOutcome;
pub use state::TactOutcome;
pub use timing::InstructionTiming;

Modules§

bus
decode
error
flags
machine_cycle
Machine-cycle / T-phase layout per opcode for the schematic readout. Numbers come from the Intel 8080A Datasheet (“STATES” column and the “Machine Cycle” section). Conditional opcodes carry both taken and not-taken sequences; undocumented opcodes return an empty layout.
memory
registers
state
timing