1#[doc = "Reader of register C1"]
2pub type R = crate::R<u8, super::C1>;
3#[doc = "Writer for register C1"]
4pub type W = crate::W<u8, super::C1>;
5#[doc = "Register C1 `reset()`'s with value 0"]
6impl crate::ResetValue for super::C1 {
7 type Type = u8;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Parity Type\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum PT_A {
16 #[doc = "0: Even parity."]
17 _0 = 0,
18 #[doc = "1: Odd parity."]
19 _1 = 1,
20}
21impl From<PT_A> for bool {
22 #[inline(always)]
23 fn from(variant: PT_A) -> Self {
24 variant as u8 != 0
25 }
26}
27#[doc = "Reader of field `PT`"]
28pub type PT_R = crate::R<bool, PT_A>;
29impl PT_R {
30 #[doc = r"Get enumerated values variant"]
31 #[inline(always)]
32 pub fn variant(&self) -> PT_A {
33 match self.bits {
34 false => PT_A::_0,
35 true => PT_A::_1,
36 }
37 }
38 #[doc = "Checks if the value of the field is `_0`"]
39 #[inline(always)]
40 pub fn is_0(&self) -> bool {
41 *self == PT_A::_0
42 }
43 #[doc = "Checks if the value of the field is `_1`"]
44 #[inline(always)]
45 pub fn is_1(&self) -> bool {
46 *self == PT_A::_1
47 }
48}
49#[doc = "Write proxy for field `PT`"]
50pub struct PT_W<'a> {
51 w: &'a mut W,
52}
53impl<'a> PT_W<'a> {
54 #[doc = r"Writes `variant` to the field"]
55 #[inline(always)]
56 pub fn variant(self, variant: PT_A) -> &'a mut W {
57 {
58 self.bit(variant.into())
59 }
60 }
61 #[doc = "Even parity."]
62 #[inline(always)]
63 pub fn _0(self) -> &'a mut W {
64 self.variant(PT_A::_0)
65 }
66 #[doc = "Odd parity."]
67 #[inline(always)]
68 pub fn _1(self) -> &'a mut W {
69 self.variant(PT_A::_1)
70 }
71 #[doc = r"Sets the field bit"]
72 #[inline(always)]
73 pub fn set_bit(self) -> &'a mut W {
74 self.bit(true)
75 }
76 #[doc = r"Clears the field bit"]
77 #[inline(always)]
78 pub fn clear_bit(self) -> &'a mut W {
79 self.bit(false)
80 }
81 #[doc = r"Writes raw bits to the field"]
82 #[inline(always)]
83 pub fn bit(self, value: bool) -> &'a mut W {
84 self.w.bits = (self.w.bits & !0x01) | ((value as u8) & 0x01);
85 self.w
86 }
87}
88#[doc = "Parity Enable\n\nValue on reset: 0"]
89#[derive(Clone, Copy, Debug, PartialEq)]
90pub enum PE_A {
91 #[doc = "0: Parity function disabled."]
92 _0 = 0,
93 #[doc = "1: Parity function enabled."]
94 _1 = 1,
95}
96impl From<PE_A> for bool {
97 #[inline(always)]
98 fn from(variant: PE_A) -> Self {
99 variant as u8 != 0
100 }
101}
102#[doc = "Reader of field `PE`"]
103pub type PE_R = crate::R<bool, PE_A>;
104impl PE_R {
105 #[doc = r"Get enumerated values variant"]
106 #[inline(always)]
107 pub fn variant(&self) -> PE_A {
108 match self.bits {
109 false => PE_A::_0,
110 true => PE_A::_1,
111 }
112 }
113 #[doc = "Checks if the value of the field is `_0`"]
114 #[inline(always)]
115 pub fn is_0(&self) -> bool {
116 *self == PE_A::_0
117 }
118 #[doc = "Checks if the value of the field is `_1`"]
119 #[inline(always)]
120 pub fn is_1(&self) -> bool {
121 *self == PE_A::_1
122 }
123}
124#[doc = "Write proxy for field `PE`"]
125pub struct PE_W<'a> {
126 w: &'a mut W,
127}
128impl<'a> PE_W<'a> {
129 #[doc = r"Writes `variant` to the field"]
130 #[inline(always)]
131 pub fn variant(self, variant: PE_A) -> &'a mut W {
132 {
133 self.bit(variant.into())
134 }
135 }
136 #[doc = "Parity function disabled."]
137 #[inline(always)]
138 pub fn _0(self) -> &'a mut W {
139 self.variant(PE_A::_0)
140 }
141 #[doc = "Parity function enabled."]
142 #[inline(always)]
143 pub fn _1(self) -> &'a mut W {
144 self.variant(PE_A::_1)
145 }
146 #[doc = r"Sets the field bit"]
147 #[inline(always)]
148 pub fn set_bit(self) -> &'a mut W {
149 self.bit(true)
150 }
151 #[doc = r"Clears the field bit"]
152 #[inline(always)]
153 pub fn clear_bit(self) -> &'a mut W {
154 self.bit(false)
155 }
156 #[doc = r"Writes raw bits to the field"]
157 #[inline(always)]
158 pub fn bit(self, value: bool) -> &'a mut W {
159 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u8) & 0x01) << 1);
160 self.w
161 }
162}
163#[doc = "Idle Line Type Select\n\nValue on reset: 0"]
164#[derive(Clone, Copy, Debug, PartialEq)]
165pub enum ILT_A {
166 #[doc = "0: Idle character bit count starts after start bit."]
167 _0 = 0,
168 #[doc = "1: Idle character bit count starts after stop bit."]
169 _1 = 1,
170}
171impl From<ILT_A> for bool {
172 #[inline(always)]
173 fn from(variant: ILT_A) -> Self {
174 variant as u8 != 0
175 }
176}
177#[doc = "Reader of field `ILT`"]
178pub type ILT_R = crate::R<bool, ILT_A>;
179impl ILT_R {
180 #[doc = r"Get enumerated values variant"]
181 #[inline(always)]
182 pub fn variant(&self) -> ILT_A {
183 match self.bits {
184 false => ILT_A::_0,
185 true => ILT_A::_1,
186 }
187 }
188 #[doc = "Checks if the value of the field is `_0`"]
189 #[inline(always)]
190 pub fn is_0(&self) -> bool {
191 *self == ILT_A::_0
192 }
193 #[doc = "Checks if the value of the field is `_1`"]
194 #[inline(always)]
195 pub fn is_1(&self) -> bool {
196 *self == ILT_A::_1
197 }
198}
199#[doc = "Write proxy for field `ILT`"]
200pub struct ILT_W<'a> {
201 w: &'a mut W,
202}
203impl<'a> ILT_W<'a> {
204 #[doc = r"Writes `variant` to the field"]
205 #[inline(always)]
206 pub fn variant(self, variant: ILT_A) -> &'a mut W {
207 {
208 self.bit(variant.into())
209 }
210 }
211 #[doc = "Idle character bit count starts after start bit."]
212 #[inline(always)]
213 pub fn _0(self) -> &'a mut W {
214 self.variant(ILT_A::_0)
215 }
216 #[doc = "Idle character bit count starts after stop bit."]
217 #[inline(always)]
218 pub fn _1(self) -> &'a mut W {
219 self.variant(ILT_A::_1)
220 }
221 #[doc = r"Sets the field bit"]
222 #[inline(always)]
223 pub fn set_bit(self) -> &'a mut W {
224 self.bit(true)
225 }
226 #[doc = r"Clears the field bit"]
227 #[inline(always)]
228 pub fn clear_bit(self) -> &'a mut W {
229 self.bit(false)
230 }
231 #[doc = r"Writes raw bits to the field"]
232 #[inline(always)]
233 pub fn bit(self, value: bool) -> &'a mut W {
234 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u8) & 0x01) << 2);
235 self.w
236 }
237}
238#[doc = "Receiver Wakeup Method Select\n\nValue on reset: 0"]
239#[derive(Clone, Copy, Debug, PartialEq)]
240pub enum WAKE_A {
241 #[doc = "0: Idle line wakeup."]
242 _0 = 0,
243 #[doc = "1: Address mark wakeup."]
244 _1 = 1,
245}
246impl From<WAKE_A> for bool {
247 #[inline(always)]
248 fn from(variant: WAKE_A) -> Self {
249 variant as u8 != 0
250 }
251}
252#[doc = "Reader of field `WAKE`"]
253pub type WAKE_R = crate::R<bool, WAKE_A>;
254impl WAKE_R {
255 #[doc = r"Get enumerated values variant"]
256 #[inline(always)]
257 pub fn variant(&self) -> WAKE_A {
258 match self.bits {
259 false => WAKE_A::_0,
260 true => WAKE_A::_1,
261 }
262 }
263 #[doc = "Checks if the value of the field is `_0`"]
264 #[inline(always)]
265 pub fn is_0(&self) -> bool {
266 *self == WAKE_A::_0
267 }
268 #[doc = "Checks if the value of the field is `_1`"]
269 #[inline(always)]
270 pub fn is_1(&self) -> bool {
271 *self == WAKE_A::_1
272 }
273}
274#[doc = "Write proxy for field `WAKE`"]
275pub struct WAKE_W<'a> {
276 w: &'a mut W,
277}
278impl<'a> WAKE_W<'a> {
279 #[doc = r"Writes `variant` to the field"]
280 #[inline(always)]
281 pub fn variant(self, variant: WAKE_A) -> &'a mut W {
282 {
283 self.bit(variant.into())
284 }
285 }
286 #[doc = "Idle line wakeup."]
287 #[inline(always)]
288 pub fn _0(self) -> &'a mut W {
289 self.variant(WAKE_A::_0)
290 }
291 #[doc = "Address mark wakeup."]
292 #[inline(always)]
293 pub fn _1(self) -> &'a mut W {
294 self.variant(WAKE_A::_1)
295 }
296 #[doc = r"Sets the field bit"]
297 #[inline(always)]
298 pub fn set_bit(self) -> &'a mut W {
299 self.bit(true)
300 }
301 #[doc = r"Clears the field bit"]
302 #[inline(always)]
303 pub fn clear_bit(self) -> &'a mut W {
304 self.bit(false)
305 }
306 #[doc = r"Writes raw bits to the field"]
307 #[inline(always)]
308 pub fn bit(self, value: bool) -> &'a mut W {
309 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u8) & 0x01) << 3);
310 self.w
311 }
312}
313#[doc = "9-bit or 8-bit Mode Select\n\nValue on reset: 0"]
314#[derive(Clone, Copy, Debug, PartialEq)]
315pub enum M_A {
316 #[doc = "0: Normal-start + 8 data bits (MSB/LSB first as determined by MSBF) + stop."]
317 _0 = 0,
318 #[doc = "1: Use-start + 9 data bits (MSB/LSB first as determined by MSBF) + stop."]
319 _1 = 1,
320}
321impl From<M_A> for bool {
322 #[inline(always)]
323 fn from(variant: M_A) -> Self {
324 variant as u8 != 0
325 }
326}
327#[doc = "Reader of field `M`"]
328pub type M_R = crate::R<bool, M_A>;
329impl M_R {
330 #[doc = r"Get enumerated values variant"]
331 #[inline(always)]
332 pub fn variant(&self) -> M_A {
333 match self.bits {
334 false => M_A::_0,
335 true => M_A::_1,
336 }
337 }
338 #[doc = "Checks if the value of the field is `_0`"]
339 #[inline(always)]
340 pub fn is_0(&self) -> bool {
341 *self == M_A::_0
342 }
343 #[doc = "Checks if the value of the field is `_1`"]
344 #[inline(always)]
345 pub fn is_1(&self) -> bool {
346 *self == M_A::_1
347 }
348}
349#[doc = "Write proxy for field `M`"]
350pub struct M_W<'a> {
351 w: &'a mut W,
352}
353impl<'a> M_W<'a> {
354 #[doc = r"Writes `variant` to the field"]
355 #[inline(always)]
356 pub fn variant(self, variant: M_A) -> &'a mut W {
357 {
358 self.bit(variant.into())
359 }
360 }
361 #[doc = "Normal-start + 8 data bits (MSB/LSB first as determined by MSBF) + stop."]
362 #[inline(always)]
363 pub fn _0(self) -> &'a mut W {
364 self.variant(M_A::_0)
365 }
366 #[doc = "Use-start + 9 data bits (MSB/LSB first as determined by MSBF) + stop."]
367 #[inline(always)]
368 pub fn _1(self) -> &'a mut W {
369 self.variant(M_A::_1)
370 }
371 #[doc = r"Sets the field bit"]
372 #[inline(always)]
373 pub fn set_bit(self) -> &'a mut W {
374 self.bit(true)
375 }
376 #[doc = r"Clears the field bit"]
377 #[inline(always)]
378 pub fn clear_bit(self) -> &'a mut W {
379 self.bit(false)
380 }
381 #[doc = r"Writes raw bits to the field"]
382 #[inline(always)]
383 pub fn bit(self, value: bool) -> &'a mut W {
384 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u8) & 0x01) << 4);
385 self.w
386 }
387}
388#[doc = "Receiver Source Select\n\nValue on reset: 0"]
389#[derive(Clone, Copy, Debug, PartialEq)]
390pub enum RSRC_A {
391 #[doc = "0: Selects internal loop back mode. The receiver input is internally connected to transmitter output."]
392 _0 = 0,
393 #[doc = "1: Single wire UART mode where the receiver input is connected to the transmit pin input signal."]
394 _1 = 1,
395}
396impl From<RSRC_A> for bool {
397 #[inline(always)]
398 fn from(variant: RSRC_A) -> Self {
399 variant as u8 != 0
400 }
401}
402#[doc = "Reader of field `RSRC`"]
403pub type RSRC_R = crate::R<bool, RSRC_A>;
404impl RSRC_R {
405 #[doc = r"Get enumerated values variant"]
406 #[inline(always)]
407 pub fn variant(&self) -> RSRC_A {
408 match self.bits {
409 false => RSRC_A::_0,
410 true => RSRC_A::_1,
411 }
412 }
413 #[doc = "Checks if the value of the field is `_0`"]
414 #[inline(always)]
415 pub fn is_0(&self) -> bool {
416 *self == RSRC_A::_0
417 }
418 #[doc = "Checks if the value of the field is `_1`"]
419 #[inline(always)]
420 pub fn is_1(&self) -> bool {
421 *self == RSRC_A::_1
422 }
423}
424#[doc = "Write proxy for field `RSRC`"]
425pub struct RSRC_W<'a> {
426 w: &'a mut W,
427}
428impl<'a> RSRC_W<'a> {
429 #[doc = r"Writes `variant` to the field"]
430 #[inline(always)]
431 pub fn variant(self, variant: RSRC_A) -> &'a mut W {
432 {
433 self.bit(variant.into())
434 }
435 }
436 #[doc = "Selects internal loop back mode. The receiver input is internally connected to transmitter output."]
437 #[inline(always)]
438 pub fn _0(self) -> &'a mut W {
439 self.variant(RSRC_A::_0)
440 }
441 #[doc = "Single wire UART mode where the receiver input is connected to the transmit pin input signal."]
442 #[inline(always)]
443 pub fn _1(self) -> &'a mut W {
444 self.variant(RSRC_A::_1)
445 }
446 #[doc = r"Sets the field bit"]
447 #[inline(always)]
448 pub fn set_bit(self) -> &'a mut W {
449 self.bit(true)
450 }
451 #[doc = r"Clears the field bit"]
452 #[inline(always)]
453 pub fn clear_bit(self) -> &'a mut W {
454 self.bit(false)
455 }
456 #[doc = r"Writes raw bits to the field"]
457 #[inline(always)]
458 pub fn bit(self, value: bool) -> &'a mut W {
459 self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u8) & 0x01) << 5);
460 self.w
461 }
462}
463#[doc = "UART Stops in Wait Mode\n\nValue on reset: 0"]
464#[derive(Clone, Copy, Debug, PartialEq)]
465pub enum UARTSWAI_A {
466 #[doc = "0: UART clock continues to run in Wait mode."]
467 _0 = 0,
468 #[doc = "1: UART clock freezes while CPU is in Wait mode."]
469 _1 = 1,
470}
471impl From<UARTSWAI_A> for bool {
472 #[inline(always)]
473 fn from(variant: UARTSWAI_A) -> Self {
474 variant as u8 != 0
475 }
476}
477#[doc = "Reader of field `UARTSWAI`"]
478pub type UARTSWAI_R = crate::R<bool, UARTSWAI_A>;
479impl UARTSWAI_R {
480 #[doc = r"Get enumerated values variant"]
481 #[inline(always)]
482 pub fn variant(&self) -> UARTSWAI_A {
483 match self.bits {
484 false => UARTSWAI_A::_0,
485 true => UARTSWAI_A::_1,
486 }
487 }
488 #[doc = "Checks if the value of the field is `_0`"]
489 #[inline(always)]
490 pub fn is_0(&self) -> bool {
491 *self == UARTSWAI_A::_0
492 }
493 #[doc = "Checks if the value of the field is `_1`"]
494 #[inline(always)]
495 pub fn is_1(&self) -> bool {
496 *self == UARTSWAI_A::_1
497 }
498}
499#[doc = "Write proxy for field `UARTSWAI`"]
500pub struct UARTSWAI_W<'a> {
501 w: &'a mut W,
502}
503impl<'a> UARTSWAI_W<'a> {
504 #[doc = r"Writes `variant` to the field"]
505 #[inline(always)]
506 pub fn variant(self, variant: UARTSWAI_A) -> &'a mut W {
507 {
508 self.bit(variant.into())
509 }
510 }
511 #[doc = "UART clock continues to run in Wait mode."]
512 #[inline(always)]
513 pub fn _0(self) -> &'a mut W {
514 self.variant(UARTSWAI_A::_0)
515 }
516 #[doc = "UART clock freezes while CPU is in Wait mode."]
517 #[inline(always)]
518 pub fn _1(self) -> &'a mut W {
519 self.variant(UARTSWAI_A::_1)
520 }
521 #[doc = r"Sets the field bit"]
522 #[inline(always)]
523 pub fn set_bit(self) -> &'a mut W {
524 self.bit(true)
525 }
526 #[doc = r"Clears the field bit"]
527 #[inline(always)]
528 pub fn clear_bit(self) -> &'a mut W {
529 self.bit(false)
530 }
531 #[doc = r"Writes raw bits to the field"]
532 #[inline(always)]
533 pub fn bit(self, value: bool) -> &'a mut W {
534 self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u8) & 0x01) << 6);
535 self.w
536 }
537}
538#[doc = "Loop Mode Select\n\nValue on reset: 0"]
539#[derive(Clone, Copy, Debug, PartialEq)]
540pub enum LOOPS_A {
541 #[doc = "0: Normal operation."]
542 _0 = 0,
543 #[doc = "1: Loop mode where transmitter output is internally connected to receiver input. The receiver input is determined by RSRC."]
544 _1 = 1,
545}
546impl From<LOOPS_A> for bool {
547 #[inline(always)]
548 fn from(variant: LOOPS_A) -> Self {
549 variant as u8 != 0
550 }
551}
552#[doc = "Reader of field `LOOPS`"]
553pub type LOOPS_R = crate::R<bool, LOOPS_A>;
554impl LOOPS_R {
555 #[doc = r"Get enumerated values variant"]
556 #[inline(always)]
557 pub fn variant(&self) -> LOOPS_A {
558 match self.bits {
559 false => LOOPS_A::_0,
560 true => LOOPS_A::_1,
561 }
562 }
563 #[doc = "Checks if the value of the field is `_0`"]
564 #[inline(always)]
565 pub fn is_0(&self) -> bool {
566 *self == LOOPS_A::_0
567 }
568 #[doc = "Checks if the value of the field is `_1`"]
569 #[inline(always)]
570 pub fn is_1(&self) -> bool {
571 *self == LOOPS_A::_1
572 }
573}
574#[doc = "Write proxy for field `LOOPS`"]
575pub struct LOOPS_W<'a> {
576 w: &'a mut W,
577}
578impl<'a> LOOPS_W<'a> {
579 #[doc = r"Writes `variant` to the field"]
580 #[inline(always)]
581 pub fn variant(self, variant: LOOPS_A) -> &'a mut W {
582 {
583 self.bit(variant.into())
584 }
585 }
586 #[doc = "Normal operation."]
587 #[inline(always)]
588 pub fn _0(self) -> &'a mut W {
589 self.variant(LOOPS_A::_0)
590 }
591 #[doc = "Loop mode where transmitter output is internally connected to receiver input. The receiver input is determined by RSRC."]
592 #[inline(always)]
593 pub fn _1(self) -> &'a mut W {
594 self.variant(LOOPS_A::_1)
595 }
596 #[doc = r"Sets the field bit"]
597 #[inline(always)]
598 pub fn set_bit(self) -> &'a mut W {
599 self.bit(true)
600 }
601 #[doc = r"Clears the field bit"]
602 #[inline(always)]
603 pub fn clear_bit(self) -> &'a mut W {
604 self.bit(false)
605 }
606 #[doc = r"Writes raw bits to the field"]
607 #[inline(always)]
608 pub fn bit(self, value: bool) -> &'a mut W {
609 self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u8) & 0x01) << 7);
610 self.w
611 }
612}
613impl R {
614 #[doc = "Bit 0 - Parity Type"]
615 #[inline(always)]
616 pub fn pt(&self) -> PT_R {
617 PT_R::new((self.bits & 0x01) != 0)
618 }
619 #[doc = "Bit 1 - Parity Enable"]
620 #[inline(always)]
621 pub fn pe(&self) -> PE_R {
622 PE_R::new(((self.bits >> 1) & 0x01) != 0)
623 }
624 #[doc = "Bit 2 - Idle Line Type Select"]
625 #[inline(always)]
626 pub fn ilt(&self) -> ILT_R {
627 ILT_R::new(((self.bits >> 2) & 0x01) != 0)
628 }
629 #[doc = "Bit 3 - Receiver Wakeup Method Select"]
630 #[inline(always)]
631 pub fn wake(&self) -> WAKE_R {
632 WAKE_R::new(((self.bits >> 3) & 0x01) != 0)
633 }
634 #[doc = "Bit 4 - 9-bit or 8-bit Mode Select"]
635 #[inline(always)]
636 pub fn m(&self) -> M_R {
637 M_R::new(((self.bits >> 4) & 0x01) != 0)
638 }
639 #[doc = "Bit 5 - Receiver Source Select"]
640 #[inline(always)]
641 pub fn rsrc(&self) -> RSRC_R {
642 RSRC_R::new(((self.bits >> 5) & 0x01) != 0)
643 }
644 #[doc = "Bit 6 - UART Stops in Wait Mode"]
645 #[inline(always)]
646 pub fn uartswai(&self) -> UARTSWAI_R {
647 UARTSWAI_R::new(((self.bits >> 6) & 0x01) != 0)
648 }
649 #[doc = "Bit 7 - Loop Mode Select"]
650 #[inline(always)]
651 pub fn loops(&self) -> LOOPS_R {
652 LOOPS_R::new(((self.bits >> 7) & 0x01) != 0)
653 }
654}
655impl W {
656 #[doc = "Bit 0 - Parity Type"]
657 #[inline(always)]
658 pub fn pt(&mut self) -> PT_W {
659 PT_W { w: self }
660 }
661 #[doc = "Bit 1 - Parity Enable"]
662 #[inline(always)]
663 pub fn pe(&mut self) -> PE_W {
664 PE_W { w: self }
665 }
666 #[doc = "Bit 2 - Idle Line Type Select"]
667 #[inline(always)]
668 pub fn ilt(&mut self) -> ILT_W {
669 ILT_W { w: self }
670 }
671 #[doc = "Bit 3 - Receiver Wakeup Method Select"]
672 #[inline(always)]
673 pub fn wake(&mut self) -> WAKE_W {
674 WAKE_W { w: self }
675 }
676 #[doc = "Bit 4 - 9-bit or 8-bit Mode Select"]
677 #[inline(always)]
678 pub fn m(&mut self) -> M_W {
679 M_W { w: self }
680 }
681 #[doc = "Bit 5 - Receiver Source Select"]
682 #[inline(always)]
683 pub fn rsrc(&mut self) -> RSRC_W {
684 RSRC_W { w: self }
685 }
686 #[doc = "Bit 6 - UART Stops in Wait Mode"]
687 #[inline(always)]
688 pub fn uartswai(&mut self) -> UARTSWAI_W {
689 UARTSWAI_W { w: self }
690 }
691 #[doc = "Bit 7 - Loop Mode Select"]
692 #[inline(always)]
693 pub fn loops(&mut self) -> LOOPS_W {
694 LOOPS_W { w: self }
695 }
696}