1#[doc = "Reader of register MODE"]
2pub type R = crate::R<u32, super::MODE>;
3#[doc = "Writer for register MODE"]
4pub type W = crate::W<u32, super::MODE>;
5#[doc = "Register MODE `reset()`'s with value 0x04"]
6impl crate::ResetValue for super::MODE {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0x04
11 }
12}
13#[doc = "FTM Enable\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum FTMEN_A {
16 #[doc = "0: Only the TPM-compatible registers (first set of registers) can be used without any restriction. Do not use the FTM-specific registers."]
17 _0 = 0,
18 #[doc = "1: All registers including the FTM-specific registers (second set of registers) are available for use with no restrictions."]
19 _1 = 1,
20}
21impl From<FTMEN_A> for bool {
22 #[inline(always)]
23 fn from(variant: FTMEN_A) -> Self {
24 variant as u8 != 0
25 }
26}
27#[doc = "Reader of field `FTMEN`"]
28pub type FTMEN_R = crate::R<bool, FTMEN_A>;
29impl FTMEN_R {
30 #[doc = r"Get enumerated values variant"]
31 #[inline(always)]
32 pub fn variant(&self) -> FTMEN_A {
33 match self.bits {
34 false => FTMEN_A::_0,
35 true => FTMEN_A::_1,
36 }
37 }
38 #[doc = "Checks if the value of the field is `_0`"]
39 #[inline(always)]
40 pub fn is_0(&self) -> bool {
41 *self == FTMEN_A::_0
42 }
43 #[doc = "Checks if the value of the field is `_1`"]
44 #[inline(always)]
45 pub fn is_1(&self) -> bool {
46 *self == FTMEN_A::_1
47 }
48}
49#[doc = "Write proxy for field `FTMEN`"]
50pub struct FTMEN_W<'a> {
51 w: &'a mut W,
52}
53impl<'a> FTMEN_W<'a> {
54 #[doc = r"Writes `variant` to the field"]
55 #[inline(always)]
56 pub fn variant(self, variant: FTMEN_A) -> &'a mut W {
57 {
58 self.bit(variant.into())
59 }
60 }
61 #[doc = "Only the TPM-compatible registers (first set of registers) can be used without any restriction. Do not use the FTM-specific registers."]
62 #[inline(always)]
63 pub fn _0(self) -> &'a mut W {
64 self.variant(FTMEN_A::_0)
65 }
66 #[doc = "All registers including the FTM-specific registers (second set of registers) are available for use with no restrictions."]
67 #[inline(always)]
68 pub fn _1(self) -> &'a mut W {
69 self.variant(FTMEN_A::_1)
70 }
71 #[doc = r"Sets the field bit"]
72 #[inline(always)]
73 pub fn set_bit(self) -> &'a mut W {
74 self.bit(true)
75 }
76 #[doc = r"Clears the field bit"]
77 #[inline(always)]
78 pub fn clear_bit(self) -> &'a mut W {
79 self.bit(false)
80 }
81 #[doc = r"Writes raw bits to the field"]
82 #[inline(always)]
83 pub fn bit(self, value: bool) -> &'a mut W {
84 self.w.bits = (self.w.bits & !0x01) | ((value as u32) & 0x01);
85 self.w
86 }
87}
88#[doc = "Reader of field `INIT`"]
89pub type INIT_R = crate::R<bool, bool>;
90#[doc = "Write proxy for field `INIT`"]
91pub struct INIT_W<'a> {
92 w: &'a mut W,
93}
94impl<'a> INIT_W<'a> {
95 #[doc = r"Sets the field bit"]
96 #[inline(always)]
97 pub fn set_bit(self) -> &'a mut W {
98 self.bit(true)
99 }
100 #[doc = r"Clears the field bit"]
101 #[inline(always)]
102 pub fn clear_bit(self) -> &'a mut W {
103 self.bit(false)
104 }
105 #[doc = r"Writes raw bits to the field"]
106 #[inline(always)]
107 pub fn bit(self, value: bool) -> &'a mut W {
108 self.w.bits = (self.w.bits & !(0x01 << 1)) | (((value as u32) & 0x01) << 1);
109 self.w
110 }
111}
112#[doc = "Write Protection Disable\n\nValue on reset: 1"]
113#[derive(Clone, Copy, Debug, PartialEq)]
114pub enum WPDIS_A {
115 #[doc = "0: Write protection is enabled."]
116 _0 = 0,
117 #[doc = "1: Write protection is disabled."]
118 _1 = 1,
119}
120impl From<WPDIS_A> for bool {
121 #[inline(always)]
122 fn from(variant: WPDIS_A) -> Self {
123 variant as u8 != 0
124 }
125}
126#[doc = "Reader of field `WPDIS`"]
127pub type WPDIS_R = crate::R<bool, WPDIS_A>;
128impl WPDIS_R {
129 #[doc = r"Get enumerated values variant"]
130 #[inline(always)]
131 pub fn variant(&self) -> WPDIS_A {
132 match self.bits {
133 false => WPDIS_A::_0,
134 true => WPDIS_A::_1,
135 }
136 }
137 #[doc = "Checks if the value of the field is `_0`"]
138 #[inline(always)]
139 pub fn is_0(&self) -> bool {
140 *self == WPDIS_A::_0
141 }
142 #[doc = "Checks if the value of the field is `_1`"]
143 #[inline(always)]
144 pub fn is_1(&self) -> bool {
145 *self == WPDIS_A::_1
146 }
147}
148#[doc = "Write proxy for field `WPDIS`"]
149pub struct WPDIS_W<'a> {
150 w: &'a mut W,
151}
152impl<'a> WPDIS_W<'a> {
153 #[doc = r"Writes `variant` to the field"]
154 #[inline(always)]
155 pub fn variant(self, variant: WPDIS_A) -> &'a mut W {
156 {
157 self.bit(variant.into())
158 }
159 }
160 #[doc = "Write protection is enabled."]
161 #[inline(always)]
162 pub fn _0(self) -> &'a mut W {
163 self.variant(WPDIS_A::_0)
164 }
165 #[doc = "Write protection is disabled."]
166 #[inline(always)]
167 pub fn _1(self) -> &'a mut W {
168 self.variant(WPDIS_A::_1)
169 }
170 #[doc = r"Sets the field bit"]
171 #[inline(always)]
172 pub fn set_bit(self) -> &'a mut W {
173 self.bit(true)
174 }
175 #[doc = r"Clears the field bit"]
176 #[inline(always)]
177 pub fn clear_bit(self) -> &'a mut W {
178 self.bit(false)
179 }
180 #[doc = r"Writes raw bits to the field"]
181 #[inline(always)]
182 pub fn bit(self, value: bool) -> &'a mut W {
183 self.w.bits = (self.w.bits & !(0x01 << 2)) | (((value as u32) & 0x01) << 2);
184 self.w
185 }
186}
187#[doc = "PWM Synchronization Mode\n\nValue on reset: 0"]
188#[derive(Clone, Copy, Debug, PartialEq)]
189pub enum PWMSYNC_A {
190 #[doc = "0: No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
191 _0 = 0,
192 #[doc = "1: Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
193 _1 = 1,
194}
195impl From<PWMSYNC_A> for bool {
196 #[inline(always)]
197 fn from(variant: PWMSYNC_A) -> Self {
198 variant as u8 != 0
199 }
200}
201#[doc = "Reader of field `PWMSYNC`"]
202pub type PWMSYNC_R = crate::R<bool, PWMSYNC_A>;
203impl PWMSYNC_R {
204 #[doc = r"Get enumerated values variant"]
205 #[inline(always)]
206 pub fn variant(&self) -> PWMSYNC_A {
207 match self.bits {
208 false => PWMSYNC_A::_0,
209 true => PWMSYNC_A::_1,
210 }
211 }
212 #[doc = "Checks if the value of the field is `_0`"]
213 #[inline(always)]
214 pub fn is_0(&self) -> bool {
215 *self == PWMSYNC_A::_0
216 }
217 #[doc = "Checks if the value of the field is `_1`"]
218 #[inline(always)]
219 pub fn is_1(&self) -> bool {
220 *self == PWMSYNC_A::_1
221 }
222}
223#[doc = "Write proxy for field `PWMSYNC`"]
224pub struct PWMSYNC_W<'a> {
225 w: &'a mut W,
226}
227impl<'a> PWMSYNC_W<'a> {
228 #[doc = r"Writes `variant` to the field"]
229 #[inline(always)]
230 pub fn variant(self, variant: PWMSYNC_A) -> &'a mut W {
231 {
232 self.bit(variant.into())
233 }
234 }
235 #[doc = "No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization."]
236 #[inline(always)]
237 pub fn _0(self) -> &'a mut W {
238 self.variant(PWMSYNC_A::_0)
239 }
240 #[doc = "Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only be used by OUTMASK and FTM counter synchronization."]
241 #[inline(always)]
242 pub fn _1(self) -> &'a mut W {
243 self.variant(PWMSYNC_A::_1)
244 }
245 #[doc = r"Sets the field bit"]
246 #[inline(always)]
247 pub fn set_bit(self) -> &'a mut W {
248 self.bit(true)
249 }
250 #[doc = r"Clears the field bit"]
251 #[inline(always)]
252 pub fn clear_bit(self) -> &'a mut W {
253 self.bit(false)
254 }
255 #[doc = r"Writes raw bits to the field"]
256 #[inline(always)]
257 pub fn bit(self, value: bool) -> &'a mut W {
258 self.w.bits = (self.w.bits & !(0x01 << 3)) | (((value as u32) & 0x01) << 3);
259 self.w
260 }
261}
262#[doc = "Capture Test Mode Enable\n\nValue on reset: 0"]
263#[derive(Clone, Copy, Debug, PartialEq)]
264pub enum CAPTEST_A {
265 #[doc = "0: Capture test mode is disabled."]
266 _0 = 0,
267 #[doc = "1: Capture test mode is enabled."]
268 _1 = 1,
269}
270impl From<CAPTEST_A> for bool {
271 #[inline(always)]
272 fn from(variant: CAPTEST_A) -> Self {
273 variant as u8 != 0
274 }
275}
276#[doc = "Reader of field `CAPTEST`"]
277pub type CAPTEST_R = crate::R<bool, CAPTEST_A>;
278impl CAPTEST_R {
279 #[doc = r"Get enumerated values variant"]
280 #[inline(always)]
281 pub fn variant(&self) -> CAPTEST_A {
282 match self.bits {
283 false => CAPTEST_A::_0,
284 true => CAPTEST_A::_1,
285 }
286 }
287 #[doc = "Checks if the value of the field is `_0`"]
288 #[inline(always)]
289 pub fn is_0(&self) -> bool {
290 *self == CAPTEST_A::_0
291 }
292 #[doc = "Checks if the value of the field is `_1`"]
293 #[inline(always)]
294 pub fn is_1(&self) -> bool {
295 *self == CAPTEST_A::_1
296 }
297}
298#[doc = "Write proxy for field `CAPTEST`"]
299pub struct CAPTEST_W<'a> {
300 w: &'a mut W,
301}
302impl<'a> CAPTEST_W<'a> {
303 #[doc = r"Writes `variant` to the field"]
304 #[inline(always)]
305 pub fn variant(self, variant: CAPTEST_A) -> &'a mut W {
306 {
307 self.bit(variant.into())
308 }
309 }
310 #[doc = "Capture test mode is disabled."]
311 #[inline(always)]
312 pub fn _0(self) -> &'a mut W {
313 self.variant(CAPTEST_A::_0)
314 }
315 #[doc = "Capture test mode is enabled."]
316 #[inline(always)]
317 pub fn _1(self) -> &'a mut W {
318 self.variant(CAPTEST_A::_1)
319 }
320 #[doc = r"Sets the field bit"]
321 #[inline(always)]
322 pub fn set_bit(self) -> &'a mut W {
323 self.bit(true)
324 }
325 #[doc = r"Clears the field bit"]
326 #[inline(always)]
327 pub fn clear_bit(self) -> &'a mut W {
328 self.bit(false)
329 }
330 #[doc = r"Writes raw bits to the field"]
331 #[inline(always)]
332 pub fn bit(self, value: bool) -> &'a mut W {
333 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
334 self.w
335 }
336}
337#[doc = "Fault Control Mode\n\nValue on reset: 0"]
338#[derive(Clone, Copy, Debug, PartialEq)]
339#[repr(u8)]
340pub enum FAULTM_A {
341 #[doc = "0: Fault control is disabled for all channels."]
342 _00 = 0,
343 #[doc = "1: Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
344 _01 = 1,
345 #[doc = "2: Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
346 _10 = 2,
347 #[doc = "3: Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
348 _11 = 3,
349}
350impl From<FAULTM_A> for u8 {
351 #[inline(always)]
352 fn from(variant: FAULTM_A) -> Self {
353 variant as _
354 }
355}
356#[doc = "Reader of field `FAULTM`"]
357pub type FAULTM_R = crate::R<u8, FAULTM_A>;
358impl FAULTM_R {
359 #[doc = r"Get enumerated values variant"]
360 #[inline(always)]
361 pub fn variant(&self) -> FAULTM_A {
362 match self.bits {
363 0 => FAULTM_A::_00,
364 1 => FAULTM_A::_01,
365 2 => FAULTM_A::_10,
366 3 => FAULTM_A::_11,
367 _ => unreachable!(),
368 }
369 }
370 #[doc = "Checks if the value of the field is `_00`"]
371 #[inline(always)]
372 pub fn is_00(&self) -> bool {
373 *self == FAULTM_A::_00
374 }
375 #[doc = "Checks if the value of the field is `_01`"]
376 #[inline(always)]
377 pub fn is_01(&self) -> bool {
378 *self == FAULTM_A::_01
379 }
380 #[doc = "Checks if the value of the field is `_10`"]
381 #[inline(always)]
382 pub fn is_10(&self) -> bool {
383 *self == FAULTM_A::_10
384 }
385 #[doc = "Checks if the value of the field is `_11`"]
386 #[inline(always)]
387 pub fn is_11(&self) -> bool {
388 *self == FAULTM_A::_11
389 }
390}
391#[doc = "Write proxy for field `FAULTM`"]
392pub struct FAULTM_W<'a> {
393 w: &'a mut W,
394}
395impl<'a> FAULTM_W<'a> {
396 #[doc = r"Writes `variant` to the field"]
397 #[inline(always)]
398 pub fn variant(self, variant: FAULTM_A) -> &'a mut W {
399 {
400 self.bits(variant.into())
401 }
402 }
403 #[doc = "Fault control is disabled for all channels."]
404 #[inline(always)]
405 pub fn _00(self) -> &'a mut W {
406 self.variant(FAULTM_A::_00)
407 }
408 #[doc = "Fault control is enabled for even channels only (channels 0, 2, 4, and 6), and the selected mode is the manual fault clearing."]
409 #[inline(always)]
410 pub fn _01(self) -> &'a mut W {
411 self.variant(FAULTM_A::_01)
412 }
413 #[doc = "Fault control is enabled for all channels, and the selected mode is the manual fault clearing."]
414 #[inline(always)]
415 pub fn _10(self) -> &'a mut W {
416 self.variant(FAULTM_A::_10)
417 }
418 #[doc = "Fault control is enabled for all channels, and the selected mode is the automatic fault clearing."]
419 #[inline(always)]
420 pub fn _11(self) -> &'a mut W {
421 self.variant(FAULTM_A::_11)
422 }
423 #[doc = r"Writes raw bits to the field"]
424 #[inline(always)]
425 pub fn bits(self, value: u8) -> &'a mut W {
426 self.w.bits = (self.w.bits & !(0x03 << 5)) | (((value as u32) & 0x03) << 5);
427 self.w
428 }
429}
430#[doc = "Fault Interrupt Enable\n\nValue on reset: 0"]
431#[derive(Clone, Copy, Debug, PartialEq)]
432pub enum FAULTIE_A {
433 #[doc = "0: Fault control interrupt is disabled."]
434 _0 = 0,
435 #[doc = "1: Fault control interrupt is enabled."]
436 _1 = 1,
437}
438impl From<FAULTIE_A> for bool {
439 #[inline(always)]
440 fn from(variant: FAULTIE_A) -> Self {
441 variant as u8 != 0
442 }
443}
444#[doc = "Reader of field `FAULTIE`"]
445pub type FAULTIE_R = crate::R<bool, FAULTIE_A>;
446impl FAULTIE_R {
447 #[doc = r"Get enumerated values variant"]
448 #[inline(always)]
449 pub fn variant(&self) -> FAULTIE_A {
450 match self.bits {
451 false => FAULTIE_A::_0,
452 true => FAULTIE_A::_1,
453 }
454 }
455 #[doc = "Checks if the value of the field is `_0`"]
456 #[inline(always)]
457 pub fn is_0(&self) -> bool {
458 *self == FAULTIE_A::_0
459 }
460 #[doc = "Checks if the value of the field is `_1`"]
461 #[inline(always)]
462 pub fn is_1(&self) -> bool {
463 *self == FAULTIE_A::_1
464 }
465}
466#[doc = "Write proxy for field `FAULTIE`"]
467pub struct FAULTIE_W<'a> {
468 w: &'a mut W,
469}
470impl<'a> FAULTIE_W<'a> {
471 #[doc = r"Writes `variant` to the field"]
472 #[inline(always)]
473 pub fn variant(self, variant: FAULTIE_A) -> &'a mut W {
474 {
475 self.bit(variant.into())
476 }
477 }
478 #[doc = "Fault control interrupt is disabled."]
479 #[inline(always)]
480 pub fn _0(self) -> &'a mut W {
481 self.variant(FAULTIE_A::_0)
482 }
483 #[doc = "Fault control interrupt is enabled."]
484 #[inline(always)]
485 pub fn _1(self) -> &'a mut W {
486 self.variant(FAULTIE_A::_1)
487 }
488 #[doc = r"Sets the field bit"]
489 #[inline(always)]
490 pub fn set_bit(self) -> &'a mut W {
491 self.bit(true)
492 }
493 #[doc = r"Clears the field bit"]
494 #[inline(always)]
495 pub fn clear_bit(self) -> &'a mut W {
496 self.bit(false)
497 }
498 #[doc = r"Writes raw bits to the field"]
499 #[inline(always)]
500 pub fn bit(self, value: bool) -> &'a mut W {
501 self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
502 self.w
503 }
504}
505impl R {
506 #[doc = "Bit 0 - FTM Enable"]
507 #[inline(always)]
508 pub fn ftmen(&self) -> FTMEN_R {
509 FTMEN_R::new((self.bits & 0x01) != 0)
510 }
511 #[doc = "Bit 1 - Initialize The Channels Output"]
512 #[inline(always)]
513 pub fn init(&self) -> INIT_R {
514 INIT_R::new(((self.bits >> 1) & 0x01) != 0)
515 }
516 #[doc = "Bit 2 - Write Protection Disable"]
517 #[inline(always)]
518 pub fn wpdis(&self) -> WPDIS_R {
519 WPDIS_R::new(((self.bits >> 2) & 0x01) != 0)
520 }
521 #[doc = "Bit 3 - PWM Synchronization Mode"]
522 #[inline(always)]
523 pub fn pwmsync(&self) -> PWMSYNC_R {
524 PWMSYNC_R::new(((self.bits >> 3) & 0x01) != 0)
525 }
526 #[doc = "Bit 4 - Capture Test Mode Enable"]
527 #[inline(always)]
528 pub fn captest(&self) -> CAPTEST_R {
529 CAPTEST_R::new(((self.bits >> 4) & 0x01) != 0)
530 }
531 #[doc = "Bits 5:6 - Fault Control Mode"]
532 #[inline(always)]
533 pub fn faultm(&self) -> FAULTM_R {
534 FAULTM_R::new(((self.bits >> 5) & 0x03) as u8)
535 }
536 #[doc = "Bit 7 - Fault Interrupt Enable"]
537 #[inline(always)]
538 pub fn faultie(&self) -> FAULTIE_R {
539 FAULTIE_R::new(((self.bits >> 7) & 0x01) != 0)
540 }
541}
542impl W {
543 #[doc = "Bit 0 - FTM Enable"]
544 #[inline(always)]
545 pub fn ftmen(&mut self) -> FTMEN_W {
546 FTMEN_W { w: self }
547 }
548 #[doc = "Bit 1 - Initialize The Channels Output"]
549 #[inline(always)]
550 pub fn init(&mut self) -> INIT_W {
551 INIT_W { w: self }
552 }
553 #[doc = "Bit 2 - Write Protection Disable"]
554 #[inline(always)]
555 pub fn wpdis(&mut self) -> WPDIS_W {
556 WPDIS_W { w: self }
557 }
558 #[doc = "Bit 3 - PWM Synchronization Mode"]
559 #[inline(always)]
560 pub fn pwmsync(&mut self) -> PWMSYNC_W {
561 PWMSYNC_W { w: self }
562 }
563 #[doc = "Bit 4 - Capture Test Mode Enable"]
564 #[inline(always)]
565 pub fn captest(&mut self) -> CAPTEST_W {
566 CAPTEST_W { w: self }
567 }
568 #[doc = "Bits 5:6 - Fault Control Mode"]
569 #[inline(always)]
570 pub fn faultm(&mut self) -> FAULTM_W {
571 FAULTM_W { w: self }
572 }
573 #[doc = "Bit 7 - Fault Interrupt Enable"]
574 #[inline(always)]
575 pub fn faultie(&mut self) -> FAULTIE_W {
576 FAULTIE_W { w: self }
577 }
578}