1#[doc = "Reader of register PCR10"]
2pub type R = crate::R<u32, super::PCR10>;
3#[doc = "Writer for register PCR10"]
4pub type W = crate::W<u32, super::PCR10>;
5#[doc = "Register PCR10 `reset()`'s with value 0"]
6impl crate::ResetValue for super::PCR10 {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Pull Select\n\nValue on reset: 0"]
14#[derive(Clone, Copy, Debug, PartialEq)]
15pub enum PS_A {
16 #[doc = "0: Internal pulldown resistor is enabled on the corresponding pin, if the corresponding Port Pull Enable field is set."]
17 _0 = 0,
18 #[doc = "1: Internal pullup resistor is enabled on the corresponding pin, if the corresponding Port Pull Enable field is set."]
19 _1 = 1,
20}
21impl From<PS_A> for bool {
22 #[inline(always)]
23 fn from(variant: PS_A) -> Self {
24 variant as u8 != 0
25 }
26}
27#[doc = "Reader of field `PS`"]
28pub type PS_R = crate::R<bool, PS_A>;
29impl PS_R {
30 #[doc = r"Get enumerated values variant"]
31 #[inline(always)]
32 pub fn variant(&self) -> PS_A {
33 match self.bits {
34 false => PS_A::_0,
35 true => PS_A::_1,
36 }
37 }
38 #[doc = "Checks if the value of the field is `_0`"]
39 #[inline(always)]
40 pub fn is_0(&self) -> bool {
41 *self == PS_A::_0
42 }
43 #[doc = "Checks if the value of the field is `_1`"]
44 #[inline(always)]
45 pub fn is_1(&self) -> bool {
46 *self == PS_A::_1
47 }
48}
49#[doc = "Pull Enable\n\nValue on reset: 0"]
50#[derive(Clone, Copy, Debug, PartialEq)]
51pub enum PE_A {
52 #[doc = "0: Internal pullup or pulldown resistor is not enabled on the corresponding pin."]
53 _0 = 0,
54 #[doc = "1: Internal pullup or pulldown resistor is enabled on the corresponding pin, if the pin is configured as a digital input."]
55 _1 = 1,
56}
57impl From<PE_A> for bool {
58 #[inline(always)]
59 fn from(variant: PE_A) -> Self {
60 variant as u8 != 0
61 }
62}
63#[doc = "Reader of field `PE`"]
64pub type PE_R = crate::R<bool, PE_A>;
65impl PE_R {
66 #[doc = r"Get enumerated values variant"]
67 #[inline(always)]
68 pub fn variant(&self) -> PE_A {
69 match self.bits {
70 false => PE_A::_0,
71 true => PE_A::_1,
72 }
73 }
74 #[doc = "Checks if the value of the field is `_0`"]
75 #[inline(always)]
76 pub fn is_0(&self) -> bool {
77 *self == PE_A::_0
78 }
79 #[doc = "Checks if the value of the field is `_1`"]
80 #[inline(always)]
81 pub fn is_1(&self) -> bool {
82 *self == PE_A::_1
83 }
84}
85#[doc = "Slew Rate Enable\n\nValue on reset: 0"]
86#[derive(Clone, Copy, Debug, PartialEq)]
87pub enum SRE_A {
88 #[doc = "0: Fast slew rate is configured on the corresponding pin, if the pin is configured as a digital output."]
89 _0 = 0,
90 #[doc = "1: Slow slew rate is configured on the corresponding pin, if the pin is configured as a digital output."]
91 _1 = 1,
92}
93impl From<SRE_A> for bool {
94 #[inline(always)]
95 fn from(variant: SRE_A) -> Self {
96 variant as u8 != 0
97 }
98}
99#[doc = "Reader of field `SRE`"]
100pub type SRE_R = crate::R<bool, SRE_A>;
101impl SRE_R {
102 #[doc = r"Get enumerated values variant"]
103 #[inline(always)]
104 pub fn variant(&self) -> SRE_A {
105 match self.bits {
106 false => SRE_A::_0,
107 true => SRE_A::_1,
108 }
109 }
110 #[doc = "Checks if the value of the field is `_0`"]
111 #[inline(always)]
112 pub fn is_0(&self) -> bool {
113 *self == SRE_A::_0
114 }
115 #[doc = "Checks if the value of the field is `_1`"]
116 #[inline(always)]
117 pub fn is_1(&self) -> bool {
118 *self == SRE_A::_1
119 }
120}
121#[doc = "Passive Filter Enable\n\nValue on reset: 0"]
122#[derive(Clone, Copy, Debug, PartialEq)]
123pub enum PFE_A {
124 #[doc = "0: Passive input filter is disabled on the corresponding pin."]
125 _0 = 0,
126 #[doc = "1: Passive input filter is enabled on the corresponding pin, if the pin is configured as a digital input. Refer to the device data sheet for filter characteristics."]
127 _1 = 1,
128}
129impl From<PFE_A> for bool {
130 #[inline(always)]
131 fn from(variant: PFE_A) -> Self {
132 variant as u8 != 0
133 }
134}
135#[doc = "Reader of field `PFE`"]
136pub type PFE_R = crate::R<bool, PFE_A>;
137impl PFE_R {
138 #[doc = r"Get enumerated values variant"]
139 #[inline(always)]
140 pub fn variant(&self) -> PFE_A {
141 match self.bits {
142 false => PFE_A::_0,
143 true => PFE_A::_1,
144 }
145 }
146 #[doc = "Checks if the value of the field is `_0`"]
147 #[inline(always)]
148 pub fn is_0(&self) -> bool {
149 *self == PFE_A::_0
150 }
151 #[doc = "Checks if the value of the field is `_1`"]
152 #[inline(always)]
153 pub fn is_1(&self) -> bool {
154 *self == PFE_A::_1
155 }
156}
157#[doc = "Open Drain Enable\n\nValue on reset: 0"]
158#[derive(Clone, Copy, Debug, PartialEq)]
159pub enum ODE_A {
160 #[doc = "0: Open drain output is disabled on the corresponding pin."]
161 _0 = 0,
162 #[doc = "1: Open drain output is enabled on the corresponding pin, if the pin is configured as a digital output."]
163 _1 = 1,
164}
165impl From<ODE_A> for bool {
166 #[inline(always)]
167 fn from(variant: ODE_A) -> Self {
168 variant as u8 != 0
169 }
170}
171#[doc = "Reader of field `ODE`"]
172pub type ODE_R = crate::R<bool, ODE_A>;
173impl ODE_R {
174 #[doc = r"Get enumerated values variant"]
175 #[inline(always)]
176 pub fn variant(&self) -> ODE_A {
177 match self.bits {
178 false => ODE_A::_0,
179 true => ODE_A::_1,
180 }
181 }
182 #[doc = "Checks if the value of the field is `_0`"]
183 #[inline(always)]
184 pub fn is_0(&self) -> bool {
185 *self == ODE_A::_0
186 }
187 #[doc = "Checks if the value of the field is `_1`"]
188 #[inline(always)]
189 pub fn is_1(&self) -> bool {
190 *self == ODE_A::_1
191 }
192}
193#[doc = "Drive Strength Enable\n\nValue on reset: 0"]
194#[derive(Clone, Copy, Debug, PartialEq)]
195pub enum DSE_A {
196 #[doc = "0: Low drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
197 _0 = 0,
198 #[doc = "1: High drive strength is configured on the corresponding pin, if pin is configured as a digital output."]
199 _1 = 1,
200}
201impl From<DSE_A> for bool {
202 #[inline(always)]
203 fn from(variant: DSE_A) -> Self {
204 variant as u8 != 0
205 }
206}
207#[doc = "Reader of field `DSE`"]
208pub type DSE_R = crate::R<bool, DSE_A>;
209impl DSE_R {
210 #[doc = r"Get enumerated values variant"]
211 #[inline(always)]
212 pub fn variant(&self) -> DSE_A {
213 match self.bits {
214 false => DSE_A::_0,
215 true => DSE_A::_1,
216 }
217 }
218 #[doc = "Checks if the value of the field is `_0`"]
219 #[inline(always)]
220 pub fn is_0(&self) -> bool {
221 *self == DSE_A::_0
222 }
223 #[doc = "Checks if the value of the field is `_1`"]
224 #[inline(always)]
225 pub fn is_1(&self) -> bool {
226 *self == DSE_A::_1
227 }
228}
229#[doc = "Pin Mux Control\n\nValue on reset: 0"]
230#[derive(Clone, Copy, Debug, PartialEq)]
231#[repr(u8)]
232pub enum MUX_A {
233 #[doc = "0: Pin disabled (analog)."]
234 _000 = 0,
235 #[doc = "1: Alternative 1 (GPIO)."]
236 _001 = 1,
237 #[doc = "2: Alternative 2 (chip-specific)."]
238 _010 = 2,
239 #[doc = "3: Alternative 3 (chip-specific)."]
240 _011 = 3,
241 #[doc = "4: Alternative 4 (chip-specific)."]
242 _100 = 4,
243 #[doc = "5: Alternative 5 (chip-specific)."]
244 _101 = 5,
245 #[doc = "6: Alternative 6 (chip-specific)."]
246 _110 = 6,
247 #[doc = "7: Alternative 7 (chip-specific)."]
248 _111 = 7,
249}
250impl From<MUX_A> for u8 {
251 #[inline(always)]
252 fn from(variant: MUX_A) -> Self {
253 variant as _
254 }
255}
256#[doc = "Reader of field `MUX`"]
257pub type MUX_R = crate::R<u8, MUX_A>;
258impl MUX_R {
259 #[doc = r"Get enumerated values variant"]
260 #[inline(always)]
261 pub fn variant(&self) -> MUX_A {
262 match self.bits {
263 0 => MUX_A::_000,
264 1 => MUX_A::_001,
265 2 => MUX_A::_010,
266 3 => MUX_A::_011,
267 4 => MUX_A::_100,
268 5 => MUX_A::_101,
269 6 => MUX_A::_110,
270 7 => MUX_A::_111,
271 _ => unreachable!(),
272 }
273 }
274 #[doc = "Checks if the value of the field is `_000`"]
275 #[inline(always)]
276 pub fn is_000(&self) -> bool {
277 *self == MUX_A::_000
278 }
279 #[doc = "Checks if the value of the field is `_001`"]
280 #[inline(always)]
281 pub fn is_001(&self) -> bool {
282 *self == MUX_A::_001
283 }
284 #[doc = "Checks if the value of the field is `_010`"]
285 #[inline(always)]
286 pub fn is_010(&self) -> bool {
287 *self == MUX_A::_010
288 }
289 #[doc = "Checks if the value of the field is `_011`"]
290 #[inline(always)]
291 pub fn is_011(&self) -> bool {
292 *self == MUX_A::_011
293 }
294 #[doc = "Checks if the value of the field is `_100`"]
295 #[inline(always)]
296 pub fn is_100(&self) -> bool {
297 *self == MUX_A::_100
298 }
299 #[doc = "Checks if the value of the field is `_101`"]
300 #[inline(always)]
301 pub fn is_101(&self) -> bool {
302 *self == MUX_A::_101
303 }
304 #[doc = "Checks if the value of the field is `_110`"]
305 #[inline(always)]
306 pub fn is_110(&self) -> bool {
307 *self == MUX_A::_110
308 }
309 #[doc = "Checks if the value of the field is `_111`"]
310 #[inline(always)]
311 pub fn is_111(&self) -> bool {
312 *self == MUX_A::_111
313 }
314}
315#[doc = "Write proxy for field `MUX`"]
316pub struct MUX_W<'a> {
317 w: &'a mut W,
318}
319impl<'a> MUX_W<'a> {
320 #[doc = r"Writes `variant` to the field"]
321 #[inline(always)]
322 pub fn variant(self, variant: MUX_A) -> &'a mut W {
323 {
324 self.bits(variant.into())
325 }
326 }
327 #[doc = "Pin disabled (analog)."]
328 #[inline(always)]
329 pub fn _000(self) -> &'a mut W {
330 self.variant(MUX_A::_000)
331 }
332 #[doc = "Alternative 1 (GPIO)."]
333 #[inline(always)]
334 pub fn _001(self) -> &'a mut W {
335 self.variant(MUX_A::_001)
336 }
337 #[doc = "Alternative 2 (chip-specific)."]
338 #[inline(always)]
339 pub fn _010(self) -> &'a mut W {
340 self.variant(MUX_A::_010)
341 }
342 #[doc = "Alternative 3 (chip-specific)."]
343 #[inline(always)]
344 pub fn _011(self) -> &'a mut W {
345 self.variant(MUX_A::_011)
346 }
347 #[doc = "Alternative 4 (chip-specific)."]
348 #[inline(always)]
349 pub fn _100(self) -> &'a mut W {
350 self.variant(MUX_A::_100)
351 }
352 #[doc = "Alternative 5 (chip-specific)."]
353 #[inline(always)]
354 pub fn _101(self) -> &'a mut W {
355 self.variant(MUX_A::_101)
356 }
357 #[doc = "Alternative 6 (chip-specific)."]
358 #[inline(always)]
359 pub fn _110(self) -> &'a mut W {
360 self.variant(MUX_A::_110)
361 }
362 #[doc = "Alternative 7 (chip-specific)."]
363 #[inline(always)]
364 pub fn _111(self) -> &'a mut W {
365 self.variant(MUX_A::_111)
366 }
367 #[doc = r"Writes raw bits to the field"]
368 #[inline(always)]
369 pub fn bits(self, value: u8) -> &'a mut W {
370 self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u32) & 0x07) << 8);
371 self.w
372 }
373}
374#[doc = "Lock Register\n\nValue on reset: 0"]
375#[derive(Clone, Copy, Debug, PartialEq)]
376pub enum LK_A {
377 #[doc = "0: Pin Control Register fields \\[15:0\\]
378are not locked."]
379 _0 = 0,
380 #[doc = "1: Pin Control Register fields \\[15:0\\]
381are locked and cannot be updated until the next system reset."]
382 _1 = 1,
383}
384impl From<LK_A> for bool {
385 #[inline(always)]
386 fn from(variant: LK_A) -> Self {
387 variant as u8 != 0
388 }
389}
390#[doc = "Reader of field `LK`"]
391pub type LK_R = crate::R<bool, LK_A>;
392impl LK_R {
393 #[doc = r"Get enumerated values variant"]
394 #[inline(always)]
395 pub fn variant(&self) -> LK_A {
396 match self.bits {
397 false => LK_A::_0,
398 true => LK_A::_1,
399 }
400 }
401 #[doc = "Checks if the value of the field is `_0`"]
402 #[inline(always)]
403 pub fn is_0(&self) -> bool {
404 *self == LK_A::_0
405 }
406 #[doc = "Checks if the value of the field is `_1`"]
407 #[inline(always)]
408 pub fn is_1(&self) -> bool {
409 *self == LK_A::_1
410 }
411}
412#[doc = "Write proxy for field `LK`"]
413pub struct LK_W<'a> {
414 w: &'a mut W,
415}
416impl<'a> LK_W<'a> {
417 #[doc = r"Writes `variant` to the field"]
418 #[inline(always)]
419 pub fn variant(self, variant: LK_A) -> &'a mut W {
420 {
421 self.bit(variant.into())
422 }
423 }
424 #[doc = "Pin Control Register fields \\[15:0\\]
425are not locked."]
426 #[inline(always)]
427 pub fn _0(self) -> &'a mut W {
428 self.variant(LK_A::_0)
429 }
430 #[doc = "Pin Control Register fields \\[15:0\\]
431are locked and cannot be updated until the next system reset."]
432 #[inline(always)]
433 pub fn _1(self) -> &'a mut W {
434 self.variant(LK_A::_1)
435 }
436 #[doc = r"Sets the field bit"]
437 #[inline(always)]
438 pub fn set_bit(self) -> &'a mut W {
439 self.bit(true)
440 }
441 #[doc = r"Clears the field bit"]
442 #[inline(always)]
443 pub fn clear_bit(self) -> &'a mut W {
444 self.bit(false)
445 }
446 #[doc = r"Writes raw bits to the field"]
447 #[inline(always)]
448 pub fn bit(self, value: bool) -> &'a mut W {
449 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
450 self.w
451 }
452}
453#[doc = "Interrupt Configuration\n\nValue on reset: 0"]
454#[derive(Clone, Copy, Debug, PartialEq)]
455#[repr(u8)]
456pub enum IRQC_A {
457 #[doc = "0: Interrupt/DMA request disabled."]
458 _0000 = 0,
459 #[doc = "1: DMA request on rising edge."]
460 _0001 = 1,
461 #[doc = "2: DMA request on falling edge."]
462 _0010 = 2,
463 #[doc = "3: DMA request on either edge."]
464 _0011 = 3,
465 #[doc = "8: Interrupt when logic zero."]
466 _1000 = 8,
467 #[doc = "9: Interrupt on rising edge."]
468 _1001 = 9,
469 #[doc = "10: Interrupt on falling edge."]
470 _1010 = 10,
471 #[doc = "11: Interrupt on either edge."]
472 _1011 = 11,
473 #[doc = "12: Interrupt when logic one."]
474 _1100 = 12,
475}
476impl From<IRQC_A> for u8 {
477 #[inline(always)]
478 fn from(variant: IRQC_A) -> Self {
479 variant as _
480 }
481}
482#[doc = "Reader of field `IRQC`"]
483pub type IRQC_R = crate::R<u8, IRQC_A>;
484impl IRQC_R {
485 #[doc = r"Get enumerated values variant"]
486 #[inline(always)]
487 pub fn variant(&self) -> crate::Variant<u8, IRQC_A> {
488 use crate::Variant::*;
489 match self.bits {
490 0 => Val(IRQC_A::_0000),
491 1 => Val(IRQC_A::_0001),
492 2 => Val(IRQC_A::_0010),
493 3 => Val(IRQC_A::_0011),
494 8 => Val(IRQC_A::_1000),
495 9 => Val(IRQC_A::_1001),
496 10 => Val(IRQC_A::_1010),
497 11 => Val(IRQC_A::_1011),
498 12 => Val(IRQC_A::_1100),
499 i => Res(i),
500 }
501 }
502 #[doc = "Checks if the value of the field is `_0000`"]
503 #[inline(always)]
504 pub fn is_0000(&self) -> bool {
505 *self == IRQC_A::_0000
506 }
507 #[doc = "Checks if the value of the field is `_0001`"]
508 #[inline(always)]
509 pub fn is_0001(&self) -> bool {
510 *self == IRQC_A::_0001
511 }
512 #[doc = "Checks if the value of the field is `_0010`"]
513 #[inline(always)]
514 pub fn is_0010(&self) -> bool {
515 *self == IRQC_A::_0010
516 }
517 #[doc = "Checks if the value of the field is `_0011`"]
518 #[inline(always)]
519 pub fn is_0011(&self) -> bool {
520 *self == IRQC_A::_0011
521 }
522 #[doc = "Checks if the value of the field is `_1000`"]
523 #[inline(always)]
524 pub fn is_1000(&self) -> bool {
525 *self == IRQC_A::_1000
526 }
527 #[doc = "Checks if the value of the field is `_1001`"]
528 #[inline(always)]
529 pub fn is_1001(&self) -> bool {
530 *self == IRQC_A::_1001
531 }
532 #[doc = "Checks if the value of the field is `_1010`"]
533 #[inline(always)]
534 pub fn is_1010(&self) -> bool {
535 *self == IRQC_A::_1010
536 }
537 #[doc = "Checks if the value of the field is `_1011`"]
538 #[inline(always)]
539 pub fn is_1011(&self) -> bool {
540 *self == IRQC_A::_1011
541 }
542 #[doc = "Checks if the value of the field is `_1100`"]
543 #[inline(always)]
544 pub fn is_1100(&self) -> bool {
545 *self == IRQC_A::_1100
546 }
547}
548#[doc = "Write proxy for field `IRQC`"]
549pub struct IRQC_W<'a> {
550 w: &'a mut W,
551}
552impl<'a> IRQC_W<'a> {
553 #[doc = r"Writes `variant` to the field"]
554 #[inline(always)]
555 pub fn variant(self, variant: IRQC_A) -> &'a mut W {
556 unsafe { self.bits(variant.into()) }
557 }
558 #[doc = "Interrupt/DMA request disabled."]
559 #[inline(always)]
560 pub fn _0000(self) -> &'a mut W {
561 self.variant(IRQC_A::_0000)
562 }
563 #[doc = "DMA request on rising edge."]
564 #[inline(always)]
565 pub fn _0001(self) -> &'a mut W {
566 self.variant(IRQC_A::_0001)
567 }
568 #[doc = "DMA request on falling edge."]
569 #[inline(always)]
570 pub fn _0010(self) -> &'a mut W {
571 self.variant(IRQC_A::_0010)
572 }
573 #[doc = "DMA request on either edge."]
574 #[inline(always)]
575 pub fn _0011(self) -> &'a mut W {
576 self.variant(IRQC_A::_0011)
577 }
578 #[doc = "Interrupt when logic zero."]
579 #[inline(always)]
580 pub fn _1000(self) -> &'a mut W {
581 self.variant(IRQC_A::_1000)
582 }
583 #[doc = "Interrupt on rising edge."]
584 #[inline(always)]
585 pub fn _1001(self) -> &'a mut W {
586 self.variant(IRQC_A::_1001)
587 }
588 #[doc = "Interrupt on falling edge."]
589 #[inline(always)]
590 pub fn _1010(self) -> &'a mut W {
591 self.variant(IRQC_A::_1010)
592 }
593 #[doc = "Interrupt on either edge."]
594 #[inline(always)]
595 pub fn _1011(self) -> &'a mut W {
596 self.variant(IRQC_A::_1011)
597 }
598 #[doc = "Interrupt when logic one."]
599 #[inline(always)]
600 pub fn _1100(self) -> &'a mut W {
601 self.variant(IRQC_A::_1100)
602 }
603 #[doc = r"Writes raw bits to the field"]
604 #[inline(always)]
605 pub unsafe fn bits(self, value: u8) -> &'a mut W {
606 self.w.bits = (self.w.bits & !(0x0f << 16)) | (((value as u32) & 0x0f) << 16);
607 self.w
608 }
609}
610#[doc = "Interrupt Status Flag\n\nValue on reset: 0"]
611#[derive(Clone, Copy, Debug, PartialEq)]
612pub enum ISF_A {
613 #[doc = "0: Configured interrupt is not detected."]
614 _0 = 0,
615 #[doc = "1: Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic one is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
616 _1 = 1,
617}
618impl From<ISF_A> for bool {
619 #[inline(always)]
620 fn from(variant: ISF_A) -> Self {
621 variant as u8 != 0
622 }
623}
624#[doc = "Reader of field `ISF`"]
625pub type ISF_R = crate::R<bool, ISF_A>;
626impl ISF_R {
627 #[doc = r"Get enumerated values variant"]
628 #[inline(always)]
629 pub fn variant(&self) -> ISF_A {
630 match self.bits {
631 false => ISF_A::_0,
632 true => ISF_A::_1,
633 }
634 }
635 #[doc = "Checks if the value of the field is `_0`"]
636 #[inline(always)]
637 pub fn is_0(&self) -> bool {
638 *self == ISF_A::_0
639 }
640 #[doc = "Checks if the value of the field is `_1`"]
641 #[inline(always)]
642 pub fn is_1(&self) -> bool {
643 *self == ISF_A::_1
644 }
645}
646#[doc = "Write proxy for field `ISF`"]
647pub struct ISF_W<'a> {
648 w: &'a mut W,
649}
650impl<'a> ISF_W<'a> {
651 #[doc = r"Writes `variant` to the field"]
652 #[inline(always)]
653 pub fn variant(self, variant: ISF_A) -> &'a mut W {
654 {
655 self.bit(variant.into())
656 }
657 }
658 #[doc = "Configured interrupt is not detected."]
659 #[inline(always)]
660 pub fn _0(self) -> &'a mut W {
661 self.variant(ISF_A::_0)
662 }
663 #[doc = "Configured interrupt is detected. If the pin is configured to generate a DMA request, then the corresponding flag will be cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic one is written to the flag. If the pin is configured for a level sensitive interrupt and the pin remains asserted, then the flag is set again immediately after it is cleared."]
664 #[inline(always)]
665 pub fn _1(self) -> &'a mut W {
666 self.variant(ISF_A::_1)
667 }
668 #[doc = r"Sets the field bit"]
669 #[inline(always)]
670 pub fn set_bit(self) -> &'a mut W {
671 self.bit(true)
672 }
673 #[doc = r"Clears the field bit"]
674 #[inline(always)]
675 pub fn clear_bit(self) -> &'a mut W {
676 self.bit(false)
677 }
678 #[doc = r"Writes raw bits to the field"]
679 #[inline(always)]
680 pub fn bit(self, value: bool) -> &'a mut W {
681 self.w.bits = (self.w.bits & !(0x01 << 24)) | (((value as u32) & 0x01) << 24);
682 self.w
683 }
684}
685impl R {
686 #[doc = "Bit 0 - Pull Select"]
687 #[inline(always)]
688 pub fn ps(&self) -> PS_R {
689 PS_R::new((self.bits & 0x01) != 0)
690 }
691 #[doc = "Bit 1 - Pull Enable"]
692 #[inline(always)]
693 pub fn pe(&self) -> PE_R {
694 PE_R::new(((self.bits >> 1) & 0x01) != 0)
695 }
696 #[doc = "Bit 2 - Slew Rate Enable"]
697 #[inline(always)]
698 pub fn sre(&self) -> SRE_R {
699 SRE_R::new(((self.bits >> 2) & 0x01) != 0)
700 }
701 #[doc = "Bit 4 - Passive Filter Enable"]
702 #[inline(always)]
703 pub fn pfe(&self) -> PFE_R {
704 PFE_R::new(((self.bits >> 4) & 0x01) != 0)
705 }
706 #[doc = "Bit 5 - Open Drain Enable"]
707 #[inline(always)]
708 pub fn ode(&self) -> ODE_R {
709 ODE_R::new(((self.bits >> 5) & 0x01) != 0)
710 }
711 #[doc = "Bit 6 - Drive Strength Enable"]
712 #[inline(always)]
713 pub fn dse(&self) -> DSE_R {
714 DSE_R::new(((self.bits >> 6) & 0x01) != 0)
715 }
716 #[doc = "Bits 8:10 - Pin Mux Control"]
717 #[inline(always)]
718 pub fn mux(&self) -> MUX_R {
719 MUX_R::new(((self.bits >> 8) & 0x07) as u8)
720 }
721 #[doc = "Bit 15 - Lock Register"]
722 #[inline(always)]
723 pub fn lk(&self) -> LK_R {
724 LK_R::new(((self.bits >> 15) & 0x01) != 0)
725 }
726 #[doc = "Bits 16:19 - Interrupt Configuration"]
727 #[inline(always)]
728 pub fn irqc(&self) -> IRQC_R {
729 IRQC_R::new(((self.bits >> 16) & 0x0f) as u8)
730 }
731 #[doc = "Bit 24 - Interrupt Status Flag"]
732 #[inline(always)]
733 pub fn isf(&self) -> ISF_R {
734 ISF_R::new(((self.bits >> 24) & 0x01) != 0)
735 }
736}
737impl W {
738 #[doc = "Bits 8:10 - Pin Mux Control"]
739 #[inline(always)]
740 pub fn mux(&mut self) -> MUX_W {
741 MUX_W { w: self }
742 }
743 #[doc = "Bit 15 - Lock Register"]
744 #[inline(always)]
745 pub fn lk(&mut self) -> LK_W {
746 LK_W { w: self }
747 }
748 #[doc = "Bits 16:19 - Interrupt Configuration"]
749 #[inline(always)]
750 pub fn irqc(&mut self) -> IRQC_W {
751 IRQC_W { w: self }
752 }
753 #[doc = "Bit 24 - Interrupt Status Flag"]
754 #[inline(always)]
755 pub fn isf(&mut self) -> ISF_W {
756 ISF_W { w: self }
757 }
758}