k22f/dma/
tcd_attr.rs

1#[doc = "Reader of register TCD%s_ATTR"]
2pub type R = crate::R<u16, super::TCD_ATTR>;
3#[doc = "Writer for register TCD%s_ATTR"]
4pub type W = crate::W<u16, super::TCD_ATTR>;
5#[doc = "Register TCD%s_ATTR `reset()`'s with value 0"]
6impl crate::ResetValue for super::TCD_ATTR {
7    type Type = u16;
8    #[inline(always)]
9    fn reset_value() -> Self::Type {
10        0
11    }
12}
13#[doc = "Reader of field `DSIZE`"]
14pub type DSIZE_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `DSIZE`"]
16pub struct DSIZE_W<'a> {
17    w: &'a mut W,
18}
19impl<'a> DSIZE_W<'a> {
20    #[doc = r"Writes raw bits to the field"]
21    #[inline(always)]
22    pub unsafe fn bits(self, value: u8) -> &'a mut W {
23        self.w.bits = (self.w.bits & !0x07) | ((value as u16) & 0x07);
24        self.w
25    }
26}
27#[doc = "Reader of field `DMOD`"]
28pub type DMOD_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `DMOD`"]
30pub struct DMOD_W<'a> {
31    w: &'a mut W,
32}
33impl<'a> DMOD_W<'a> {
34    #[doc = r"Writes raw bits to the field"]
35    #[inline(always)]
36    pub unsafe fn bits(self, value: u8) -> &'a mut W {
37        self.w.bits = (self.w.bits & !(0x1f << 3)) | (((value as u16) & 0x1f) << 3);
38        self.w
39    }
40}
41#[doc = "Source data transfer size\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq)]
43#[repr(u8)]
44pub enum SSIZE_A {
45    #[doc = "0: 8-bit"]
46    _000 = 0,
47    #[doc = "1: 16-bit"]
48    _001 = 1,
49    #[doc = "2: 32-bit"]
50    _010 = 2,
51    #[doc = "4: 16-byte"]
52    _100 = 4,
53    #[doc = "5: 32-byte"]
54    _101 = 5,
55}
56impl From<SSIZE_A> for u8 {
57    #[inline(always)]
58    fn from(variant: SSIZE_A) -> Self {
59        variant as _
60    }
61}
62#[doc = "Reader of field `SSIZE`"]
63pub type SSIZE_R = crate::R<u8, SSIZE_A>;
64impl SSIZE_R {
65    #[doc = r"Get enumerated values variant"]
66    #[inline(always)]
67    pub fn variant(&self) -> crate::Variant<u8, SSIZE_A> {
68        use crate::Variant::*;
69        match self.bits {
70            0 => Val(SSIZE_A::_000),
71            1 => Val(SSIZE_A::_001),
72            2 => Val(SSIZE_A::_010),
73            4 => Val(SSIZE_A::_100),
74            5 => Val(SSIZE_A::_101),
75            i => Res(i),
76        }
77    }
78    #[doc = "Checks if the value of the field is `_000`"]
79    #[inline(always)]
80    pub fn is_000(&self) -> bool {
81        *self == SSIZE_A::_000
82    }
83    #[doc = "Checks if the value of the field is `_001`"]
84    #[inline(always)]
85    pub fn is_001(&self) -> bool {
86        *self == SSIZE_A::_001
87    }
88    #[doc = "Checks if the value of the field is `_010`"]
89    #[inline(always)]
90    pub fn is_010(&self) -> bool {
91        *self == SSIZE_A::_010
92    }
93    #[doc = "Checks if the value of the field is `_100`"]
94    #[inline(always)]
95    pub fn is_100(&self) -> bool {
96        *self == SSIZE_A::_100
97    }
98    #[doc = "Checks if the value of the field is `_101`"]
99    #[inline(always)]
100    pub fn is_101(&self) -> bool {
101        *self == SSIZE_A::_101
102    }
103}
104#[doc = "Write proxy for field `SSIZE`"]
105pub struct SSIZE_W<'a> {
106    w: &'a mut W,
107}
108impl<'a> SSIZE_W<'a> {
109    #[doc = r"Writes `variant` to the field"]
110    #[inline(always)]
111    pub fn variant(self, variant: SSIZE_A) -> &'a mut W {
112        unsafe { self.bits(variant.into()) }
113    }
114    #[doc = "8-bit"]
115    #[inline(always)]
116    pub fn _000(self) -> &'a mut W {
117        self.variant(SSIZE_A::_000)
118    }
119    #[doc = "16-bit"]
120    #[inline(always)]
121    pub fn _001(self) -> &'a mut W {
122        self.variant(SSIZE_A::_001)
123    }
124    #[doc = "32-bit"]
125    #[inline(always)]
126    pub fn _010(self) -> &'a mut W {
127        self.variant(SSIZE_A::_010)
128    }
129    #[doc = "16-byte"]
130    #[inline(always)]
131    pub fn _100(self) -> &'a mut W {
132        self.variant(SSIZE_A::_100)
133    }
134    #[doc = "32-byte"]
135    #[inline(always)]
136    pub fn _101(self) -> &'a mut W {
137        self.variant(SSIZE_A::_101)
138    }
139    #[doc = r"Writes raw bits to the field"]
140    #[inline(always)]
141    pub unsafe fn bits(self, value: u8) -> &'a mut W {
142        self.w.bits = (self.w.bits & !(0x07 << 8)) | (((value as u16) & 0x07) << 8);
143        self.w
144    }
145}
146#[doc = "Source Address Modulo.\n\nValue on reset: 0"]
147#[derive(Clone, Copy, Debug, PartialEq)]
148#[repr(u8)]
149pub enum SMOD_A {
150    #[doc = "0: Source address modulo feature is disabled"]
151    _0 = 0,
152}
153impl From<SMOD_A> for u8 {
154    #[inline(always)]
155    fn from(variant: SMOD_A) -> Self {
156        variant as _
157    }
158}
159#[doc = "Reader of field `SMOD`"]
160pub type SMOD_R = crate::R<u8, SMOD_A>;
161impl SMOD_R {
162    #[doc = r"Get enumerated values variant"]
163    #[inline(always)]
164    pub fn variant(&self) -> crate::Variant<u8, SMOD_A> {
165        use crate::Variant::*;
166        match self.bits {
167            0 => Val(SMOD_A::_0),
168            i => Res(i),
169        }
170    }
171    #[doc = "Checks if the value of the field is `_0`"]
172    #[inline(always)]
173    pub fn is_0(&self) -> bool {
174        *self == SMOD_A::_0
175    }
176}
177#[doc = "Write proxy for field `SMOD`"]
178pub struct SMOD_W<'a> {
179    w: &'a mut W,
180}
181impl<'a> SMOD_W<'a> {
182    #[doc = r"Writes `variant` to the field"]
183    #[inline(always)]
184    pub fn variant(self, variant: SMOD_A) -> &'a mut W {
185        unsafe { self.bits(variant.into()) }
186    }
187    #[doc = "Source address modulo feature is disabled"]
188    #[inline(always)]
189    pub fn _0(self) -> &'a mut W {
190        self.variant(SMOD_A::_0)
191    }
192    #[doc = r"Writes raw bits to the field"]
193    #[inline(always)]
194    pub unsafe fn bits(self, value: u8) -> &'a mut W {
195        self.w.bits = (self.w.bits & !(0x1f << 11)) | (((value as u16) & 0x1f) << 11);
196        self.w
197    }
198}
199impl R {
200    #[doc = "Bits 0:2 - Destination Data Transfer Size"]
201    #[inline(always)]
202    pub fn dsize(&self) -> DSIZE_R {
203        DSIZE_R::new((self.bits & 0x07) as u8)
204    }
205    #[doc = "Bits 3:7 - Destination Address Modulo"]
206    #[inline(always)]
207    pub fn dmod(&self) -> DMOD_R {
208        DMOD_R::new(((self.bits >> 3) & 0x1f) as u8)
209    }
210    #[doc = "Bits 8:10 - Source data transfer size"]
211    #[inline(always)]
212    pub fn ssize(&self) -> SSIZE_R {
213        SSIZE_R::new(((self.bits >> 8) & 0x07) as u8)
214    }
215    #[doc = "Bits 11:15 - Source Address Modulo."]
216    #[inline(always)]
217    pub fn smod(&self) -> SMOD_R {
218        SMOD_R::new(((self.bits >> 11) & 0x1f) as u8)
219    }
220}
221impl W {
222    #[doc = "Bits 0:2 - Destination Data Transfer Size"]
223    #[inline(always)]
224    pub fn dsize(&mut self) -> DSIZE_W {
225        DSIZE_W { w: self }
226    }
227    #[doc = "Bits 3:7 - Destination Address Modulo"]
228    #[inline(always)]
229    pub fn dmod(&mut self) -> DMOD_W {
230        DMOD_W { w: self }
231    }
232    #[doc = "Bits 8:10 - Source data transfer size"]
233    #[inline(always)]
234    pub fn ssize(&mut self) -> SSIZE_W {
235        SSIZE_W { w: self }
236    }
237    #[doc = "Bits 11:15 - Source Address Modulo."]
238    #[inline(always)]
239    pub fn smod(&mut self) -> SMOD_W {
240        SMOD_W { w: self }
241    }
242}
k22f/dma/tcd_attr.rs

k22f/dma/
tcd_attr.rs
