jit_assembler/riscv64/
mod.rs

1//! RISC-V instruction set support for the JIT assembler.
2//!
3//! This module provides RISC-V specific instruction encoding and a macro-based
4//! DSL for generating RISC-V machine code at runtime.
5
6
7
8pub mod instruction;
9pub mod builder;
10pub mod macros;
11
12#[cfg(test)]
13mod tests;
14
15// Re-export commonly used items
16pub use instruction::{Register, Csr, Instruction, reg, csr};
17pub use builder::Riscv64InstructionBuilder;

jit_assembler/riscv64/mod.rs

jit_assembler/riscv64/
mod.rs