Struct isla_lib::config::ISAConfig[−][src]

pub struct ISAConfig<B> {
    pub pc: Name,
    pub ifetch_read_kind: Name,
    pub read_exclusives: Vec<Name>,
    pub write_exclusives: Vec<Name>,
    pub event_sets: HashMap<String, Vec<Kind<Name>>>,
    pub assembler: Tool,
    pub objdump: Tool,
    pub linker: Tool,
    pub barriers: HashMap<Name, String>,
    pub page_table_base: u64,
    pub page_size: u64,
    pub s2_page_table_base: u64,
    pub s2_page_size: u64,
    pub thread_base: u64,
    pub thread_top: u64,
    pub thread_stride: u64,
    pub symbolic_addr_base: u64,
    pub symbolic_addr_stride: u64,
    pub default_registers: HashMap<Name, Val<B>>,
    pub reset_registers: HashMap<Loc<Name>, Reset<B>>,
    pub register_renames: HashMap<String, Name>,
    pub ignored_registers: HashSet<Name>,
    pub probes: HashSet<Name>,
}

Fields

pc: Name

The identifier for the program counter register

ifetch_read_kind: Name

The read_kind for instruction fetch events

read_exclusives: Vec<Name>

Exlusive read_kinds for the architecture

write_exclusives: Vec<Name>

Exlusive write_kinds for the architecture

event_sets: HashMap<String, Vec<Kind<Name>>>

Map from cat file sets to event kinds

assembler: Tool

A path to an assembler for the architecture

objdump: Tool

A path to an objdump for the architecture

linker: Tool

A path to a linker for the architecture

barriers: HashMap<Name, String>

A mapping from sail barrier_kinds to their names in cat memory models

page_table_base: u64

The base address for the page tables

page_size: u64

The number of bytes in each page

s2_page_table_base: u64

The base address for the page tables (stage 2)

s2_page_size: u64

The number of bytes in each page (stage 2)

thread_base: u64

The base address for the threads in a litmus test

thread_top: u64

The top address for the thread memory region

thread_stride: u64

The number of bytes between each thread

symbolic_addr_base: u64

The first address to use when allocating symbolic addresses

symbolic_addr_stride: u64

The number of bytes between each symbolic address

default_registers: HashMap<Name, Val<B>>

Default values for specified registers

reset_registers: HashMap<Loc<Name>, Reset<B>>

Reset values for specified registers

register_renames: HashMap<String, Name>

Register synonyms to rename

ignored_registers: HashSet<Name>

Registers to ignore during footprint analysis

probes: HashSet<Name>

Trace any function calls in this set

Implementations

impl<B: BV> ISAConfig<B>[src]

pub fn parse(contents: &str, symtab: &Symtab<'_>) -> Result<Self, String>[src]

pub fn new(symtab: &Symtab<'_>) -> Result<Self, String>[src]

Use a default configuration when none is specified

pub fn from_file<P>(
    hasher: &mut Sha256,
    path: P,
    symtab: &Symtab<'_>
) -> Result<Self, String> where
    P: AsRef<Path>, [src]

Load the configuration from a TOML file.

Auto Trait Implementations

impl<B> !RefUnwindSafe for ISAConfig<B>

impl<B> Send for ISAConfig<B> where
    B: Send, 

impl<B> Sync for ISAConfig<B> where
    B: Sync, 

impl<B> Unpin for ISAConfig<B> where
    B: Unpin, 

impl<B> !UnwindSafe for ISAConfig<B>

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized, [src]

impl<T> Borrow<T> for T where
    T: ?Sized, [src]

impl<T> BorrowMut<T> for T where
    T: ?Sized, [src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, [src]

impl<T> Same<T> for T

type Output = T

Should always be Self

impl<T, U> TryFrom<U> for T where
    U: Into<T>, [src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.