[][src]Struct imxrt1062_xtalosc24m::R

pub struct R<U, T> { /* fields omitted */ }

Register/field reader

Result of the read method of a register. Also it can be used in the modify method

Methods

impl<U, T> R<U, T> where
    U: Copy
[src]

pub fn bits(&self) -> U[src]

Read raw bits from register/field

impl<FI> R<bool, FI>[src]

pub fn bit(&self) -> bool[src]

Value of the field as raw bits

pub fn bit_is_clear(&self) -> bool[src]

Returns true if the bit is clear (0)

pub fn bit_is_set(&self) -> bool[src]

Returns true if the bit is set (1)

impl R<bool, REFTOP_SELFBIASOFF_A>[src]

pub fn variant(&self) -> REFTOP_SELFBIASOFF_A[src]

Get enumerated values variant

pub fn is_reftop_selfbiasoff_0(&self) -> bool[src]

Checks if the value of the field is REFTOP_SELFBIASOFF_0

pub fn is_reftop_selfbiasoff_1(&self) -> bool[src]

Checks if the value of the field is REFTOP_SELFBIASOFF_1

impl R<u8, REFTOP_VBGADJ_A>[src]

pub fn variant(&self) -> REFTOP_VBGADJ_A[src]

Get enumerated values variant

pub fn is_reftop_vbgadj_0(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_0

pub fn is_reftop_vbgadj_1(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_1

pub fn is_reftop_vbgadj_2(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_2

pub fn is_reftop_vbgadj_3(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_3

pub fn is_reftop_vbgadj_4(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_4

pub fn is_reftop_vbgadj_5(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_5

pub fn is_reftop_vbgadj_6(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_6

pub fn is_reftop_vbgadj_7(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_7

impl R<u8, STOP_MODE_CONFIG_A>[src]

pub fn variant(&self) -> STOP_MODE_CONFIG_A[src]

Get enumerated values variant

pub fn is_stop_mode_config_0(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_0

pub fn is_stop_mode_config_1(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_1

pub fn is_stop_mode_config_2(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_2

pub fn is_stop_mode_config_3(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_3

impl R<bool, DISCON_HIGH_SNVS_A>[src]

pub fn variant(&self) -> DISCON_HIGH_SNVS_A[src]

Get enumerated values variant

pub fn is_discon_high_snvs_0(&self) -> bool[src]

Checks if the value of the field is DISCON_HIGH_SNVS_0

pub fn is_discon_high_snvs_1(&self) -> bool[src]

Checks if the value of the field is DISCON_HIGH_SNVS_1

impl R<u8, OSC_I_A>[src]

pub fn variant(&self) -> OSC_I_A[src]

Get enumerated values variant

pub fn is_nominal(&self) -> bool[src]

Checks if the value of the field is NOMINAL

pub fn is_minus_12_5_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_12_5_PERCENT

pub fn is_minus_25_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_25_PERCENT

pub fn is_minus_37_5_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_37_5_PERCENT

impl R<bool, CLKGATE_CTRL_A>[src]

pub fn variant(&self) -> CLKGATE_CTRL_A[src]

Get enumerated values variant

pub fn is_allow_auto_gate(&self) -> bool[src]

Checks if the value of the field is ALLOW_AUTO_GATE

pub fn is_no_auto_gate(&self) -> bool[src]

Checks if the value of the field is NO_AUTO_GATE

impl R<u8, CLKGATE_DELAY_A>[src]

pub fn variant(&self) -> CLKGATE_DELAY_A[src]

Get enumerated values variant

pub fn is_clkgate_delay_0(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_0

pub fn is_clkgate_delay_1(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_1

pub fn is_clkgate_delay_2(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_2

pub fn is_clkgate_delay_3(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_3

pub fn is_clkgate_delay_4(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_4

pub fn is_clkgate_delay_5(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_5

pub fn is_clkgate_delay_6(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_6

pub fn is_clkgate_delay_7(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_7

impl R<bool, RTC_XTAL_SOURCE_A>[src]

pub fn variant(&self) -> RTC_XTAL_SOURCE_A[src]

Get enumerated values variant

pub fn is_rtc_xtal_source_0(&self) -> bool[src]

Checks if the value of the field is RTC_XTAL_SOURCE_0

pub fn is_rtc_xtal_source_1(&self) -> bool[src]

Checks if the value of the field is RTC_XTAL_SOURCE_1

impl R<bool, VID_PLL_PREDIV_A>[src]

pub fn variant(&self) -> VID_PLL_PREDIV_A[src]

Get enumerated values variant

pub fn is_vid_pll_prediv_0(&self) -> bool[src]

Checks if the value of the field is VID_PLL_PREDIV_0

pub fn is_vid_pll_prediv_1(&self) -> bool[src]

Checks if the value of the field is VID_PLL_PREDIV_1

impl R<u32, Reg<u32, _MISC0>>[src]

pub fn reftop_pwd(&self) -> REFTOP_PWD_R[src]

Bit 0 - Control bit to power-down the analog bandgap reference circuitry

pub fn reftop_selfbiasoff(&self) -> REFTOP_SELFBIASOFF_R[src]

Bit 3 - Control bit to disable the self-bias circuit in the analog bandgap

pub fn reftop_vbgadj(&self) -> REFTOP_VBGADJ_R[src]

Bits 4:6 - Not related to oscillator.

pub fn reftop_vbgup(&self) -> REFTOP_VBGUP_R[src]

Bit 7 - Status bit that signals the analog bandgap voltage is up and stable

pub fn stop_mode_config(&self) -> STOP_MODE_CONFIG_R[src]

Bits 10:11 - Configure the analog behavior in stop mode.Not related to oscillator.

pub fn discon_high_snvs(&self) -> DISCON_HIGH_SNVS_R[src]

Bit 12 - This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.

pub fn osc_i(&self) -> OSC_I_R[src]

Bits 13:14 - This field determines the bias current in the 24MHz oscillator

pub fn osc_xtalok(&self) -> OSC_XTALOK_R[src]

Bit 15 - Status bit that signals that the output of the 24-MHz crystal oscillator is stable

pub fn osc_xtalok_en(&self) -> OSC_XTALOK_EN_R[src]

Bit 16 - This bit enables the detector that signals when the 24MHz crystal oscillator is stable.

pub fn clkgate_ctrl(&self) -> CLKGATE_CTRL_R[src]

Bit 25 - This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block

pub fn clkgate_delay(&self) -> CLKGATE_DELAY_R[src]

Bits 26:28 - This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block

pub fn rtc_xtal_source(&self) -> RTC_XTAL_SOURCE_R[src]

Bit 29 - This field indicates which chip source is being used for the rtc clock.

pub fn xtal_24m_pwd(&self) -> XTAL_24M_PWD_R[src]

Bit 30 - This field powers down the 24M crystal oscillator if set true.

pub fn vid_pll_prediv(&self) -> VID_PLL_PREDIV_R[src]

Bit 31 - Predivider for the source clock of the PLL's. Not related to oscillator.

impl R<bool, REFTOP_SELFBIASOFF_A>[src]

pub fn variant(&self) -> REFTOP_SELFBIASOFF_A[src]

Get enumerated values variant

pub fn is_reftop_selfbiasoff_0(&self) -> bool[src]

Checks if the value of the field is REFTOP_SELFBIASOFF_0

pub fn is_reftop_selfbiasoff_1(&self) -> bool[src]

Checks if the value of the field is REFTOP_SELFBIASOFF_1

impl R<u8, REFTOP_VBGADJ_A>[src]

pub fn variant(&self) -> REFTOP_VBGADJ_A[src]

Get enumerated values variant

pub fn is_reftop_vbgadj_0(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_0

pub fn is_reftop_vbgadj_1(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_1

pub fn is_reftop_vbgadj_2(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_2

pub fn is_reftop_vbgadj_3(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_3

pub fn is_reftop_vbgadj_4(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_4

pub fn is_reftop_vbgadj_5(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_5

pub fn is_reftop_vbgadj_6(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_6

pub fn is_reftop_vbgadj_7(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_7

impl R<u8, STOP_MODE_CONFIG_A>[src]

pub fn variant(&self) -> STOP_MODE_CONFIG_A[src]

Get enumerated values variant

pub fn is_stop_mode_config_0(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_0

pub fn is_stop_mode_config_1(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_1

pub fn is_stop_mode_config_2(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_2

pub fn is_stop_mode_config_3(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_3

impl R<bool, DISCON_HIGH_SNVS_A>[src]

pub fn variant(&self) -> DISCON_HIGH_SNVS_A[src]

Get enumerated values variant

pub fn is_discon_high_snvs_0(&self) -> bool[src]

Checks if the value of the field is DISCON_HIGH_SNVS_0

pub fn is_discon_high_snvs_1(&self) -> bool[src]

Checks if the value of the field is DISCON_HIGH_SNVS_1

impl R<u8, OSC_I_A>[src]

pub fn variant(&self) -> OSC_I_A[src]

Get enumerated values variant

pub fn is_nominal(&self) -> bool[src]

Checks if the value of the field is NOMINAL

pub fn is_minus_12_5_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_12_5_PERCENT

pub fn is_minus_25_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_25_PERCENT

pub fn is_minus_37_5_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_37_5_PERCENT

impl R<bool, CLKGATE_CTRL_A>[src]

pub fn variant(&self) -> CLKGATE_CTRL_A[src]

Get enumerated values variant

pub fn is_allow_auto_gate(&self) -> bool[src]

Checks if the value of the field is ALLOW_AUTO_GATE

pub fn is_no_auto_gate(&self) -> bool[src]

Checks if the value of the field is NO_AUTO_GATE

impl R<u8, CLKGATE_DELAY_A>[src]

pub fn variant(&self) -> CLKGATE_DELAY_A[src]

Get enumerated values variant

pub fn is_clkgate_delay_0(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_0

pub fn is_clkgate_delay_1(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_1

pub fn is_clkgate_delay_2(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_2

pub fn is_clkgate_delay_3(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_3

pub fn is_clkgate_delay_4(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_4

pub fn is_clkgate_delay_5(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_5

pub fn is_clkgate_delay_6(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_6

pub fn is_clkgate_delay_7(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_7

impl R<bool, RTC_XTAL_SOURCE_A>[src]

pub fn variant(&self) -> RTC_XTAL_SOURCE_A[src]

Get enumerated values variant

pub fn is_rtc_xtal_source_0(&self) -> bool[src]

Checks if the value of the field is RTC_XTAL_SOURCE_0

pub fn is_rtc_xtal_source_1(&self) -> bool[src]

Checks if the value of the field is RTC_XTAL_SOURCE_1

impl R<bool, VID_PLL_PREDIV_A>[src]

pub fn variant(&self) -> VID_PLL_PREDIV_A[src]

Get enumerated values variant

pub fn is_vid_pll_prediv_0(&self) -> bool[src]

Checks if the value of the field is VID_PLL_PREDIV_0

pub fn is_vid_pll_prediv_1(&self) -> bool[src]

Checks if the value of the field is VID_PLL_PREDIV_1

impl R<u32, Reg<u32, _MISC0_SET>>[src]

pub fn reftop_pwd(&self) -> REFTOP_PWD_R[src]

Bit 0 - Control bit to power-down the analog bandgap reference circuitry

pub fn reftop_selfbiasoff(&self) -> REFTOP_SELFBIASOFF_R[src]

Bit 3 - Control bit to disable the self-bias circuit in the analog bandgap

pub fn reftop_vbgadj(&self) -> REFTOP_VBGADJ_R[src]

Bits 4:6 - Not related to oscillator.

pub fn reftop_vbgup(&self) -> REFTOP_VBGUP_R[src]

Bit 7 - Status bit that signals the analog bandgap voltage is up and stable

pub fn stop_mode_config(&self) -> STOP_MODE_CONFIG_R[src]

Bits 10:11 - Configure the analog behavior in stop mode.Not related to oscillator.

pub fn discon_high_snvs(&self) -> DISCON_HIGH_SNVS_R[src]

Bit 12 - This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.

pub fn osc_i(&self) -> OSC_I_R[src]

Bits 13:14 - This field determines the bias current in the 24MHz oscillator

pub fn osc_xtalok(&self) -> OSC_XTALOK_R[src]

Bit 15 - Status bit that signals that the output of the 24-MHz crystal oscillator is stable

pub fn osc_xtalok_en(&self) -> OSC_XTALOK_EN_R[src]

Bit 16 - This bit enables the detector that signals when the 24MHz crystal oscillator is stable.

pub fn clkgate_ctrl(&self) -> CLKGATE_CTRL_R[src]

Bit 25 - This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block

pub fn clkgate_delay(&self) -> CLKGATE_DELAY_R[src]

Bits 26:28 - This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block

pub fn rtc_xtal_source(&self) -> RTC_XTAL_SOURCE_R[src]

Bit 29 - This field indicates which chip source is being used for the rtc clock.

pub fn xtal_24m_pwd(&self) -> XTAL_24M_PWD_R[src]

Bit 30 - This field powers down the 24M crystal oscillator if set true.

pub fn vid_pll_prediv(&self) -> VID_PLL_PREDIV_R[src]

Bit 31 - Predivider for the source clock of the PLL's. Not related to oscillator.

impl R<bool, REFTOP_SELFBIASOFF_A>[src]

pub fn variant(&self) -> REFTOP_SELFBIASOFF_A[src]

Get enumerated values variant

pub fn is_reftop_selfbiasoff_0(&self) -> bool[src]

Checks if the value of the field is REFTOP_SELFBIASOFF_0

pub fn is_reftop_selfbiasoff_1(&self) -> bool[src]

Checks if the value of the field is REFTOP_SELFBIASOFF_1

impl R<u8, REFTOP_VBGADJ_A>[src]

pub fn variant(&self) -> REFTOP_VBGADJ_A[src]

Get enumerated values variant

pub fn is_reftop_vbgadj_0(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_0

pub fn is_reftop_vbgadj_1(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_1

pub fn is_reftop_vbgadj_2(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_2

pub fn is_reftop_vbgadj_3(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_3

pub fn is_reftop_vbgadj_4(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_4

pub fn is_reftop_vbgadj_5(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_5

pub fn is_reftop_vbgadj_6(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_6

pub fn is_reftop_vbgadj_7(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_7

impl R<u8, STOP_MODE_CONFIG_A>[src]

pub fn variant(&self) -> STOP_MODE_CONFIG_A[src]

Get enumerated values variant

pub fn is_stop_mode_config_0(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_0

pub fn is_stop_mode_config_1(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_1

pub fn is_stop_mode_config_2(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_2

pub fn is_stop_mode_config_3(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_3

impl R<bool, DISCON_HIGH_SNVS_A>[src]

pub fn variant(&self) -> DISCON_HIGH_SNVS_A[src]

Get enumerated values variant

pub fn is_discon_high_snvs_0(&self) -> bool[src]

Checks if the value of the field is DISCON_HIGH_SNVS_0

pub fn is_discon_high_snvs_1(&self) -> bool[src]

Checks if the value of the field is DISCON_HIGH_SNVS_1

impl R<u8, OSC_I_A>[src]

pub fn variant(&self) -> OSC_I_A[src]

Get enumerated values variant

pub fn is_nominal(&self) -> bool[src]

Checks if the value of the field is NOMINAL

pub fn is_minus_12_5_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_12_5_PERCENT

pub fn is_minus_25_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_25_PERCENT

pub fn is_minus_37_5_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_37_5_PERCENT

impl R<bool, CLKGATE_CTRL_A>[src]

pub fn variant(&self) -> CLKGATE_CTRL_A[src]

Get enumerated values variant

pub fn is_allow_auto_gate(&self) -> bool[src]

Checks if the value of the field is ALLOW_AUTO_GATE

pub fn is_no_auto_gate(&self) -> bool[src]

Checks if the value of the field is NO_AUTO_GATE

impl R<u8, CLKGATE_DELAY_A>[src]

pub fn variant(&self) -> CLKGATE_DELAY_A[src]

Get enumerated values variant

pub fn is_clkgate_delay_0(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_0

pub fn is_clkgate_delay_1(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_1

pub fn is_clkgate_delay_2(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_2

pub fn is_clkgate_delay_3(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_3

pub fn is_clkgate_delay_4(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_4

pub fn is_clkgate_delay_5(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_5

pub fn is_clkgate_delay_6(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_6

pub fn is_clkgate_delay_7(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_7

impl R<bool, RTC_XTAL_SOURCE_A>[src]

pub fn variant(&self) -> RTC_XTAL_SOURCE_A[src]

Get enumerated values variant

pub fn is_rtc_xtal_source_0(&self) -> bool[src]

Checks if the value of the field is RTC_XTAL_SOURCE_0

pub fn is_rtc_xtal_source_1(&self) -> bool[src]

Checks if the value of the field is RTC_XTAL_SOURCE_1

impl R<bool, VID_PLL_PREDIV_A>[src]

pub fn variant(&self) -> VID_PLL_PREDIV_A[src]

Get enumerated values variant

pub fn is_vid_pll_prediv_0(&self) -> bool[src]

Checks if the value of the field is VID_PLL_PREDIV_0

pub fn is_vid_pll_prediv_1(&self) -> bool[src]

Checks if the value of the field is VID_PLL_PREDIV_1

impl R<u32, Reg<u32, _MISC0_CLR>>[src]

pub fn reftop_pwd(&self) -> REFTOP_PWD_R[src]

Bit 0 - Control bit to power-down the analog bandgap reference circuitry

pub fn reftop_selfbiasoff(&self) -> REFTOP_SELFBIASOFF_R[src]

Bit 3 - Control bit to disable the self-bias circuit in the analog bandgap

pub fn reftop_vbgadj(&self) -> REFTOP_VBGADJ_R[src]

Bits 4:6 - Not related to oscillator.

pub fn reftop_vbgup(&self) -> REFTOP_VBGUP_R[src]

Bit 7 - Status bit that signals the analog bandgap voltage is up and stable

pub fn stop_mode_config(&self) -> STOP_MODE_CONFIG_R[src]

Bits 10:11 - Configure the analog behavior in stop mode.Not related to oscillator.

pub fn discon_high_snvs(&self) -> DISCON_HIGH_SNVS_R[src]

Bit 12 - This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.

pub fn osc_i(&self) -> OSC_I_R[src]

Bits 13:14 - This field determines the bias current in the 24MHz oscillator

pub fn osc_xtalok(&self) -> OSC_XTALOK_R[src]

Bit 15 - Status bit that signals that the output of the 24-MHz crystal oscillator is stable

pub fn osc_xtalok_en(&self) -> OSC_XTALOK_EN_R[src]

Bit 16 - This bit enables the detector that signals when the 24MHz crystal oscillator is stable.

pub fn clkgate_ctrl(&self) -> CLKGATE_CTRL_R[src]

Bit 25 - This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block

pub fn clkgate_delay(&self) -> CLKGATE_DELAY_R[src]

Bits 26:28 - This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block

pub fn rtc_xtal_source(&self) -> RTC_XTAL_SOURCE_R[src]

Bit 29 - This field indicates which chip source is being used for the rtc clock.

pub fn xtal_24m_pwd(&self) -> XTAL_24M_PWD_R[src]

Bit 30 - This field powers down the 24M crystal oscillator if set true.

pub fn vid_pll_prediv(&self) -> VID_PLL_PREDIV_R[src]

Bit 31 - Predivider for the source clock of the PLL's. Not related to oscillator.

impl R<bool, REFTOP_SELFBIASOFF_A>[src]

pub fn variant(&self) -> REFTOP_SELFBIASOFF_A[src]

Get enumerated values variant

pub fn is_reftop_selfbiasoff_0(&self) -> bool[src]

Checks if the value of the field is REFTOP_SELFBIASOFF_0

pub fn is_reftop_selfbiasoff_1(&self) -> bool[src]

Checks if the value of the field is REFTOP_SELFBIASOFF_1

impl R<u8, REFTOP_VBGADJ_A>[src]

pub fn variant(&self) -> REFTOP_VBGADJ_A[src]

Get enumerated values variant

pub fn is_reftop_vbgadj_0(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_0

pub fn is_reftop_vbgadj_1(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_1

pub fn is_reftop_vbgadj_2(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_2

pub fn is_reftop_vbgadj_3(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_3

pub fn is_reftop_vbgadj_4(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_4

pub fn is_reftop_vbgadj_5(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_5

pub fn is_reftop_vbgadj_6(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_6

pub fn is_reftop_vbgadj_7(&self) -> bool[src]

Checks if the value of the field is REFTOP_VBGADJ_7

impl R<u8, STOP_MODE_CONFIG_A>[src]

pub fn variant(&self) -> STOP_MODE_CONFIG_A[src]

Get enumerated values variant

pub fn is_stop_mode_config_0(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_0

pub fn is_stop_mode_config_1(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_1

pub fn is_stop_mode_config_2(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_2

pub fn is_stop_mode_config_3(&self) -> bool[src]

Checks if the value of the field is STOP_MODE_CONFIG_3

impl R<bool, DISCON_HIGH_SNVS_A>[src]

pub fn variant(&self) -> DISCON_HIGH_SNVS_A[src]

Get enumerated values variant

pub fn is_discon_high_snvs_0(&self) -> bool[src]

Checks if the value of the field is DISCON_HIGH_SNVS_0

pub fn is_discon_high_snvs_1(&self) -> bool[src]

Checks if the value of the field is DISCON_HIGH_SNVS_1

impl R<u8, OSC_I_A>[src]

pub fn variant(&self) -> OSC_I_A[src]

Get enumerated values variant

pub fn is_nominal(&self) -> bool[src]

Checks if the value of the field is NOMINAL

pub fn is_minus_12_5_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_12_5_PERCENT

pub fn is_minus_25_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_25_PERCENT

pub fn is_minus_37_5_percent(&self) -> bool[src]

Checks if the value of the field is MINUS_37_5_PERCENT

impl R<bool, CLKGATE_CTRL_A>[src]

pub fn variant(&self) -> CLKGATE_CTRL_A[src]

Get enumerated values variant

pub fn is_allow_auto_gate(&self) -> bool[src]

Checks if the value of the field is ALLOW_AUTO_GATE

pub fn is_no_auto_gate(&self) -> bool[src]

Checks if the value of the field is NO_AUTO_GATE

impl R<u8, CLKGATE_DELAY_A>[src]

pub fn variant(&self) -> CLKGATE_DELAY_A[src]

Get enumerated values variant

pub fn is_clkgate_delay_0(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_0

pub fn is_clkgate_delay_1(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_1

pub fn is_clkgate_delay_2(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_2

pub fn is_clkgate_delay_3(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_3

pub fn is_clkgate_delay_4(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_4

pub fn is_clkgate_delay_5(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_5

pub fn is_clkgate_delay_6(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_6

pub fn is_clkgate_delay_7(&self) -> bool[src]

Checks if the value of the field is CLKGATE_DELAY_7

impl R<bool, RTC_XTAL_SOURCE_A>[src]

pub fn variant(&self) -> RTC_XTAL_SOURCE_A[src]

Get enumerated values variant

pub fn is_rtc_xtal_source_0(&self) -> bool[src]

Checks if the value of the field is RTC_XTAL_SOURCE_0

pub fn is_rtc_xtal_source_1(&self) -> bool[src]

Checks if the value of the field is RTC_XTAL_SOURCE_1

impl R<bool, VID_PLL_PREDIV_A>[src]

pub fn variant(&self) -> VID_PLL_PREDIV_A[src]

Get enumerated values variant

pub fn is_vid_pll_prediv_0(&self) -> bool[src]

Checks if the value of the field is VID_PLL_PREDIV_0

pub fn is_vid_pll_prediv_1(&self) -> bool[src]

Checks if the value of the field is VID_PLL_PREDIV_1

impl R<u32, Reg<u32, _MISC0_TOG>>[src]

pub fn reftop_pwd(&self) -> REFTOP_PWD_R[src]

Bit 0 - Control bit to power-down the analog bandgap reference circuitry

pub fn reftop_selfbiasoff(&self) -> REFTOP_SELFBIASOFF_R[src]

Bit 3 - Control bit to disable the self-bias circuit in the analog bandgap

pub fn reftop_vbgadj(&self) -> REFTOP_VBGADJ_R[src]

Bits 4:6 - Not related to oscillator.

pub fn reftop_vbgup(&self) -> REFTOP_VBGUP_R[src]

Bit 7 - Status bit that signals the analog bandgap voltage is up and stable

pub fn stop_mode_config(&self) -> STOP_MODE_CONFIG_R[src]

Bits 10:11 - Configure the analog behavior in stop mode.Not related to oscillator.

pub fn discon_high_snvs(&self) -> DISCON_HIGH_SNVS_R[src]

Bit 12 - This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.

pub fn osc_i(&self) -> OSC_I_R[src]

Bits 13:14 - This field determines the bias current in the 24MHz oscillator

pub fn osc_xtalok(&self) -> OSC_XTALOK_R[src]

Bit 15 - Status bit that signals that the output of the 24-MHz crystal oscillator is stable

pub fn osc_xtalok_en(&self) -> OSC_XTALOK_EN_R[src]

Bit 16 - This bit enables the detector that signals when the 24MHz crystal oscillator is stable.

pub fn clkgate_ctrl(&self) -> CLKGATE_CTRL_R[src]

Bit 25 - This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block

pub fn clkgate_delay(&self) -> CLKGATE_DELAY_R[src]

Bits 26:28 - This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block

pub fn rtc_xtal_source(&self) -> RTC_XTAL_SOURCE_R[src]

Bit 29 - This field indicates which chip source is being used for the rtc clock.

pub fn xtal_24m_pwd(&self) -> XTAL_24M_PWD_R[src]

Bit 30 - This field powers down the 24M crystal oscillator if set true.

pub fn vid_pll_prediv(&self) -> VID_PLL_PREDIV_R[src]

Bit 31 - Predivider for the source clock of the PLL's. Not related to oscillator.

impl R<bool, RC_OSC_EN_A>[src]

pub fn variant(&self) -> RC_OSC_EN_A[src]

Get enumerated values variant

pub fn is_rc_osc_en_0(&self) -> bool[src]

Checks if the value of the field is RC_OSC_EN_0

pub fn is_rc_osc_en_1(&self) -> bool[src]

Checks if the value of the field is RC_OSC_EN_1

impl R<bool, OSC_SEL_A>[src]

pub fn variant(&self) -> OSC_SEL_A[src]

Get enumerated values variant

pub fn is_osc_sel_0(&self) -> bool[src]

Checks if the value of the field is OSC_SEL_0

pub fn is_osc_sel_1(&self) -> bool[src]

Checks if the value of the field is OSC_SEL_1

impl R<bool, LPBG_SEL_A>[src]

pub fn variant(&self) -> LPBG_SEL_A[src]

Get enumerated values variant

pub fn is_lpbg_sel_0(&self) -> bool[src]

Checks if the value of the field is LPBG_SEL_0

pub fn is_lpbg_sel_1(&self) -> bool[src]

Checks if the value of the field is LPBG_SEL_1

impl R<u8, XTALOSC_PWRUP_DELAY_A>[src]

pub fn variant(&self) -> XTALOSC_PWRUP_DELAY_A[src]

Get enumerated values variant

pub fn is_xtalosc_pwrup_delay_0(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_0

pub fn is_xtalosc_pwrup_delay_1(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_1

pub fn is_xtalosc_pwrup_delay_2(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_2

pub fn is_xtalosc_pwrup_delay_3(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_3

impl R<bool, XTALOSC_PWRUP_STAT_A>[src]

pub fn variant(&self) -> XTALOSC_PWRUP_STAT_A[src]

Get enumerated values variant

pub fn is_xtalosc_pwrup_stat_0(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_STAT_0

pub fn is_xtalosc_pwrup_stat_1(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_STAT_1

impl R<u32, Reg<u32, _LOWPWR_CTRL>>[src]

pub fn rc_osc_en(&self) -> RC_OSC_EN_R[src]

Bit 0 - RC Osc. enable control.

pub fn osc_sel(&self) -> OSC_SEL_R[src]

Bit 4 - Select the source for the 24MHz clock.

pub fn lpbg_sel(&self) -> LPBG_SEL_R[src]

Bit 5 - Bandgap select. Not related to oscillator.

pub fn lpbg_test(&self) -> LPBG_TEST_R[src]

Bit 6 - Low power bandgap test bit. Not related to oscillator.

pub fn reftop_ibias_off(&self) -> REFTOP_IBIAS_OFF_R[src]

Bit 7 - Low power reftop ibias disable. Not related to oscillator.

pub fn l1_pwrgate(&self) -> L1_PWRGATE_R[src]

Bit 8 - L1 power gate control. Used as software override. Not related to oscillator.

pub fn l2_pwrgate(&self) -> L2_PWRGATE_R[src]

Bit 9 - L2 power gate control. Used as software override. Not related to oscillator.

pub fn cpu_pwrgate(&self) -> CPU_PWRGATE_R[src]

Bit 10 - CPU power gate control. Used as software override. Test purpose only Not related to oscillator.

pub fn display_pwrgate(&self) -> DISPLAY_PWRGATE_R[src]

Bit 11 - Display logic power gate control. Used as software override. Not related to oscillator.

pub fn rcosc_cg_override(&self) -> RCOSC_CG_OVERRIDE_R[src]

Bit 13 - For debug purposes only

pub fn xtalosc_pwrup_delay(&self) -> XTALOSC_PWRUP_DELAY_R[src]

Bits 14:15 - Specifies the time delay between when the 24MHz xtal is powered up until it is stable and ready to use

pub fn xtalosc_pwrup_stat(&self) -> XTALOSC_PWRUP_STAT_R[src]

Bit 16 - Status of the 24MHz xtal oscillator.

pub fn mix_pwrgate(&self) -> MIX_PWRGATE_R[src]

Bit 17 - Display power gate control. Used as software mask. Set to zero to force ungated.

pub fn gpu_pwrgate(&self) -> GPU_PWRGATE_R[src]

Bit 18 - GPU power gate control. Used as software mask. Set to zero to force ungated.

impl R<bool, RC_OSC_EN_A>[src]

pub fn variant(&self) -> RC_OSC_EN_A[src]

Get enumerated values variant

pub fn is_rc_osc_en_0(&self) -> bool[src]

Checks if the value of the field is RC_OSC_EN_0

pub fn is_rc_osc_en_1(&self) -> bool[src]

Checks if the value of the field is RC_OSC_EN_1

impl R<bool, OSC_SEL_A>[src]

pub fn variant(&self) -> OSC_SEL_A[src]

Get enumerated values variant

pub fn is_osc_sel_0(&self) -> bool[src]

Checks if the value of the field is OSC_SEL_0

pub fn is_osc_sel_1(&self) -> bool[src]

Checks if the value of the field is OSC_SEL_1

impl R<bool, LPBG_SEL_A>[src]

pub fn variant(&self) -> LPBG_SEL_A[src]

Get enumerated values variant

pub fn is_lpbg_sel_0(&self) -> bool[src]

Checks if the value of the field is LPBG_SEL_0

pub fn is_lpbg_sel_1(&self) -> bool[src]

Checks if the value of the field is LPBG_SEL_1

impl R<u8, XTALOSC_PWRUP_DELAY_A>[src]

pub fn variant(&self) -> XTALOSC_PWRUP_DELAY_A[src]

Get enumerated values variant

pub fn is_xtalosc_pwrup_delay_0(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_0

pub fn is_xtalosc_pwrup_delay_1(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_1

pub fn is_xtalosc_pwrup_delay_2(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_2

pub fn is_xtalosc_pwrup_delay_3(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_3

impl R<bool, XTALOSC_PWRUP_STAT_A>[src]

pub fn variant(&self) -> XTALOSC_PWRUP_STAT_A[src]

Get enumerated values variant

pub fn is_xtalosc_pwrup_stat_0(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_STAT_0

pub fn is_xtalosc_pwrup_stat_1(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_STAT_1

impl R<u32, Reg<u32, _LOWPWR_CTRL_SET>>[src]

pub fn rc_osc_en(&self) -> RC_OSC_EN_R[src]

Bit 0 - RC Osc. enable control.

pub fn osc_sel(&self) -> OSC_SEL_R[src]

Bit 4 - Select the source for the 24MHz clock.

pub fn lpbg_sel(&self) -> LPBG_SEL_R[src]

Bit 5 - Bandgap select. Not related to oscillator.

pub fn lpbg_test(&self) -> LPBG_TEST_R[src]

Bit 6 - Low power bandgap test bit. Not related to oscillator.

pub fn reftop_ibias_off(&self) -> REFTOP_IBIAS_OFF_R[src]

Bit 7 - Low power reftop ibias disable. Not related to oscillator.

pub fn l1_pwrgate(&self) -> L1_PWRGATE_R[src]

Bit 8 - L1 power gate control. Used as software override. Not related to oscillator.

pub fn l2_pwrgate(&self) -> L2_PWRGATE_R[src]

Bit 9 - L2 power gate control. Used as software override. Not related to oscillator.

pub fn cpu_pwrgate(&self) -> CPU_PWRGATE_R[src]

Bit 10 - CPU power gate control. Used as software override. Test purpose only Not related to oscillator.

pub fn display_pwrgate(&self) -> DISPLAY_PWRGATE_R[src]

Bit 11 - Display logic power gate control. Used as software override. Not related to oscillator.

pub fn rcosc_cg_override(&self) -> RCOSC_CG_OVERRIDE_R[src]

Bit 13 - For debug purposes only

pub fn xtalosc_pwrup_delay(&self) -> XTALOSC_PWRUP_DELAY_R[src]

Bits 14:15 - Specifies the time delay between when the 24MHz xtal is powered up until it is stable and ready to use

pub fn xtalosc_pwrup_stat(&self) -> XTALOSC_PWRUP_STAT_R[src]

Bit 16 - Status of the 24MHz xtal oscillator.

pub fn mix_pwrgate(&self) -> MIX_PWRGATE_R[src]

Bit 17 - Display power gate control. Used as software mask. Set to zero to force ungated.

pub fn gpu_pwrgate(&self) -> GPU_PWRGATE_R[src]

Bit 18 - GPU power gate control. Used as software mask. Set to zero to force ungated.

impl R<bool, RC_OSC_EN_A>[src]

pub fn variant(&self) -> RC_OSC_EN_A[src]

Get enumerated values variant

pub fn is_rc_osc_en_0(&self) -> bool[src]

Checks if the value of the field is RC_OSC_EN_0

pub fn is_rc_osc_en_1(&self) -> bool[src]

Checks if the value of the field is RC_OSC_EN_1

impl R<bool, OSC_SEL_A>[src]

pub fn variant(&self) -> OSC_SEL_A[src]

Get enumerated values variant

pub fn is_osc_sel_0(&self) -> bool[src]

Checks if the value of the field is OSC_SEL_0

pub fn is_osc_sel_1(&self) -> bool[src]

Checks if the value of the field is OSC_SEL_1

impl R<bool, LPBG_SEL_A>[src]

pub fn variant(&self) -> LPBG_SEL_A[src]

Get enumerated values variant

pub fn is_lpbg_sel_0(&self) -> bool[src]

Checks if the value of the field is LPBG_SEL_0

pub fn is_lpbg_sel_1(&self) -> bool[src]

Checks if the value of the field is LPBG_SEL_1

impl R<u8, XTALOSC_PWRUP_DELAY_A>[src]

pub fn variant(&self) -> XTALOSC_PWRUP_DELAY_A[src]

Get enumerated values variant

pub fn is_xtalosc_pwrup_delay_0(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_0

pub fn is_xtalosc_pwrup_delay_1(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_1

pub fn is_xtalosc_pwrup_delay_2(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_2

pub fn is_xtalosc_pwrup_delay_3(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_3

impl R<bool, XTALOSC_PWRUP_STAT_A>[src]

pub fn variant(&self) -> XTALOSC_PWRUP_STAT_A[src]

Get enumerated values variant

pub fn is_xtalosc_pwrup_stat_0(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_STAT_0

pub fn is_xtalosc_pwrup_stat_1(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_STAT_1

impl R<u32, Reg<u32, _LOWPWR_CTRL_CLR>>[src]

pub fn rc_osc_en(&self) -> RC_OSC_EN_R[src]

Bit 0 - RC Osc. enable control.

pub fn osc_sel(&self) -> OSC_SEL_R[src]

Bit 4 - Select the source for the 24MHz clock.

pub fn lpbg_sel(&self) -> LPBG_SEL_R[src]

Bit 5 - Bandgap select. Not related to oscillator.

pub fn lpbg_test(&self) -> LPBG_TEST_R[src]

Bit 6 - Low power bandgap test bit. Not related to oscillator.

pub fn reftop_ibias_off(&self) -> REFTOP_IBIAS_OFF_R[src]

Bit 7 - Low power reftop ibias disable. Not related to oscillator.

pub fn l1_pwrgate(&self) -> L1_PWRGATE_R[src]

Bit 8 - L1 power gate control. Used as software override. Not related to oscillator.

pub fn l2_pwrgate(&self) -> L2_PWRGATE_R[src]

Bit 9 - L2 power gate control. Used as software override. Not related to oscillator.

pub fn cpu_pwrgate(&self) -> CPU_PWRGATE_R[src]

Bit 10 - CPU power gate control. Used as software override. Test purpose only Not related to oscillator.

pub fn display_pwrgate(&self) -> DISPLAY_PWRGATE_R[src]

Bit 11 - Display logic power gate control. Used as software override. Not related to oscillator.

pub fn rcosc_cg_override(&self) -> RCOSC_CG_OVERRIDE_R[src]

Bit 13 - For debug purposes only

pub fn xtalosc_pwrup_delay(&self) -> XTALOSC_PWRUP_DELAY_R[src]

Bits 14:15 - Specifies the time delay between when the 24MHz xtal is powered up until it is stable and ready to use

pub fn xtalosc_pwrup_stat(&self) -> XTALOSC_PWRUP_STAT_R[src]

Bit 16 - Status of the 24MHz xtal oscillator.

pub fn mix_pwrgate(&self) -> MIX_PWRGATE_R[src]

Bit 17 - Display power gate control. Used as software mask. Set to zero to force ungated.

pub fn gpu_pwrgate(&self) -> GPU_PWRGATE_R[src]

Bit 18 - GPU power gate control. Used as software mask. Set to zero to force ungated.

impl R<bool, RC_OSC_EN_A>[src]

pub fn variant(&self) -> RC_OSC_EN_A[src]

Get enumerated values variant

pub fn is_rc_osc_en_0(&self) -> bool[src]

Checks if the value of the field is RC_OSC_EN_0

pub fn is_rc_osc_en_1(&self) -> bool[src]

Checks if the value of the field is RC_OSC_EN_1

impl R<bool, OSC_SEL_A>[src]

pub fn variant(&self) -> OSC_SEL_A[src]

Get enumerated values variant

pub fn is_osc_sel_0(&self) -> bool[src]

Checks if the value of the field is OSC_SEL_0

pub fn is_osc_sel_1(&self) -> bool[src]

Checks if the value of the field is OSC_SEL_1

impl R<bool, LPBG_SEL_A>[src]

pub fn variant(&self) -> LPBG_SEL_A[src]

Get enumerated values variant

pub fn is_lpbg_sel_0(&self) -> bool[src]

Checks if the value of the field is LPBG_SEL_0

pub fn is_lpbg_sel_1(&self) -> bool[src]

Checks if the value of the field is LPBG_SEL_1

impl R<u8, XTALOSC_PWRUP_DELAY_A>[src]

pub fn variant(&self) -> XTALOSC_PWRUP_DELAY_A[src]

Get enumerated values variant

pub fn is_xtalosc_pwrup_delay_0(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_0

pub fn is_xtalosc_pwrup_delay_1(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_1

pub fn is_xtalosc_pwrup_delay_2(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_2

pub fn is_xtalosc_pwrup_delay_3(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_DELAY_3

impl R<bool, XTALOSC_PWRUP_STAT_A>[src]

pub fn variant(&self) -> XTALOSC_PWRUP_STAT_A[src]

Get enumerated values variant

pub fn is_xtalosc_pwrup_stat_0(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_STAT_0

pub fn is_xtalosc_pwrup_stat_1(&self) -> bool[src]

Checks if the value of the field is XTALOSC_PWRUP_STAT_1

impl R<u32, Reg<u32, _LOWPWR_CTRL_TOG>>[src]

pub fn rc_osc_en(&self) -> RC_OSC_EN_R[src]

Bit 0 - RC Osc. enable control.

pub fn osc_sel(&self) -> OSC_SEL_R[src]

Bit 4 - Select the source for the 24MHz clock.

pub fn lpbg_sel(&self) -> LPBG_SEL_R[src]

Bit 5 - Bandgap select. Not related to oscillator.

pub fn lpbg_test(&self) -> LPBG_TEST_R[src]

Bit 6 - Low power bandgap test bit. Not related to oscillator.

pub fn reftop_ibias_off(&self) -> REFTOP_IBIAS_OFF_R[src]

Bit 7 - Low power reftop ibias disable. Not related to oscillator.

pub fn l1_pwrgate(&self) -> L1_PWRGATE_R[src]

Bit 8 - L1 power gate control. Used as software override. Not related to oscillator.

pub fn l2_pwrgate(&self) -> L2_PWRGATE_R[src]

Bit 9 - L2 power gate control. Used as software override. Not related to oscillator.

pub fn cpu_pwrgate(&self) -> CPU_PWRGATE_R[src]

Bit 10 - CPU power gate control. Used as software override. Test purpose only Not related to oscillator.

pub fn display_pwrgate(&self) -> DISPLAY_PWRGATE_R[src]

Bit 11 - Display logic power gate control. Used as software override. Not related to oscillator.

pub fn rcosc_cg_override(&self) -> RCOSC_CG_OVERRIDE_R[src]

Bit 13 - For debug purposes only

pub fn xtalosc_pwrup_delay(&self) -> XTALOSC_PWRUP_DELAY_R[src]

Bits 14:15 - Specifies the time delay between when the 24MHz xtal is powered up until it is stable and ready to use

pub fn xtalosc_pwrup_stat(&self) -> XTALOSC_PWRUP_STAT_R[src]

Bit 16 - Status of the 24MHz xtal oscillator.

pub fn mix_pwrgate(&self) -> MIX_PWRGATE_R[src]

Bit 17 - Display power gate control. Used as software mask. Set to zero to force ungated.

pub fn gpu_pwrgate(&self) -> GPU_PWRGATE_R[src]

Bit 18 - GPU power gate control. Used as software mask. Set to zero to force ungated.

impl R<u32, Reg<u32, _OSC_CONFIG0>>[src]

pub fn start(&self) -> START_R[src]

Bit 0 - Start/stop bit for the RC tuning calculation logic. If stopped the tuning logic is reset.

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enables the tuning logic to calculate new RC tuning values

pub fn bypass(&self) -> BYPASS_R[src]

Bit 2 - Bypasses any calculated RC tuning value and uses the programmed register value.

pub fn invert(&self) -> INVERT_R[src]

Bit 3 - Invert the stepping of the calculated RC tuning value.

pub fn rc_osc_prog(&self) -> RC_OSC_PROG_R[src]

Bits 4:11 - RC osc. tuning values.

pub fn hyst_plus(&self) -> HYST_PLUS_R[src]

Bits 12:15 - Positive hysteresis value

pub fn hyst_minus(&self) -> HYST_MINUS_R[src]

Bits 16:19 - Negative hysteresis value

pub fn rc_osc_prog_cur(&self) -> RC_OSC_PROG_CUR_R[src]

Bits 24:31 - The current tuning value in use.

impl R<u32, Reg<u32, _OSC_CONFIG0_SET>>[src]

pub fn start(&self) -> START_R[src]

Bit 0 - Start/stop bit for the RC tuning calculation logic. If stopped the tuning logic is reset.

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enables the tuning logic to calculate new RC tuning values

pub fn bypass(&self) -> BYPASS_R[src]

Bit 2 - Bypasses any calculated RC tuning value and uses the programmed register value.

pub fn invert(&self) -> INVERT_R[src]

Bit 3 - Invert the stepping of the calculated RC tuning value.

pub fn rc_osc_prog(&self) -> RC_OSC_PROG_R[src]

Bits 4:11 - RC osc. tuning values.

pub fn hyst_plus(&self) -> HYST_PLUS_R[src]

Bits 12:15 - Positive hysteresis value

pub fn hyst_minus(&self) -> HYST_MINUS_R[src]

Bits 16:19 - Negative hysteresis value

pub fn rc_osc_prog_cur(&self) -> RC_OSC_PROG_CUR_R[src]

Bits 24:31 - The current tuning value in use.

impl R<u32, Reg<u32, _OSC_CONFIG0_CLR>>[src]

pub fn start(&self) -> START_R[src]

Bit 0 - Start/stop bit for the RC tuning calculation logic. If stopped the tuning logic is reset.

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enables the tuning logic to calculate new RC tuning values

pub fn bypass(&self) -> BYPASS_R[src]

Bit 2 - Bypasses any calculated RC tuning value and uses the programmed register value.

pub fn invert(&self) -> INVERT_R[src]

Bit 3 - Invert the stepping of the calculated RC tuning value.

pub fn rc_osc_prog(&self) -> RC_OSC_PROG_R[src]

Bits 4:11 - RC osc. tuning values.

pub fn hyst_plus(&self) -> HYST_PLUS_R[src]

Bits 12:15 - Positive hysteresis value

pub fn hyst_minus(&self) -> HYST_MINUS_R[src]

Bits 16:19 - Negative hysteresis value

pub fn rc_osc_prog_cur(&self) -> RC_OSC_PROG_CUR_R[src]

Bits 24:31 - The current tuning value in use.

impl R<u32, Reg<u32, _OSC_CONFIG0_TOG>>[src]

pub fn start(&self) -> START_R[src]

Bit 0 - Start/stop bit for the RC tuning calculation logic. If stopped the tuning logic is reset.

pub fn enable(&self) -> ENABLE_R[src]

Bit 1 - Enables the tuning logic to calculate new RC tuning values

pub fn bypass(&self) -> BYPASS_R[src]

Bit 2 - Bypasses any calculated RC tuning value and uses the programmed register value.

pub fn invert(&self) -> INVERT_R[src]

Bit 3 - Invert the stepping of the calculated RC tuning value.

pub fn rc_osc_prog(&self) -> RC_OSC_PROG_R[src]

Bits 4:11 - RC osc. tuning values.

pub fn hyst_plus(&self) -> HYST_PLUS_R[src]

Bits 12:15 - Positive hysteresis value

pub fn hyst_minus(&self) -> HYST_MINUS_R[src]

Bits 16:19 - Negative hysteresis value

pub fn rc_osc_prog_cur(&self) -> RC_OSC_PROG_CUR_R[src]

Bits 24:31 - The current tuning value in use.

impl R<u32, Reg<u32, _OSC_CONFIG1>>[src]

pub fn count_rc_trg(&self) -> COUNT_RC_TRG_R[src]

Bits 0:11 - The target count used to tune the RC OSC frequency

pub fn count_rc_cur(&self) -> COUNT_RC_CUR_R[src]

Bits 20:31 - The current tuning value in use.

impl R<u32, Reg<u32, _OSC_CONFIG1_SET>>[src]

pub fn count_rc_trg(&self) -> COUNT_RC_TRG_R[src]

Bits 0:11 - The target count used to tune the RC OSC frequency

pub fn count_rc_cur(&self) -> COUNT_RC_CUR_R[src]

Bits 20:31 - The current tuning value in use.

impl R<u32, Reg<u32, _OSC_CONFIG1_CLR>>[src]

pub fn count_rc_trg(&self) -> COUNT_RC_TRG_R[src]

Bits 0:11 - The target count used to tune the RC OSC frequency

pub fn count_rc_cur(&self) -> COUNT_RC_CUR_R[src]

Bits 20:31 - The current tuning value in use.

impl R<u32, Reg<u32, _OSC_CONFIG1_TOG>>[src]

pub fn count_rc_trg(&self) -> COUNT_RC_TRG_R[src]

Bits 0:11 - The target count used to tune the RC OSC frequency

pub fn count_rc_cur(&self) -> COUNT_RC_CUR_R[src]

Bits 20:31 - The current tuning value in use.

impl R<u32, Reg<u32, _OSC_CONFIG2>>[src]

pub fn count_1m_trg(&self) -> COUNT_1M_TRG_R[src]

Bits 0:11 - The target count used to tune the 1MHz clock frequency

pub fn enable_1m(&self) -> ENABLE_1M_R[src]

Bit 16 - Enable the 1MHz clock output. 0 - disabled; 1 - enabled.

pub fn mux_1m(&self) -> MUX_1M_R[src]

Bit 17 - Mux the corrected or uncorrected 1MHz clock to the output

pub fn clk_1m_err_fl(&self) -> CLK_1M_ERR_FL_R[src]

Bit 31 - Flag indicates that the count_1m count wasn't reached within 1 32kHz period

impl R<u32, Reg<u32, _OSC_CONFIG2_SET>>[src]

pub fn count_1m_trg(&self) -> COUNT_1M_TRG_R[src]

Bits 0:11 - The target count used to tune the 1MHz clock frequency

pub fn enable_1m(&self) -> ENABLE_1M_R[src]

Bit 16 - Enable the 1MHz clock output. 0 - disabled; 1 - enabled.

pub fn mux_1m(&self) -> MUX_1M_R[src]

Bit 17 - Mux the corrected or uncorrected 1MHz clock to the output

pub fn clk_1m_err_fl(&self) -> CLK_1M_ERR_FL_R[src]

Bit 31 - Flag indicates that the count_1m count wasn't reached within 1 32kHz period

impl R<u32, Reg<u32, _OSC_CONFIG2_CLR>>[src]

pub fn count_1m_trg(&self) -> COUNT_1M_TRG_R[src]

Bits 0:11 - The target count used to tune the 1MHz clock frequency

pub fn enable_1m(&self) -> ENABLE_1M_R[src]

Bit 16 - Enable the 1MHz clock output. 0 - disabled; 1 - enabled.

pub fn mux_1m(&self) -> MUX_1M_R[src]

Bit 17 - Mux the corrected or uncorrected 1MHz clock to the output

pub fn clk_1m_err_fl(&self) -> CLK_1M_ERR_FL_R[src]

Bit 31 - Flag indicates that the count_1m count wasn't reached within 1 32kHz period

impl R<u32, Reg<u32, _OSC_CONFIG2_TOG>>[src]

pub fn count_1m_trg(&self) -> COUNT_1M_TRG_R[src]

Bits 0:11 - The target count used to tune the 1MHz clock frequency

pub fn enable_1m(&self) -> ENABLE_1M_R[src]

Bit 16 - Enable the 1MHz clock output. 0 - disabled; 1 - enabled.

pub fn mux_1m(&self) -> MUX_1M_R[src]

Bit 17 - Mux the corrected or uncorrected 1MHz clock to the output

pub fn clk_1m_err_fl(&self) -> CLK_1M_ERR_FL_R[src]

Bit 31 - Flag indicates that the count_1m count wasn't reached within 1 32kHz period

Trait Implementations

impl<U, T, FI> PartialEq<FI> for R<U, T> where
    U: PartialEq,
    FI: Copy + Into<U>, 
[src]

Auto Trait Implementations

impl<U, T> Send for R<U, T> where
    T: Send,
    U: Send

impl<U, T> Sync for R<U, T> where
    T: Sync,
    U: Sync

impl<U, T> Unpin for R<U, T> where
    T: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.