Struct imxrt1062_usdhc1::W

pub struct W<U, REG> { /* fields omitted */ }

Register writer

Used as an argument to the closures in the write and modify methods of the register

Methods

impl<U, REG> W<U, REG>

pub unsafe fn bits(&mut self, bits: U) -> &mut Self

Writes raw bits to the register

impl W<u32, Reg<u32, _DS_ADDR>>

pub fn ds_addr(&mut self) -> DS_ADDR_W

Bits 0:31 - DS_ADDR

impl W<u32, Reg<u32, _BLK_ATT>>

pub fn blksize(&mut self) -> BLKSIZE_W

Bits 0:12 - Block Size

pub fn blkcnt(&mut self) -> BLKCNT_W

Bits 16:31 - Block Count

impl W<u32, Reg<u32, _CMD_ARG>>

pub fn cmdarg(&mut self) -> CMDARG_W

Bits 0:31 - Command Argument

impl W<u32, Reg<u32, _CMD_XFR_TYP>>

pub fn rsptyp(&mut self) -> RSPTYP_W

Bits 16:17 - Response Type Select

pub fn cccen(&mut self) -> CCCEN_W

Bit 19 - Command CRC Check Enable

pub fn cicen(&mut self) -> CICEN_W

Bit 20 - Command Index Check Enable

pub fn dpsel(&mut self) -> DPSEL_W

Bit 21 - Data Present Select

pub fn cmdtyp(&mut self) -> CMDTYP_W

Bits 22:23 - Command Type

pub fn cmdinx(&mut self) -> CMDINX_W

Bits 24:29 - Command Index

impl W<u32, Reg<u32, _DATA_BUFF_ACC_PORT>>

pub fn datcont(&mut self) -> DATCONT_W

Bits 0:31 - Data Content

impl W<u32, Reg<u32, _PROT_CTRL>>

pub fn lctl(&mut self) -> LCTL_W

Bit 0 - LED Control

pub fn dtw(&mut self) -> DTW_W

Bits 1:2 - Data Transfer Width

pub fn d3cd(&mut self) -> D3CD_W

Bit 3 - DATA3 as Card Detection Pin

pub fn emode(&mut self) -> EMODE_W

Bits 4:5 - Endian Mode

pub fn cdtl(&mut self) -> CDTL_W

Bit 6 - Card Detect Test Level

pub fn cdss(&mut self) -> CDSS_W

Bit 7 - Card Detect Signal Selection

pub fn dmasel(&mut self) -> DMASEL_W

Bits 8:9 - DMA Select

pub fn sabgreq(&mut self) -> SABGREQ_W

Bit 16 - Stop At Block Gap Request

pub fn creq(&mut self) -> CREQ_W

Bit 17 - Continue Request

pub fn rwctl(&mut self) -> RWCTL_W

Bit 18 - Read Wait Control

pub fn iabg(&mut self) -> IABG_W

Bit 19 - Interrupt At Block Gap

pub fn rd_done_no_8clk(&mut self) -> RD_DONE_NO_8CLK_W

Bit 20 - RD_DONE_NO_8CLK

pub fn wecint(&mut self) -> WECINT_W

Bit 24 - Wakeup Event Enable On Card Interrupt

pub fn wecins(&mut self) -> WECINS_W

Bit 25 - Wakeup Event Enable On SD Card Insertion

pub fn wecrm(&mut self) -> WECRM_W

Bit 26 - Wakeup Event Enable On SD Card Removal

pub fn burst_len_en(&mut self) -> BURST_LEN_EN_W

Bits 27:29 - BURST length enable for INCR, INCR4 / INCR8 / INCR16, INCR4-WRAP / INCR8-WRAP / INCR16-WRAP

pub fn non_exact_blk_rd(&mut self) -> NON_EXACT_BLK_RD_W

Bit 30 - NON_EXACT_BLK_RD

impl W<u32, Reg<u32, _SYS_CTRL>>

pub fn dvs(&mut self) -> DVS_W

Bits 4:7 - Divisor

pub fn sdclkfs(&mut self) -> SDCLKFS_W

Bits 8:15 - SDCLK Frequency Select

pub fn dtocv(&mut self) -> DTOCV_W

Bits 16:19 - Data Timeout Counter Value

pub fn ipp_rst_n(&mut self) -> IPP_RST_N_W

Bit 23 - IPP_RST_N

pub fn rsta(&mut self) -> RSTA_W

Bit 24 - Software Reset For ALL

pub fn rstc(&mut self) -> RSTC_W

Bit 25 - Software Reset For CMD Line

pub fn rstd(&mut self) -> RSTD_W

Bit 26 - Software Reset For DATA Line

pub fn inita(&mut self) -> INITA_W

Bit 27 - Initialization Active

pub fn rstt(&mut self) -> RSTT_W

Bit 28 - Reset Tuning

impl W<u32, Reg<u32, _INT_STATUS>>

pub fn cc(&mut self) -> CC_W

Bit 0 - Command Complete

pub fn tc(&mut self) -> TC_W

Bit 1 - Transfer Complete

pub fn bge(&mut self) -> BGE_W

Bit 2 - Block Gap Event

pub fn dint(&mut self) -> DINT_W

Bit 3 - DMA Interrupt

pub fn bwr(&mut self) -> BWR_W

Bit 4 - Buffer Write Ready

pub fn brr(&mut self) -> BRR_W

Bit 5 - Buffer Read Ready

pub fn cins(&mut self) -> CINS_W

Bit 6 - Card Insertion

pub fn crm(&mut self) -> CRM_W

Bit 7 - Card Removal

pub fn cint(&mut self) -> CINT_W

Bit 8 - Card Interrupt

pub fn rte(&mut self) -> RTE_W

Bit 12 - Re-Tuning Event: (only for SD3.0 SDR104 mode and EMMC HS200 mode)

pub fn tp(&mut self) -> TP_W

Bit 14 - Tuning Pass:(only for SD3.0 SDR104 mode and EMMC HS200 mode)

pub fn ctoe(&mut self) -> CTOE_W

Bit 16 - Command Timeout Error

pub fn cce(&mut self) -> CCE_W

Bit 17 - Command CRC Error

pub fn cebe(&mut self) -> CEBE_W

Bit 18 - Command End Bit Error

pub fn cie(&mut self) -> CIE_W

Bit 19 - Command Index Error

pub fn dtoe(&mut self) -> DTOE_W

Bit 20 - Data Timeout Error

pub fn dce(&mut self) -> DCE_W

Bit 21 - Data CRC Error

pub fn debe(&mut self) -> DEBE_W

Bit 22 - Data End Bit Error

pub fn ac12e(&mut self) -> AC12E_W

Bit 24 - Auto CMD12 Error

pub fn tne(&mut self) -> TNE_W

Bit 26 - Tuning Error: (only for SD3.0 SDR104 mode and EMMC HS200 mode)

pub fn dmae(&mut self) -> DMAE_W

Bit 28 - DMA Error

impl W<u32, Reg<u32, _INT_STATUS_EN>>

pub fn ccsen(&mut self) -> CCSEN_W

Bit 0 - Command Complete Status Enable

pub fn tcsen(&mut self) -> TCSEN_W

Bit 1 - Transfer Complete Status Enable

pub fn bgesen(&mut self) -> BGESEN_W

Bit 2 - Block Gap Event Status Enable

pub fn dintsen(&mut self) -> DINTSEN_W

Bit 3 - DMA Interrupt Status Enable

pub fn bwrsen(&mut self) -> BWRSEN_W

Bit 4 - Buffer Write Ready Status Enable

pub fn brrsen(&mut self) -> BRRSEN_W

Bit 5 - Buffer Read Ready Status Enable

pub fn cinssen(&mut self) -> CINSSEN_W

Bit 6 - Card Insertion Status Enable

pub fn crmsen(&mut self) -> CRMSEN_W

Bit 7 - Card Removal Status Enable

pub fn cintsen(&mut self) -> CINTSEN_W

Bit 8 - Card Interrupt Status Enable

pub fn rtesen(&mut self) -> RTESEN_W

Bit 12 - Re-Tuning Event Status Enable

pub fn tpsen(&mut self) -> TPSEN_W

Bit 14 - Tuning Pass Status Enable

pub fn ctoesen(&mut self) -> CTOESEN_W

Bit 16 - Command Timeout Error Status Enable

pub fn ccesen(&mut self) -> CCESEN_W

Bit 17 - Command CRC Error Status Enable

pub fn cebesen(&mut self) -> CEBESEN_W

Bit 18 - Command End Bit Error Status Enable

pub fn ciesen(&mut self) -> CIESEN_W

Bit 19 - Command Index Error Status Enable

pub fn dtoesen(&mut self) -> DTOESEN_W

Bit 20 - Data Timeout Error Status Enable

pub fn dcesen(&mut self) -> DCESEN_W

Bit 21 - Data CRC Error Status Enable

pub fn debesen(&mut self) -> DEBESEN_W

Bit 22 - Data End Bit Error Status Enable

pub fn ac12esen(&mut self) -> AC12ESEN_W

Bit 24 - Auto CMD12 Error Status Enable

pub fn tnesen(&mut self) -> TNESEN_W

Bit 26 - Tuning Error Status Enable

pub fn dmaesen(&mut self) -> DMAESEN_W

Bit 28 - DMA Error Status Enable

impl W<u32, Reg<u32, _INT_SIGNAL_EN>>

pub fn ccien(&mut self) -> CCIEN_W

Bit 0 - Command Complete Interrupt Enable

pub fn tcien(&mut self) -> TCIEN_W

Bit 1 - Transfer Complete Interrupt Enable

pub fn bgeien(&mut self) -> BGEIEN_W

Bit 2 - Block Gap Event Interrupt Enable

pub fn dintien(&mut self) -> DINTIEN_W

Bit 3 - DMA Interrupt Enable

pub fn bwrien(&mut self) -> BWRIEN_W

Bit 4 - Buffer Write Ready Interrupt Enable

pub fn brrien(&mut self) -> BRRIEN_W

Bit 5 - Buffer Read Ready Interrupt Enable

pub fn cinsien(&mut self) -> CINSIEN_W

Bit 6 - Card Insertion Interrupt Enable

pub fn crmien(&mut self) -> CRMIEN_W

Bit 7 - Card Removal Interrupt Enable

pub fn cintien(&mut self) -> CINTIEN_W

Bit 8 - Card Interrupt Interrupt Enable

pub fn rteien(&mut self) -> RTEIEN_W

Bit 12 - Re-Tuning Event Interrupt Enable

pub fn tpien(&mut self) -> TPIEN_W

Bit 14 - Tuning Pass Interrupt Enable

pub fn ctoeien(&mut self) -> CTOEIEN_W

Bit 16 - Command Timeout Error Interrupt Enable

pub fn cceien(&mut self) -> CCEIEN_W

Bit 17 - Command CRC Error Interrupt Enable

pub fn cebeien(&mut self) -> CEBEIEN_W

Bit 18 - Command End Bit Error Interrupt Enable

pub fn cieien(&mut self) -> CIEIEN_W

Bit 19 - Command Index Error Interrupt Enable

pub fn dtoeien(&mut self) -> DTOEIEN_W

Bit 20 - Data Timeout Error Interrupt Enable

pub fn dceien(&mut self) -> DCEIEN_W

Bit 21 - Data CRC Error Interrupt Enable

pub fn debeien(&mut self) -> DEBEIEN_W

Bit 22 - Data End Bit Error Interrupt Enable

pub fn ac12eien(&mut self) -> AC12EIEN_W

Bit 24 - Auto CMD12 Error Interrupt Enable

pub fn tneien(&mut self) -> TNEIEN_W

Bit 26 - Tuning Error Interrupt Enable

pub fn dmaeien(&mut self) -> DMAEIEN_W

Bit 28 - DMA Error Interrupt Enable

impl W<u32, Reg<u32, _AUTOCMD12_ERR_STATUS>>

pub fn execute_tuning(&mut self) -> EXECUTE_TUNING_W

Bit 22 - Execute Tuning

pub fn smp_clk_sel(&mut self) -> SMP_CLK_SEL_W

Bit 23 - Sample Clock Select

impl W<u32, Reg<u32, _HOST_CTRL_CAP>>

pub fn time_count_retuning(&mut self) -> TIME_COUNT_RETUNING_W

Bits 8:11 - Time Counter for Retuning

pub fn use_tuning_sdr50(&mut self) -> USE_TUNING_SDR50_W

Bit 13 - Use Tuning for SDR50

impl W<u32, Reg<u32, _WTMK_LVL>>

pub fn rd_wml(&mut self) -> RD_WML_W

Bits 0:7 - Read Watermark Level

pub fn rd_brst_len(&mut self) -> RD_BRST_LEN_W

Bits 8:12 - Read Burst Length Due to system restriction, the actual burst length may not exceed 16.

pub fn wr_wml(&mut self) -> WR_WML_W

Bits 16:23 - Write Watermark Level

pub fn wr_brst_len(&mut self) -> WR_BRST_LEN_W

Bits 24:28 - Write Burst Length Due to system restriction, the actual burst length may not exceed 16.

impl W<u32, Reg<u32, _MIX_CTRL>>

pub fn dmaen(&mut self) -> DMAEN_W

Bit 0 - DMA Enable

pub fn bcen(&mut self) -> BCEN_W

Bit 1 - Block Count Enable

pub fn ac12en(&mut self) -> AC12EN_W

Bit 2 - Auto CMD12 Enable

pub fn ddr_en(&mut self) -> DDR_EN_W

Bit 3 - Dual Data Rate mode selection

pub fn dtdsel(&mut self) -> DTDSEL_W

Bit 4 - Data Transfer Direction Select

pub fn msbsel(&mut self) -> MSBSEL_W

Bit 5 - Multi / Single Block Select

pub fn nibble_pos(&mut self) -> NIBBLE_POS_W

Bit 6 - NIBBLE_POS

pub fn ac23en(&mut self) -> AC23EN_W

Bit 7 - Auto CMD23 Enable

pub fn exe_tune(&mut self) -> EXE_TUNE_W

Bit 22 - Execute Tuning: (Only used for SD3.0, SDR104 mode and EMMC HS200 mode)

pub fn smp_clk_sel(&mut self) -> SMP_CLK_SEL_W

Bit 23 - SMP_CLK_SEL

pub fn auto_tune_en(&mut self) -> AUTO_TUNE_EN_W

Bit 24 - Auto Tuning Enable (Only used for SD3.0, SDR104 mode and and EMMC HS200 mode)

pub fn fbclk_sel(&mut self) -> FBCLK_SEL_W

Bit 25 - Feedback Clock Source Selection (Only used for SD3.0, SDR104 mode and EMMC HS200 mode)

impl W<u32, Reg<u32, _FORCE_EVENT>>

pub fn fevtac12ne(&mut self) -> FEVTAC12NE_W

Bit 0 - Force Event Auto Command 12 Not Executed

pub fn fevtac12toe(&mut self) -> FEVTAC12TOE_W

Bit 1 - Force Event Auto Command 12 Time Out Error

pub fn fevtac12ce(&mut self) -> FEVTAC12CE_W

Bit 2 - Force Event Auto Command 12 CRC Error

pub fn fevtac12ebe(&mut self) -> FEVTAC12EBE_W

Bit 3 - Force Event Auto Command 12 End Bit Error

pub fn fevtac12ie(&mut self) -> FEVTAC12IE_W

Bit 4 - Force Event Auto Command 12 Index Error

pub fn fevtcnibac12e(&mut self) -> FEVTCNIBAC12E_W

Bit 7 - Force Event Command Not Executed By Auto Command 12 Error

pub fn fevtctoe(&mut self) -> FEVTCTOE_W

Bit 16 - Force Event Command Time Out Error

pub fn fevtcce(&mut self) -> FEVTCCE_W

Bit 17 - Force Event Command CRC Error

pub fn fevtcebe(&mut self) -> FEVTCEBE_W

Bit 18 - Force Event Command End Bit Error

pub fn fevtcie(&mut self) -> FEVTCIE_W

Bit 19 - Force Event Command Index Error

pub fn fevtdtoe(&mut self) -> FEVTDTOE_W

Bit 20 - Force Event Data Time Out Error

pub fn fevtdce(&mut self) -> FEVTDCE_W

Bit 21 - Force Event Data CRC Error

pub fn fevtdebe(&mut self) -> FEVTDEBE_W

Bit 22 - Force Event Data End Bit Error

pub fn fevtac12e(&mut self) -> FEVTAC12E_W

Bit 24 - Force Event Auto Command 12 Error

pub fn fevttne(&mut self) -> FEVTTNE_W

Bit 26 - Force Tuning Error

pub fn fevtdmae(&mut self) -> FEVTDMAE_W

Bit 28 - Force Event DMA Error

pub fn fevtcint(&mut self) -> FEVTCINT_W

Bit 31 - Force Event Card Interrupt

impl W<u32, Reg<u32, _ADMA_SYS_ADDR>>

pub fn ads_addr(&mut self) -> ADS_ADDR_W

Bits 2:31 - ADMA System Address

impl W<u32, Reg<u32, _DLL_CTRL>>

pub fn dll_ctrl_enable(&mut self) -> DLL_CTRL_ENABLE_W

Bit 0 - DLL_CTRL_ENABLE

pub fn dll_ctrl_reset(&mut self) -> DLL_CTRL_RESET_W

Bit 1 - DLL_CTRL_RESET

pub fn dll_ctrl_slv_force_upd(&mut self) -> DLL_CTRL_SLV_FORCE_UPD_W

Bit 2 - DLL_CTRL_SLV_FORCE_UPD

pub fn dll_ctrl_slv_dly_target0(&mut self) -> DLL_CTRL_SLV_DLY_TARGET0_W

Bits 3:6 - DLL_CTRL_SLV_DLY_TARGET0

pub fn dll_ctrl_gate_update(&mut self) -> DLL_CTRL_GATE_UPDATE_W

Bit 7 - DLL_CTRL_GATE_UPDATE

pub fn dll_ctrl_slv_override(&mut self) -> DLL_CTRL_SLV_OVERRIDE_W

Bit 8 - DLL_CTRL_SLV_OVERRIDE

pub fn dll_ctrl_slv_override_val(&mut self) -> DLL_CTRL_SLV_OVERRIDE_VAL_W

Bits 9:15 - DLL_CTRL_SLV_OVERRIDE_VAL

pub fn dll_ctrl_slv_dly_target1(&mut self) -> DLL_CTRL_SLV_DLY_TARGET1_W

Bits 16:18 - DLL_CTRL_SLV_DLY_TARGET1

pub fn dll_ctrl_slv_update_int(&mut self) -> DLL_CTRL_SLV_UPDATE_INT_W

Bits 20:27 - DLL_CTRL_SLV_UPDATE_INT

pub fn dll_ctrl_ref_update_int(&mut self) -> DLL_CTRL_REF_UPDATE_INT_W

Bits 28:31 - DLL_CTRL_REF_UPDATE_INT

impl W<u32, Reg<u32, _CLK_TUNE_CTRL_STATUS>>

pub fn dly_cell_set_post(&mut self) -> DLY_CELL_SET_POST_W

Bits 0:3 - DLY_CELL_SET_POST

pub fn dly_cell_set_out(&mut self) -> DLY_CELL_SET_OUT_W

Bits 4:7 - DLY_CELL_SET_OUT

pub fn dly_cell_set_pre(&mut self) -> DLY_CELL_SET_PRE_W

Bits 8:14 - DLY_CELL_SET_PRE

impl W<u32, Reg<u32, _VEND_SPEC>>

pub fn vselect(&mut self) -> VSELECT_W

Bit 1 - Voltage Selection

pub fn conflict_chk_en(&mut self) -> CONFLICT_CHK_EN_W

Bit 2 - Conflict check enable.

pub fn ac12_wr_chkbusy_en(&mut self) -> AC12_WR_CHKBUSY_EN_W

Bit 3 - AC12_WR_CHKBUSY_EN

pub fn frc_sdclk_on(&mut self) -> FRC_SDCLK_ON_W

Bit 8 - FRC_SDCLK_ON

pub fn crc_chk_dis(&mut self) -> CRC_CHK_DIS_W

Bit 15 - CRC Check Disable

pub fn cmd_byte_en(&mut self) -> CMD_BYTE_EN_W

Bit 31 - CMD_BYTE_EN

impl W<u32, Reg<u32, _MMC_BOOT>>

pub fn dtocv_ack(&mut self) -> DTOCV_ACK_W

Bits 0:3 - DTOCV_ACK

pub fn boot_ack(&mut self) -> BOOT_ACK_W

Bit 4 - BOOT_ACK

pub fn boot_mode(&mut self) -> BOOT_MODE_W

Bit 5 - BOOT_MODE

pub fn boot_en(&mut self) -> BOOT_EN_W

Bit 6 - BOOT_EN

pub fn auto_sabg_en(&mut self) -> AUTO_SABG_EN_W

Bit 7 - AUTO_SABG_EN

pub fn disable_time_out(&mut self) -> DISABLE_TIME_OUT_W

Bit 8 - Disable Time Out

pub fn boot_blk_cnt(&mut self) -> BOOT_BLK_CNT_W

Bits 16:31 - BOOT_BLK_CNT

impl W<u32, Reg<u32, _VEND_SPEC2>>

pub fn card_int_d3_test(&mut self) -> CARD_INT_D3_TEST_W

Bit 3 - Card Interrupt Detection Test

pub fn tuning_8bit_en(&mut self) -> TUNING_8BIT_EN_W

Bit 4 - TUNING_8bit_EN

pub fn tuning_1bit_en(&mut self) -> TUNING_1BIT_EN_W

Bit 5 - TUNING_1bit_EN

pub fn tuning_cmd_en(&mut self) -> TUNING_CMD_EN_W

Bit 6 - TUNING_CMD_EN

pub fn acmd23_argu2_en(&mut self) -> ACMD23_ARGU2_EN_W

Bit 12 - Argument2 register enable for ACMD23

pub fn part_dll_debug(&mut self) -> PART_DLL_DEBUG_W

Bit 13 - debug for part dll

pub fn bus_rst(&mut self) -> BUS_RST_W

Bit 14 - BUS reset

impl W<u32, Reg<u32, _TUNING_CTRL>>

pub fn tuning_start_tap(&mut self) -> TUNING_START_TAP_W

Bits 0:7 - TUNING_START_TAP

pub fn tuning_counter(&mut self) -> TUNING_COUNTER_W

Bits 8:15 - TUNING_COUNTER

pub fn tuning_step(&mut self) -> TUNING_STEP_W

Bits 16:18 - TUNING_STEP

pub fn tuning_window(&mut self) -> TUNING_WINDOW_W

Bits 20:22 - TUNING_WINDOW

pub fn std_tuning_en(&mut self) -> STD_TUNING_EN_W

Bit 24 - STD_TUNING_EN