[−][src]Struct imxrt1062_usbphy1::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub pwd: PWD,
    pub pwd_set: PWD_SET,
    pub pwd_clr: PWD_CLR,
    pub pwd_tog: PWD_TOG,
    pub tx: TX,
    pub tx_set: TX_SET,
    pub tx_clr: TX_CLR,
    pub tx_tog: TX_TOG,
    pub rx: RX,
    pub rx_set: RX_SET,
    pub rx_clr: RX_CLR,
    pub rx_tog: RX_TOG,
    pub ctrl: CTRL,
    pub ctrl_set: CTRL_SET,
    pub ctrl_clr: CTRL_CLR,
    pub ctrl_tog: CTRL_TOG,
    pub status: STATUS,
    pub debug: DEBUG,
    pub debug_set: DEBUG_SET,
    pub debug_clr: DEBUG_CLR,
    pub debug_tog: DEBUG_TOG,
    pub debug0_status: DEBUG0_STATUS,
    pub debug1: DEBUG1,
    pub debug1_set: DEBUG1_SET,
    pub debug1_clr: DEBUG1_CLR,
    pub debug1_tog: DEBUG1_TOG,
    pub version: VERSION,
    // some fields omitted
}

Register block

Fields

pwd: PWD

0x00 - USB PHY Power-Down Register

pwd_set: PWD_SET

0x04 - USB PHY Power-Down Register

pwd_clr: PWD_CLR

0x08 - USB PHY Power-Down Register

pwd_tog: PWD_TOG

0x0c - USB PHY Power-Down Register

tx: TX

0x10 - USB PHY Transmitter Control Register

tx_set: TX_SET

0x14 - USB PHY Transmitter Control Register

tx_clr: TX_CLR

0x18 - USB PHY Transmitter Control Register

tx_tog: TX_TOG

0x1c - USB PHY Transmitter Control Register

rx: RX

0x20 - USB PHY Receiver Control Register

rx_set: RX_SET

0x24 - USB PHY Receiver Control Register

rx_clr: RX_CLR

0x28 - USB PHY Receiver Control Register

rx_tog: RX_TOG

0x2c - USB PHY Receiver Control Register

ctrl: CTRL

0x30 - USB PHY General Control Register

ctrl_set: CTRL_SET

0x34 - USB PHY General Control Register

ctrl_clr: CTRL_CLR

0x38 - USB PHY General Control Register

ctrl_tog: CTRL_TOG

0x3c - USB PHY General Control Register

status: STATUS

0x40 - USB PHY Status Register

debug: DEBUG

0x50 - USB PHY Debug Register

debug_set: DEBUG_SET

0x54 - USB PHY Debug Register

debug_clr: DEBUG_CLR

0x58 - USB PHY Debug Register

debug_tog: DEBUG_TOG

0x5c - USB PHY Debug Register

debug0_status: DEBUG0_STATUS

0x60 - UTMI Debug Status Register 0

debug1: DEBUG1

0x70 - UTMI Debug Status Register 1

debug1_set: DEBUG1_SET

0x74 - UTMI Debug Status Register 1

debug1_clr: DEBUG1_CLR

0x78 - UTMI Debug Status Register 1

debug1_tog: DEBUG1_TOG

0x7c - UTMI Debug Status Register 1

version: VERSION

0x80 - UTMI RTL Version

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