[][src]Type Definition imxrt1062_usbphy1::ctrl::W

type W = W<u32, CTRL>;

Writer for register CTRL

Methods

impl W[src]

pub fn enotg_id_chg_irq(&mut self) -> ENOTG_ID_CHG_IRQ_W[src]

Bit 0 - Enable OTG_ID_CHG_IRQ.

pub fn enhostdiscondetect(&mut self) -> ENHOSTDISCONDETECT_W[src]

Bit 1 - For host mode, enables high-speed disconnect detector

pub fn enirqhostdiscon(&mut self) -> ENIRQHOSTDISCON_W[src]

Bit 2 - Enables interrupt for detection of disconnection to Device when in high-speed host mode

pub fn hostdiscondetect_irq(&mut self) -> HOSTDISCONDETECT_IRQ_W[src]

Bit 3 - Indicates that the device has disconnected in high-speed mode

pub fn endevplugindetect(&mut self) -> ENDEVPLUGINDETECT_W[src]

Bit 4 - For device mode, enables 200-KOhm pullups for detecting connectivity to the host.

pub fn devplugin_polarity(&mut self) -> DEVPLUGIN_POLARITY_W[src]

Bit 5 - For device mode, if this bit is cleared to 0, then it trips the interrupt if the device is plugged in

pub fn otg_id_chg_irq(&mut self) -> OTG_ID_CHG_IRQ_W[src]

Bit 6 - OTG ID change interrupt. Indicates the value of ID pin changed.

pub fn enotgiddetect(&mut self) -> ENOTGIDDETECT_W[src]

Bit 7 - Enables circuit to detect resistance of MiniAB ID pin.

pub fn resumeirqsticky(&mut self) -> RESUMEIRQSTICKY_W[src]

Bit 8 - Set to 1 will make RESUME_IRQ bit a sticky bit until software clear it

pub fn enirqresumedetect(&mut self) -> ENIRQRESUMEDETECT_W[src]

Bit 9 - Enables interrupt for detection of a non-J state on the USB line

pub fn resume_irq(&mut self) -> RESUME_IRQ_W[src]

Bit 10 - Indicates that the host is sending a wake-up after suspend

pub fn enirqdevplugin(&mut self) -> ENIRQDEVPLUGIN_W[src]

Bit 11 - Enables interrupt for the detection of connectivity to the USB line.

pub fn devplugin_irq(&mut self) -> DEVPLUGIN_IRQ_W[src]

Bit 12 - Indicates that the device is connected

pub fn data_on_lradc(&mut self) -> DATA_ON_LRADC_W[src]

Bit 13 - Enables the LRADC to monitor USB_DP and USB_DM. This is for use in non-USB modes only.

pub fn enutmilevel2(&mut self) -> ENUTMILEVEL2_W[src]

Bit 14 - Enables UTMI+ Level2. This should be enabled if needs to support LS device

pub fn enutmilevel3(&mut self) -> ENUTMILEVEL3_W[src]

Bit 15 - Enables UTMI+ Level3

pub fn enirqwakeup(&mut self) -> ENIRQWAKEUP_W[src]

Bit 16 - Enables interrupt for the wakeup events.

pub fn wakeup_irq(&mut self) -> WAKEUP_IRQ_W[src]

Bit 17 - Indicates that there is a wakeup event

pub fn enauto_pwron_pll(&mut self) -> ENAUTO_PWRON_PLL_W[src]

Bit 18 - Enables the feature to auto-enable the POWER bit of HW_CLKCTRL_PLLxCTRL0 if there is wakeup event if USB is suspended

pub fn enautoclr_clkgate(&mut self) -> ENAUTOCLR_CLKGATE_W[src]

Bit 19 - Enables the feature to auto-clear the CLKGATE bit if there is wakeup event while USB is suspended

pub fn enautoclr_phy_pwd(&mut self) -> ENAUTOCLR_PHY_PWD_W[src]

Bit 20 - Enables the feature to auto-clear the PWD register bits in USBPHYx_PWD if there is wakeup event while USB is suspended

pub fn endpdmchg_wkup(&mut self) -> ENDPDMCHG_WKUP_W[src]

Bit 21 - Enables the feature to wakeup USB if DP/DM is toggled when USB is suspended

pub fn enidchg_wkup(&mut self) -> ENIDCHG_WKUP_W[src]

Bit 22 - Enables the feature to wakeup USB if ID is toggled when USB is suspended.

pub fn envbuschg_wkup(&mut self) -> ENVBUSCHG_WKUP_W[src]

Bit 23 - Enables the feature to wakeup USB if VBUS is toggled when USB is suspended.

pub fn fsdll_rst_en(&mut self) -> FSDLL_RST_EN_W[src]

Bit 24 - Enables the feature to reset the FSDLL lock detection logic at the end of each TX packet.

pub fn host_force_ls_se0(&mut self) -> HOST_FORCE_LS_SE0_W[src]

Bit 28 - Forces the next FS packet that is transmitted to have a EOP with LS timing

pub fn clkgate(&mut self) -> CLKGATE_W[src]

Bit 30 - Gate UTMI Clocks

pub fn sftrst(&mut self) -> SFTRST_W[src]

Bit 31 - Writing a 1 to this bit will soft-reset the USBPHYx_PWD, USBPHYx_TX, USBPHYx_RX, and USBPHYx_CTRL registers