[][src]Type Definition imxrt1062_system_control::ccr::R

type R = R<u32, CCR>;

Reader of register CCR

Methods

impl R[src]

pub fn nonbasethrdena(&self) -> NONBASETHRDENA_R[src]

Bit 0 - Indicates how the processor enters Thread mode

pub fn usersetmpend(&self) -> USERSETMPEND_R[src]

Bit 1 - Enables unprivileged software access to the STIR

pub fn unalign_trp(&self) -> UNALIGN_TRP_R[src]

Bit 3 - Enables unaligned access traps

pub fn div_0_trp(&self) -> DIV_0_TRP_R[src]

Bit 4 - Enables faulting or halting when the processor executes an SDIV or UDIV instruction with a divisor of 0

pub fn bfhfnmign(&self) -> BFHFNMIGN_R[src]

Bit 8 - Enables handlers with priority -1 or -2 to ignore data BusFaults caused by load and store instructions.

pub fn stkalign(&self) -> STKALIGN_R[src]

Bit 9 - Indicates stack alignment on exception entry

pub fn dc(&self) -> DC_R[src]

Bit 16 - Enables L1 data cache.

pub fn ic(&self) -> IC_R[src]

Bit 17 - Enables L1 instruction cache.

pub fn bp(&self) -> BP_R[src]

Bit 18 - Always reads-as-one. It indicates branch prediction is enabled.