[][src]Struct imxrt1062_snvs::R

pub struct R<U, T> { /* fields omitted */ }

Register/field reader

Result of the read method of a register. Also it can be used in the modify method

Methods

impl<U, T> R<U, T> where
    U: Copy
[src]

pub fn bits(&self) -> U[src]

Read raw bits from register/field

impl<FI> R<bool, FI>[src]

pub fn bit(&self) -> bool[src]

Value of the field as raw bits

pub fn bit_is_clear(&self) -> bool[src]

Returns true if the bit is clear (0)

pub fn bit_is_set(&self) -> bool[src]

Returns true if the bit is set (1)

impl R<bool, ZMK_WSL_A>[src]

pub fn variant(&self) -> ZMK_WSL_A[src]

Get enumerated values variant

pub fn is_zmk_wsl_0(&self) -> bool[src]

Checks if the value of the field is ZMK_WSL_0

pub fn is_zmk_wsl_1(&self) -> bool[src]

Checks if the value of the field is ZMK_WSL_1

impl R<bool, ZMK_RSL_A>[src]

pub fn variant(&self) -> ZMK_RSL_A[src]

Get enumerated values variant

pub fn is_zmk_rsl_0(&self) -> bool[src]

Checks if the value of the field is ZMK_RSL_0

pub fn is_zmk_rsl_1(&self) -> bool[src]

Checks if the value of the field is ZMK_RSL_1

impl R<bool, SRTC_SL_A>[src]

pub fn variant(&self) -> SRTC_SL_A[src]

Get enumerated values variant

pub fn is_srtc_sl_0(&self) -> bool[src]

Checks if the value of the field is SRTC_SL_0

pub fn is_srtc_sl_1(&self) -> bool[src]

Checks if the value of the field is SRTC_SL_1

impl R<bool, LPCALB_SL_A>[src]

pub fn variant(&self) -> LPCALB_SL_A[src]

Get enumerated values variant

pub fn is_lpcalb_sl_0(&self) -> bool[src]

Checks if the value of the field is LPCALB_SL_0

pub fn is_lpcalb_sl_1(&self) -> bool[src]

Checks if the value of the field is LPCALB_SL_1

impl R<bool, MC_SL_A>[src]

pub fn variant(&self) -> MC_SL_A[src]

Get enumerated values variant

pub fn is_mc_sl_0(&self) -> bool[src]

Checks if the value of the field is MC_SL_0

pub fn is_mc_sl_1(&self) -> bool[src]

Checks if the value of the field is MC_SL_1

impl R<bool, GPR_SL_A>[src]

pub fn variant(&self) -> GPR_SL_A[src]

Get enumerated values variant

pub fn is_gpr_sl_0(&self) -> bool[src]

Checks if the value of the field is GPR_SL_0

pub fn is_gpr_sl_1(&self) -> bool[src]

Checks if the value of the field is GPR_SL_1

impl R<bool, LPSVCR_SL_A>[src]

pub fn variant(&self) -> LPSVCR_SL_A[src]

Get enumerated values variant

pub fn is_lpsvcr_sl_0(&self) -> bool[src]

Checks if the value of the field is LPSVCR_SL_0

pub fn is_lpsvcr_sl_1(&self) -> bool[src]

Checks if the value of the field is LPSVCR_SL_1

impl R<bool, LPTDCR_SL_A>[src]

pub fn variant(&self) -> LPTDCR_SL_A[src]

Get enumerated values variant

pub fn is_lptdcr_sl_0(&self) -> bool[src]

Checks if the value of the field is LPTDCR_SL_0

pub fn is_lptdcr_sl_1(&self) -> bool[src]

Checks if the value of the field is LPTDCR_SL_1

impl R<bool, MKS_SL_A>[src]

pub fn variant(&self) -> MKS_SL_A[src]

Get enumerated values variant

pub fn is_mks_sl_0(&self) -> bool[src]

Checks if the value of the field is MKS_SL_0

pub fn is_mks_sl_1(&self) -> bool[src]

Checks if the value of the field is MKS_SL_1

impl R<bool, HPSVCR_L_A>[src]

pub fn variant(&self) -> HPSVCR_L_A[src]

Get enumerated values variant

pub fn is_hpsvcr_l_0(&self) -> bool[src]

Checks if the value of the field is HPSVCR_L_0

pub fn is_hpsvcr_l_1(&self) -> bool[src]

Checks if the value of the field is HPSVCR_L_1

impl R<bool, HPSICR_L_A>[src]

pub fn variant(&self) -> HPSICR_L_A[src]

Get enumerated values variant

pub fn is_hpsicr_l_0(&self) -> bool[src]

Checks if the value of the field is HPSICR_L_0

pub fn is_hpsicr_l_1(&self) -> bool[src]

Checks if the value of the field is HPSICR_L_1

impl R<bool, HAC_L_A>[src]

pub fn variant(&self) -> HAC_L_A[src]

Get enumerated values variant

pub fn is_hac_l_0(&self) -> bool[src]

Checks if the value of the field is HAC_L_0

pub fn is_hac_l_1(&self) -> bool[src]

Checks if the value of the field is HAC_L_1

impl R<u32, Reg<u32, _HPLR>>[src]

pub fn zmk_wsl(&self) -> ZMK_WSL_R[src]

Bit 0 - Zeroizable Master Key Write Soft Lock When set, prevents any writes (software and hardware) to the ZMK registers and the ZMK_HWP, ZMK_VAL, and ZMK_ECC_EN fields of the LPMKCR

pub fn zmk_rsl(&self) -> ZMK_RSL_R[src]

Bit 1 - Zeroizable Master Key Read Soft Lock When set, prevents any software reads to the ZMK Registers and ZMK_ECC_VALUE field of the LPMKCR

pub fn srtc_sl(&self) -> SRTC_SL_R[src]

Bit 2 - Secure Real Time Counter Soft Lock When set, prevents any writes to the SRTC Registers, SRTC_ENV, and SRTC_INV_EN bits

pub fn lpcalb_sl(&self) -> LPCALB_SL_R[src]

Bit 3 - LP Calibration Soft Lock When set, prevents any writes to the LP Calibration Value (LPCALB_VAL) and LP Calibration Enable (LPCALB_EN)

pub fn mc_sl(&self) -> MC_SL_R[src]

Bit 4 - Monotonic Counter Soft Lock When set, prevents any writes (increments) to the MC Registers and MC_ENV bit

pub fn gpr_sl(&self) -> GPR_SL_R[src]

Bit 5 - General Purpose Register Soft Lock When set, prevents any writes to the GPR

pub fn lpsvcr_sl(&self) -> LPSVCR_SL_R[src]

Bit 6 - LP Security Violation Control Register Soft Lock When set, prevents any writes to the LPSVCR

pub fn lptdcr_sl(&self) -> LPTDCR_SL_R[src]

Bit 8 - LP Tamper Detectors Configuration Register Soft Lock When set, prevents any writes to the LPTDCR

pub fn mks_sl(&self) -> MKS_SL_R[src]

Bit 9 - Master Key Select Soft Lock When set, prevents any writes to the MASTER_KEY_SEL field of the LPMKCR

pub fn hpsvcr_l(&self) -> HPSVCR_L_R[src]

Bit 16 - HP Security Violation Control Register Lock When set, prevents any writes to the HPSVCR

pub fn hpsicr_l(&self) -> HPSICR_L_R[src]

Bit 17 - HP Security Interrupt Control Register Lock When set, prevents any writes to the HPSICR

pub fn hac_l(&self) -> HAC_L_R[src]

Bit 18 - High Assurance Counter Lock When set, prevents any writes to HPHACIVR, HPHACR, and HAC_EN bit of HPCOMR

impl R<bool, SSM_ST_DIS_A>[src]

pub fn variant(&self) -> SSM_ST_DIS_A[src]

Get enumerated values variant

pub fn is_ssm_st_dis_0(&self) -> bool[src]

Checks if the value of the field is SSM_ST_DIS_0

pub fn is_ssm_st_dis_1(&self) -> bool[src]

Checks if the value of the field is SSM_ST_DIS_1

impl R<bool, SSM_SFNS_DIS_A>[src]

pub fn variant(&self) -> SSM_SFNS_DIS_A[src]

Get enumerated values variant

pub fn is_ssm_sfns_dis_0(&self) -> bool[src]

Checks if the value of the field is SSM_SFNS_DIS_0

pub fn is_ssm_sfns_dis_1(&self) -> bool[src]

Checks if the value of the field is SSM_SFNS_DIS_1

impl R<bool, LP_SWR_DIS_A>[src]

pub fn variant(&self) -> LP_SWR_DIS_A[src]

Get enumerated values variant

pub fn is_lp_swr_dis_0(&self) -> bool[src]

Checks if the value of the field is LP_SWR_DIS_0

pub fn is_lp_swr_dis_1(&self) -> bool[src]

Checks if the value of the field is LP_SWR_DIS_1

impl R<bool, MKS_EN_A>[src]

pub fn variant(&self) -> MKS_EN_A[src]

Get enumerated values variant

pub fn is_mks_en_0(&self) -> bool[src]

Checks if the value of the field is MKS_EN_0

pub fn is_mks_en_1(&self) -> bool[src]

Checks if the value of the field is MKS_EN_1

impl R<bool, HAC_EN_A>[src]

pub fn variant(&self) -> HAC_EN_A[src]

Get enumerated values variant

pub fn is_hac_en_0(&self) -> bool[src]

Checks if the value of the field is HAC_EN_0

pub fn is_hac_en_1(&self) -> bool[src]

Checks if the value of the field is HAC_EN_1

impl R<u32, Reg<u32, _HPCOMR>>[src]

pub fn ssm_st_dis(&self) -> SSM_ST_DIS_R[src]

Bit 1 - SSM Secure to Trusted State Transition Disable When set, disables the SSM transition from secure to trusted state

pub fn ssm_sfns_dis(&self) -> SSM_SFNS_DIS_R[src]

Bit 2 - SSM Soft Fail to Non-Secure State Transition Disable When set, it disables the SSM transition from soft fail to non-secure state

pub fn lp_swr_dis(&self) -> LP_SWR_DIS_R[src]

Bit 5 - LP Software Reset Disable When set, disables the LP software reset

pub fn sw_sv(&self) -> SW_SV_R[src]

Bit 8 - Software Security Violation When set, the system security monitor treats this bit as a non-fatal security violation

pub fn sw_fsv(&self) -> SW_FSV_R[src]

Bit 9 - Software Fatal Security Violation When set, the system security monitor treats this bit as a fatal security violation

pub fn sw_lpsv(&self) -> SW_LPSV_R[src]

Bit 10 - LP Software Security Violation When set, SNVS_LP treats this bit as a security violation

pub fn mks_en(&self) -> MKS_EN_R[src]

Bit 13 - Master Key Select Enable When not set, the one time programmable (OTP) master key is selected by default

pub fn hac_en(&self) -> HAC_EN_R[src]

Bit 16 - High Assurance Counter Enable This bit controls the SSM transition from the soft fail to the hard fail state

pub fn hac_stop(&self) -> HAC_STOP_R[src]

Bit 19 - High Assurance Counter Stop This bit can be set only when SSM is in soft fail state

pub fn npswa_en(&self) -> NPSWA_EN_R[src]

Bit 31 - Non-Privileged Software Access Enable When set, allows non-privileged software to access all SNVS registers, including those that are privileged software read/write access only

impl R<bool, RTC_EN_A>[src]

pub fn variant(&self) -> RTC_EN_A[src]

Get enumerated values variant

pub fn is_rtc_en_0(&self) -> bool[src]

Checks if the value of the field is RTC_EN_0

pub fn is_rtc_en_1(&self) -> bool[src]

Checks if the value of the field is RTC_EN_1

impl R<bool, HPTA_EN_A>[src]

pub fn variant(&self) -> HPTA_EN_A[src]

Get enumerated values variant

pub fn is_hpta_en_0(&self) -> bool[src]

Checks if the value of the field is HPTA_EN_0

pub fn is_hpta_en_1(&self) -> bool[src]

Checks if the value of the field is HPTA_EN_1

impl R<bool, DIS_PI_A>[src]

pub fn variant(&self) -> DIS_PI_A[src]

Get enumerated values variant

pub fn is_dis_pi_0(&self) -> bool[src]

Checks if the value of the field is DIS_PI_0

pub fn is_dis_pi_1(&self) -> bool[src]

Checks if the value of the field is DIS_PI_1

impl R<bool, PI_EN_A>[src]

pub fn variant(&self) -> PI_EN_A[src]

Get enumerated values variant

pub fn is_pi_en_0(&self) -> bool[src]

Checks if the value of the field is PI_EN_0

pub fn is_pi_en_1(&self) -> bool[src]

Checks if the value of the field is PI_EN_1

impl R<u8, PI_FREQ_A>[src]

pub fn variant(&self) -> PI_FREQ_A[src]

Get enumerated values variant

pub fn is_pi_freq_0(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_0

pub fn is_pi_freq_1(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_1

pub fn is_pi_freq_2(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_2

pub fn is_pi_freq_3(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_3

pub fn is_pi_freq_4(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_4

pub fn is_pi_freq_5(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_5

pub fn is_pi_freq_6(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_6

pub fn is_pi_freq_7(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_7

pub fn is_pi_freq_8(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_8

pub fn is_pi_freq_9(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_9

pub fn is_pi_freq_10(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_10

pub fn is_pi_freq_11(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_11

pub fn is_pi_freq_12(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_12

pub fn is_pi_freq_13(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_13

pub fn is_pi_freq_14(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_14

pub fn is_pi_freq_15(&self) -> bool[src]

Checks if the value of the field is PI_FREQ_15

impl R<bool, HPCALB_EN_A>[src]

pub fn variant(&self) -> HPCALB_EN_A[src]

Get enumerated values variant

pub fn is_hpcalb_en_0(&self) -> bool[src]

Checks if the value of the field is HPCALB_EN_0

pub fn is_hpcalb_en_1(&self) -> bool[src]

Checks if the value of the field is HPCALB_EN_1

impl R<u8, HPCALB_VAL_A>[src]

pub fn variant(&self) -> Variant<u8, HPCALB_VAL_A>[src]

Get enumerated values variant

pub fn is_hpcalb_val_0(&self) -> bool[src]

Checks if the value of the field is HPCALB_VAL_0

pub fn is_hpcalb_val_1(&self) -> bool[src]

Checks if the value of the field is HPCALB_VAL_1

pub fn is_hpcalb_val_2(&self) -> bool[src]

Checks if the value of the field is HPCALB_VAL_2

pub fn is_hpcalb_val_15(&self) -> bool[src]

Checks if the value of the field is HPCALB_VAL_15

pub fn is_hpcalb_val_16(&self) -> bool[src]

Checks if the value of the field is HPCALB_VAL_16

pub fn is_hpcalb_val_17(&self) -> bool[src]

Checks if the value of the field is HPCALB_VAL_17

pub fn is_hpcalb_val_30(&self) -> bool[src]

Checks if the value of the field is HPCALB_VAL_30

pub fn is_hpcalb_val_31(&self) -> bool[src]

Checks if the value of the field is HPCALB_VAL_31

impl R<bool, HP_TS_A>[src]

pub fn variant(&self) -> HP_TS_A[src]

Get enumerated values variant

pub fn is_hp_ts_0(&self) -> bool[src]

Checks if the value of the field is HP_TS_0

pub fn is_hp_ts_1(&self) -> bool[src]

Checks if the value of the field is HP_TS_1

impl R<u32, Reg<u32, _HPCR>>[src]

pub fn rtc_en(&self) -> RTC_EN_R[src]

Bit 0 - HP Real Time Counter Enable

pub fn hpta_en(&self) -> HPTA_EN_R[src]

Bit 1 - HP Time Alarm Enable When set, the time alarm interrupt is generated if the value in the HP Time Alarm Registers is equal to the value of the HP Real Time Counter

pub fn dis_pi(&self) -> DIS_PI_R[src]

Bit 2 - Disable periodic interrupt in the functional interrupt

pub fn pi_en(&self) -> PI_EN_R[src]

Bit 3 - HP Periodic Interrupt Enable The periodic interrupt can be generated only if the HP Real Time Counter is enabled

pub fn pi_freq(&self) -> PI_FREQ_R[src]

Bits 4:7 - Periodic Interrupt Frequency Defines frequency of the periodic interrupt

pub fn hpcalb_en(&self) -> HPCALB_EN_R[src]

Bit 8 - HP Real Time Counter Calibration Enabled Indicates that the time calibration mechanism is enabled.

pub fn hpcalb_val(&self) -> HPCALB_VAL_R[src]

Bits 10:14 - HP Calibration Value Defines signed calibration value for the HP Real Time Counter

pub fn hp_ts(&self) -> HP_TS_R[src]

Bit 16 - HP Time Synchronize

pub fn btn_config(&self) -> BTN_CONFIG_R[src]

Bits 24:26 - Button Configuration

pub fn btn_mask(&self) -> BTN_MASK_R[src]

Bit 27 - Button interrupt mask

impl R<bool, SV0_EN_A>[src]

pub fn variant(&self) -> SV0_EN_A[src]

Get enumerated values variant

pub fn is_sv0_en_0(&self) -> bool[src]

Checks if the value of the field is SV0_EN_0

pub fn is_sv0_en_1(&self) -> bool[src]

Checks if the value of the field is SV0_EN_1

impl R<bool, SV1_EN_A>[src]

pub fn variant(&self) -> SV1_EN_A[src]

Get enumerated values variant

pub fn is_sv1_en_0(&self) -> bool[src]

Checks if the value of the field is SV1_EN_0

pub fn is_sv1_en_1(&self) -> bool[src]

Checks if the value of the field is SV1_EN_1

impl R<bool, SV2_EN_A>[src]

pub fn variant(&self) -> SV2_EN_A[src]

Get enumerated values variant

pub fn is_sv2_en_0(&self) -> bool[src]

Checks if the value of the field is SV2_EN_0

pub fn is_sv2_en_1(&self) -> bool[src]

Checks if the value of the field is SV2_EN_1

impl R<bool, SV3_EN_A>[src]

pub fn variant(&self) -> SV3_EN_A[src]

Get enumerated values variant

pub fn is_sv3_en_0(&self) -> bool[src]

Checks if the value of the field is SV3_EN_0

pub fn is_sv3_en_1(&self) -> bool[src]

Checks if the value of the field is SV3_EN_1

impl R<bool, SV4_EN_A>[src]

pub fn variant(&self) -> SV4_EN_A[src]

Get enumerated values variant

pub fn is_sv4_en_0(&self) -> bool[src]

Checks if the value of the field is SV4_EN_0

pub fn is_sv4_en_1(&self) -> bool[src]

Checks if the value of the field is SV4_EN_1

impl R<bool, SV5_EN_A>[src]

pub fn variant(&self) -> SV5_EN_A[src]

Get enumerated values variant

pub fn is_sv5_en_0(&self) -> bool[src]

Checks if the value of the field is SV5_EN_0

pub fn is_sv5_en_1(&self) -> bool[src]

Checks if the value of the field is SV5_EN_1

impl R<bool, LPSVI_EN_A>[src]

pub fn variant(&self) -> LPSVI_EN_A[src]

Get enumerated values variant

pub fn is_lpsvi_en_0(&self) -> bool[src]

Checks if the value of the field is LPSVI_EN_0

pub fn is_lpsvi_en_1(&self) -> bool[src]

Checks if the value of the field is LPSVI_EN_1

impl R<u32, Reg<u32, _HPSICR>>[src]

pub fn sv0_en(&self) -> SV0_EN_R[src]

Bit 0 - Security Violation 0 Interrupt Enable Setting this bit to 1 enables generation of the security interrupt to the host processor upon detection of the Security Violation 0 security violation

pub fn sv1_en(&self) -> SV1_EN_R[src]

Bit 1 - Security Violation 1 Interrupt Enable Setting this bit to 1 enables generation of the security interrupt to the host processor upon detection of the Security Violation 1 security violation

pub fn sv2_en(&self) -> SV2_EN_R[src]

Bit 2 - Security Violation 2 Interrupt Enable Setting this bit to 1 enables generation of the security interrupt to the host processor upon detection of the Security Violation 2 security violation

pub fn sv3_en(&self) -> SV3_EN_R[src]

Bit 3 - Security Violation 3 Interrupt Enable Setting this bit to 1 enables generation of the security interrupt to the host processor upon detection of the Security Violation 3 security violation

pub fn sv4_en(&self) -> SV4_EN_R[src]

Bit 4 - Security Violation 4 Interrupt Enable Setting this bit to 1 enables generation of the security interrupt to the host processor upon detection of the Security Violation 4 security violation

pub fn sv5_en(&self) -> SV5_EN_R[src]

Bit 5 - Security Violation 5 Interrupt Enable Setting this bit to 1 enables generation of the security interrupt to the host processor upon detection of the Security Violation 5 security violation

pub fn lpsvi_en(&self) -> LPSVI_EN_R[src]

Bit 31 - LP Security Violation Interrupt Enable This bit enables generating of the security interrupt to the host processor upon security violation signal from the LP section

impl R<bool, SV0_CFG_A>[src]

pub fn variant(&self) -> SV0_CFG_A[src]

Get enumerated values variant

pub fn is_sv0_cfg_0(&self) -> bool[src]

Checks if the value of the field is SV0_CFG_0

pub fn is_sv0_cfg_1(&self) -> bool[src]

Checks if the value of the field is SV0_CFG_1

impl R<bool, SV1_CFG_A>[src]

pub fn variant(&self) -> SV1_CFG_A[src]

Get enumerated values variant

pub fn is_sv1_cfg_0(&self) -> bool[src]

Checks if the value of the field is SV1_CFG_0

pub fn is_sv1_cfg_1(&self) -> bool[src]

Checks if the value of the field is SV1_CFG_1

impl R<bool, SV2_CFG_A>[src]

pub fn variant(&self) -> SV2_CFG_A[src]

Get enumerated values variant

pub fn is_sv2_cfg_0(&self) -> bool[src]

Checks if the value of the field is SV2_CFG_0

pub fn is_sv2_cfg_1(&self) -> bool[src]

Checks if the value of the field is SV2_CFG_1

impl R<bool, SV3_CFG_A>[src]

pub fn variant(&self) -> SV3_CFG_A[src]

Get enumerated values variant

pub fn is_sv3_cfg_0(&self) -> bool[src]

Checks if the value of the field is SV3_CFG_0

pub fn is_sv3_cfg_1(&self) -> bool[src]

Checks if the value of the field is SV3_CFG_1

impl R<bool, SV4_CFG_A>[src]

pub fn variant(&self) -> SV4_CFG_A[src]

Get enumerated values variant

pub fn is_sv4_cfg_0(&self) -> bool[src]

Checks if the value of the field is SV4_CFG_0

pub fn is_sv4_cfg_1(&self) -> bool[src]

Checks if the value of the field is SV4_CFG_1

impl R<u8, SV5_CFG_A>[src]

pub fn variant(&self) -> Variant<u8, SV5_CFG_A>[src]

Get enumerated values variant

pub fn is_sv5_cfg_0(&self) -> bool[src]

Checks if the value of the field is SV5_CFG_0

pub fn is_sv5_cfg_1(&self) -> bool[src]

Checks if the value of the field is SV5_CFG_1

pub fn is_sv5_cfg_2(&self) -> bool[src]

Checks if the value of the field is SV5_CFG_2

impl R<u8, LPSV_CFG_A>[src]

pub fn variant(&self) -> Variant<u8, LPSV_CFG_A>[src]

Get enumerated values variant

pub fn is_lpsv_cfg_0(&self) -> bool[src]

Checks if the value of the field is LPSV_CFG_0

pub fn is_lpsv_cfg_1(&self) -> bool[src]

Checks if the value of the field is LPSV_CFG_1

pub fn is_lpsv_cfg_2(&self) -> bool[src]

Checks if the value of the field is LPSV_CFG_2

impl R<u32, Reg<u32, _HPSVCR>>[src]

pub fn sv0_cfg(&self) -> SV0_CFG_R[src]

Bit 0 - Security Violation 0 Security Violation Configuration This field configures the Security Violation 0 Security Violation Input

pub fn sv1_cfg(&self) -> SV1_CFG_R[src]

Bit 1 - Security Violation 1 Security Violation Configuration This field configures the Security Violation 1 Security Violation Input

pub fn sv2_cfg(&self) -> SV2_CFG_R[src]

Bit 2 - Security Violation 2 Security Violation Configuration This field configures the Security Violation 2 Security Violation Input

pub fn sv3_cfg(&self) -> SV3_CFG_R[src]

Bit 3 - Security Violation 3 Security Violation Configuration This field configures the Security Violation 3 Security Violation Input

pub fn sv4_cfg(&self) -> SV4_CFG_R[src]

Bit 4 - Security Violation 4 Security Violation Configuration This field configures the Security Violation 4 Security Violation Input

pub fn sv5_cfg(&self) -> SV5_CFG_R[src]

Bits 5:6 - Security Violation 5 Security Violation Configuration This field configures the Security Violation 5 Security Violation Input

pub fn lpsv_cfg(&self) -> LPSV_CFG_R[src]

Bits 30:31 - LP Security Violation Configuration This field configures the LP security violation source.

impl R<bool, HPTA_A>[src]

pub fn variant(&self) -> HPTA_A[src]

Get enumerated values variant

pub fn is_hpta_0(&self) -> bool[src]

Checks if the value of the field is HPTA_0

pub fn is_hpta_1(&self) -> bool[src]

Checks if the value of the field is HPTA_1

impl R<bool, PI_A>[src]

pub fn variant(&self) -> PI_A[src]

Get enumerated values variant

pub fn is_pi_0(&self) -> bool[src]

Checks if the value of the field is PI_0

pub fn is_pi_1(&self) -> bool[src]

Checks if the value of the field is PI_1

impl R<u8, SSM_STATE_A>[src]

pub fn variant(&self) -> Variant<u8, SSM_STATE_A>[src]

Get enumerated values variant

pub fn is_ssm_state_0(&self) -> bool[src]

Checks if the value of the field is SSM_STATE_0

pub fn is_ssm_state_1(&self) -> bool[src]

Checks if the value of the field is SSM_STATE_1

pub fn is_ssm_state_3(&self) -> bool[src]

Checks if the value of the field is SSM_STATE_3

pub fn is_ssm_state_8(&self) -> bool[src]

Checks if the value of the field is SSM_STATE_8

pub fn is_ssm_state_9(&self) -> bool[src]

Checks if the value of the field is SSM_STATE_9

pub fn is_ssm_state_11(&self) -> bool[src]

Checks if the value of the field is SSM_STATE_11

pub fn is_ssm_state_13(&self) -> bool[src]

Checks if the value of the field is SSM_STATE_13

pub fn is_ssm_state_15(&self) -> bool[src]

Checks if the value of the field is SSM_STATE_15

impl R<u8, SECURITY_CONFIG_A>[src]

pub fn variant(&self) -> Variant<u8, SECURITY_CONFIG_A>[src]

Get enumerated values variant

pub fn is_fab_config_1(&self) -> bool[src]

Checks if the value of the field is FAB_CONFIG_1

pub fn is_open_config_1(&self) -> bool[src]

Checks if the value of the field is OPEN_CONFIG_1

pub fn is_open_config_2(&self) -> bool[src]

Checks if the value of the field is OPEN_CONFIG_2

pub fn is_open_config_3(&self) -> bool[src]

Checks if the value of the field is OPEN_CONFIG_3

pub fn is_field_return_config(&self) -> bool[src]

Checks if the value of the field is FIELD_RETURN_CONFIG

pub fn is_fab_config_2(&self) -> bool[src]

Checks if the value of the field is FAB_CONFIG_2

pub fn is_closed_config_1(&self) -> bool[src]

Checks if the value of the field is CLOSED_CONFIG_1

pub fn is_closed_config_2(&self) -> bool[src]

Checks if the value of the field is CLOSED_CONFIG_2

pub fn is_closed_config_3(&self) -> bool[src]

Checks if the value of the field is CLOSED_CONFIG_3

impl R<bool, OTPMK_ZERO_A>[src]

pub fn variant(&self) -> OTPMK_ZERO_A[src]

Get enumerated values variant

pub fn is_otpmk_zero_0(&self) -> bool[src]

Checks if the value of the field is OTPMK_ZERO_0

pub fn is_otpmk_zero_1(&self) -> bool[src]

Checks if the value of the field is OTPMK_ZERO_1

impl R<bool, ZMK_ZERO_A>[src]

pub fn variant(&self) -> ZMK_ZERO_A[src]

Get enumerated values variant

pub fn is_zmk_zero_0(&self) -> bool[src]

Checks if the value of the field is ZMK_ZERO_0

pub fn is_zmk_zero_1(&self) -> bool[src]

Checks if the value of the field is ZMK_ZERO_1

impl R<u32, Reg<u32, _HPSR>>[src]

pub fn hpta(&self) -> HPTA_R[src]

Bit 0 - HP Time Alarm Indicates that the HP Time Alarm has occurred since this bit was last cleared.

pub fn pi(&self) -> PI_R[src]

Bit 1 - Periodic Interrupt Indicates that periodic interrupt has occurred since this bit was last cleared.

pub fn lpdis(&self) -> LPDIS_R[src]

Bit 4 - Low Power Disable If 1, the low power section has been disabled by means of an input signal to SNVS

pub fn btn(&self) -> BTN_R[src]

Bit 6 - Button Value of the BTN input

pub fn bi(&self) -> BI_R[src]

Bit 7 - Button Interrupt Signal ipi_snvs_btn_int_b was asserted.

pub fn ssm_state(&self) -> SSM_STATE_R[src]

Bits 8:11 - System Security Monitor State This field contains the encoded state of the SSM's state machine

pub fn security_config(&self) -> SECURITY_CONFIG_R[src]

Bits 12:15 - Security Configuration This field reflects the settings of the sys_secure_boot input and the three security configuration inputs to SNVS

pub fn otpmk_syndrome(&self) -> OTPMK_SYNDROME_R[src]

Bits 16:24 - One Time Programmable Master Key Syndrome In the case of a single-bit error, the eight lower bits of this value indicate the bit number of error location

pub fn otpmk_zero(&self) -> OTPMK_ZERO_R[src]

Bit 27 - One Time Programmable Master Key is Equal to Zero

pub fn zmk_zero(&self) -> ZMK_ZERO_R[src]

Bit 31 - Zeroizable Master Key is Equal to Zero

impl R<bool, SV0_A>[src]

pub fn variant(&self) -> SV0_A[src]

Get enumerated values variant

pub fn is_sv0_0(&self) -> bool[src]

Checks if the value of the field is SV0_0

pub fn is_sv0_1(&self) -> bool[src]

Checks if the value of the field is SV0_1

impl R<bool, SV1_A>[src]

pub fn variant(&self) -> SV1_A[src]

Get enumerated values variant

pub fn is_sv1_0(&self) -> bool[src]

Checks if the value of the field is SV1_0

pub fn is_sv1_1(&self) -> bool[src]

Checks if the value of the field is SV1_1

impl R<bool, SV2_A>[src]

pub fn variant(&self) -> SV2_A[src]

Get enumerated values variant

pub fn is_sv2_0(&self) -> bool[src]

Checks if the value of the field is SV2_0

pub fn is_sv2_1(&self) -> bool[src]

Checks if the value of the field is SV2_1

impl R<bool, SV3_A>[src]

pub fn variant(&self) -> SV3_A[src]

Get enumerated values variant

pub fn is_sv3_0(&self) -> bool[src]

Checks if the value of the field is SV3_0

pub fn is_sv3_1(&self) -> bool[src]

Checks if the value of the field is SV3_1

impl R<bool, SV4_A>[src]

pub fn variant(&self) -> SV4_A[src]

Get enumerated values variant

pub fn is_sv4_0(&self) -> bool[src]

Checks if the value of the field is SV4_0

pub fn is_sv4_1(&self) -> bool[src]

Checks if the value of the field is SV4_1

impl R<bool, SV5_A>[src]

pub fn variant(&self) -> SV5_A[src]

Get enumerated values variant

pub fn is_sv5_0(&self) -> bool[src]

Checks if the value of the field is SV5_0

pub fn is_sv5_1(&self) -> bool[src]

Checks if the value of the field is SV5_1

impl R<bool, ZMK_ECC_FAIL_A>[src]

pub fn variant(&self) -> ZMK_ECC_FAIL_A[src]

Get enumerated values variant

pub fn is_zmk_ecc_fail_0(&self) -> bool[src]

Checks if the value of the field is ZMK_ECC_FAIL_0

pub fn is_zmk_ecc_fail_1(&self) -> bool[src]

Checks if the value of the field is ZMK_ECC_FAIL_1

impl R<u32, Reg<u32, _HPSVSR>>[src]

pub fn sv0(&self) -> SV0_R[src]

Bit 0 - Security Violation 0 security violation was detected.

pub fn sv1(&self) -> SV1_R[src]

Bit 1 - Security Violation 1 security violation was detected.

pub fn sv2(&self) -> SV2_R[src]

Bit 2 - Security Violation 2 security violation was detected.

pub fn sv3(&self) -> SV3_R[src]

Bit 3 - Security Violation 3 security violation was detected.

pub fn sv4(&self) -> SV4_R[src]

Bit 4 - Security Violation 4 security violation was detected.

pub fn sv5(&self) -> SV5_R[src]

Bit 5 - Security Violation 5 security violation was detected.

pub fn sw_sv(&self) -> SW_SV_R[src]

Bit 13 - Software Security Violation This bit is a read-only copy of the SW_SV bit in the HP Command Register

pub fn sw_fsv(&self) -> SW_FSV_R[src]

Bit 14 - Software Fatal Security Violation This bit is a read-only copy of the SW_FSV bit in the HP Command Register

pub fn sw_lpsv(&self) -> SW_LPSV_R[src]

Bit 15 - LP Software Security Violation This bit is a read-only copy of the SW_LPSV bit in the HP Command Register

pub fn zmk_syndrome(&self) -> ZMK_SYNDROME_R[src]

Bits 16:24 - Zeroizable Master Key Syndrome The ZMK syndrome indicates the single-bit error location and parity for the ZMK register

pub fn zmk_ecc_fail(&self) -> ZMK_ECC_FAIL_R[src]

Bit 27 - Zeroizable Master Key Error Correcting Code Check Failure When set, this bit triggers a bad key violation to the SSM and a security violation to the SNVS_LP section, which clears security sensitive data

pub fn lp_sec_vio(&self) -> LP_SEC_VIO_R[src]

Bit 31 - LP Security Violation A security volation was detected in the SNVS low power section.

impl R<u32, Reg<u32, _HPHACIVR>>[src]

pub fn hac_counter_iv(&self) -> HAC_COUNTER_IV_R[src]

Bits 0:31 - High Assurance Counter Initial Value This register is used to set the starting count value to the high assurance counter

impl R<u32, Reg<u32, _HPHACR>>[src]

pub fn hac_counter(&self) -> HAC_COUNTER_R[src]

Bits 0:31 - High Assurance Counter When the HAC_EN bit is set and the SSM is in the soft fail state, this counter starts to count down with the system clock

impl R<u32, Reg<u32, _HPRTCMR>>[src]

pub fn rtc(&self) -> RTC_R[src]

Bits 0:14 - HP Real Time Counter The most-significant 15 bits of the RTC

impl R<u32, Reg<u32, _HPRTCLR>>[src]

pub fn rtc(&self) -> RTC_R[src]

Bits 0:31 - HP Real Time Counter least-significant 32 bits

impl R<u32, Reg<u32, _HPTAMR>>[src]

pub fn hpta_ms(&self) -> HPTA_MS_R[src]

Bits 0:14 - HP Time Alarm, most-significant 15 bits

impl R<u32, Reg<u32, _HPTALR>>[src]

pub fn hpta_ls(&self) -> HPTA_LS_R[src]

Bits 0:31 - HP Time Alarm, 32 least-significant bits

impl R<bool, ZMK_WHL_A>[src]

pub fn variant(&self) -> ZMK_WHL_A[src]

Get enumerated values variant

pub fn is_zmk_whl_0(&self) -> bool[src]

Checks if the value of the field is ZMK_WHL_0

pub fn is_zmk_whl_1(&self) -> bool[src]

Checks if the value of the field is ZMK_WHL_1

impl R<bool, ZMK_RHL_A>[src]

pub fn variant(&self) -> ZMK_RHL_A[src]

Get enumerated values variant

pub fn is_zmk_rhl_0(&self) -> bool[src]

Checks if the value of the field is ZMK_RHL_0

pub fn is_zmk_rhl_1(&self) -> bool[src]

Checks if the value of the field is ZMK_RHL_1

impl R<bool, SRTC_HL_A>[src]

pub fn variant(&self) -> SRTC_HL_A[src]

Get enumerated values variant

pub fn is_srtc_hl_0(&self) -> bool[src]

Checks if the value of the field is SRTC_HL_0

pub fn is_srtc_hl_1(&self) -> bool[src]

Checks if the value of the field is SRTC_HL_1

impl R<bool, LPCALB_HL_A>[src]

pub fn variant(&self) -> LPCALB_HL_A[src]

Get enumerated values variant

pub fn is_lpcalb_hl_0(&self) -> bool[src]

Checks if the value of the field is LPCALB_HL_0

pub fn is_lpcalb_hl_1(&self) -> bool[src]

Checks if the value of the field is LPCALB_HL_1

impl R<bool, MC_HL_A>[src]

pub fn variant(&self) -> MC_HL_A[src]

Get enumerated values variant

pub fn is_mc_hl_0(&self) -> bool[src]

Checks if the value of the field is MC_HL_0

pub fn is_mc_hl_1(&self) -> bool[src]

Checks if the value of the field is MC_HL_1

impl R<bool, GPR_HL_A>[src]

pub fn variant(&self) -> GPR_HL_A[src]

Get enumerated values variant

pub fn is_gpr_hl_0(&self) -> bool[src]

Checks if the value of the field is GPR_HL_0

pub fn is_gpr_hl_1(&self) -> bool[src]

Checks if the value of the field is GPR_HL_1

impl R<bool, LPSVCR_HL_A>[src]

pub fn variant(&self) -> LPSVCR_HL_A[src]

Get enumerated values variant

pub fn is_lpsvcr_hl_0(&self) -> bool[src]

Checks if the value of the field is LPSVCR_HL_0

pub fn is_lpsvcr_hl_1(&self) -> bool[src]

Checks if the value of the field is LPSVCR_HL_1

impl R<bool, LPTDCR_HL_A>[src]

pub fn variant(&self) -> LPTDCR_HL_A[src]

Get enumerated values variant

pub fn is_lptdcr_hl_0(&self) -> bool[src]

Checks if the value of the field is LPTDCR_HL_0

pub fn is_lptdcr_hl_1(&self) -> bool[src]

Checks if the value of the field is LPTDCR_HL_1

impl R<bool, MKS_HL_A>[src]

pub fn variant(&self) -> MKS_HL_A[src]

Get enumerated values variant

pub fn is_mks_hl_0(&self) -> bool[src]

Checks if the value of the field is MKS_HL_0

pub fn is_mks_hl_1(&self) -> bool[src]

Checks if the value of the field is MKS_HL_1

impl R<u32, Reg<u32, _LPLR>>[src]

pub fn zmk_whl(&self) -> ZMK_WHL_R[src]

Bit 0 - Zeroizable Master Key Write Hard Lock When set, prevents any writes (software and hardware) to the ZMK registers and ZMK_HWP, ZMK_VAL, and ZMK_ECC_EN fields of the LPMKCR

pub fn zmk_rhl(&self) -> ZMK_RHL_R[src]

Bit 1 - Zeroizable Master Key Read Hard Lock When set, prevents any software reads to the ZMK registers and ZMK_ECC_VALUE field of the LPMKCR

pub fn srtc_hl(&self) -> SRTC_HL_R[src]

Bit 2 - Secure Real Time Counter Hard Lock When set, prevents any writes to the SRTC registers, SRTC_ENV, and SRTC_INV_EN bits

pub fn lpcalb_hl(&self) -> LPCALB_HL_R[src]

Bit 3 - LP Calibration Hard Lock When set, prevents any writes to the LP Calibration Value (LPCALB_VAL) and LP Calibration Enable (LPCALB_EN)

pub fn mc_hl(&self) -> MC_HL_R[src]

Bit 4 - Monotonic Counter Hard Lock When set, prevents any writes (increments) to the MC Registers and MC_ENV bit

pub fn gpr_hl(&self) -> GPR_HL_R[src]

Bit 5 - General Purpose Register Hard Lock When set, prevents any writes to the GPR

pub fn lpsvcr_hl(&self) -> LPSVCR_HL_R[src]

Bit 6 - LP Security Violation Control Register Hard Lock When set, prevents any writes to the LPSVCR

pub fn lptdcr_hl(&self) -> LPTDCR_HL_R[src]

Bit 8 - LP Tamper Detectors Configuration Register Hard Lock When set, prevents any writes to the LPTDCR

pub fn mks_hl(&self) -> MKS_HL_R[src]

Bit 9 - Master Key Select Hard Lock When set, prevents any writes to the MASTER_KEY_SEL field of the LP Master Key Control Register

impl R<bool, SRTC_ENV_A>[src]

pub fn variant(&self) -> SRTC_ENV_A[src]

Get enumerated values variant

pub fn is_srtc_env_0(&self) -> bool[src]

Checks if the value of the field is SRTC_ENV_0

pub fn is_srtc_env_1(&self) -> bool[src]

Checks if the value of the field is SRTC_ENV_1

impl R<bool, LPTA_EN_A>[src]

pub fn variant(&self) -> LPTA_EN_A[src]

Get enumerated values variant

pub fn is_lpta_en_0(&self) -> bool[src]

Checks if the value of the field is LPTA_EN_0

pub fn is_lpta_en_1(&self) -> bool[src]

Checks if the value of the field is LPTA_EN_1

impl R<bool, MC_ENV_A>[src]

pub fn variant(&self) -> MC_ENV_A[src]

Get enumerated values variant

pub fn is_mc_env_0(&self) -> bool[src]

Checks if the value of the field is MC_ENV_0

pub fn is_mc_env_1(&self) -> bool[src]

Checks if the value of the field is MC_ENV_1

impl R<bool, SRTC_INV_EN_A>[src]

pub fn variant(&self) -> SRTC_INV_EN_A[src]

Get enumerated values variant

pub fn is_srtc_inv_en_0(&self) -> bool[src]

Checks if the value of the field is SRTC_INV_EN_0

pub fn is_srtc_inv_en_1(&self) -> bool[src]

Checks if the value of the field is SRTC_INV_EN_1

impl R<bool, DP_EN_A>[src]

pub fn variant(&self) -> DP_EN_A[src]

Get enumerated values variant

pub fn is_dp_en_0(&self) -> bool[src]

Checks if the value of the field is DP_EN_0

pub fn is_dp_en_1(&self) -> bool[src]

Checks if the value of the field is DP_EN_1

impl R<bool, TOP_A>[src]

pub fn variant(&self) -> TOP_A[src]

Get enumerated values variant

pub fn is_top_0(&self) -> bool[src]

Checks if the value of the field is TOP_0

pub fn is_top_1(&self) -> bool[src]

Checks if the value of the field is TOP_1

impl R<bool, LPCALB_EN_A>[src]

pub fn variant(&self) -> LPCALB_EN_A[src]

Get enumerated values variant

pub fn is_lpcalb_en_0(&self) -> bool[src]

Checks if the value of the field is LPCALB_EN_0

pub fn is_lpcalb_en_1(&self) -> bool[src]

Checks if the value of the field is LPCALB_EN_1

impl R<u8, LPCALB_VAL_A>[src]

pub fn variant(&self) -> Variant<u8, LPCALB_VAL_A>[src]

Get enumerated values variant

pub fn is_lpcalb_val_0(&self) -> bool[src]

Checks if the value of the field is LPCALB_VAL_0

pub fn is_lpcalb_val_1(&self) -> bool[src]

Checks if the value of the field is LPCALB_VAL_1

pub fn is_lpcalb_val_2(&self) -> bool[src]

Checks if the value of the field is LPCALB_VAL_2

pub fn is_lpcalb_val_15(&self) -> bool[src]

Checks if the value of the field is LPCALB_VAL_15

pub fn is_lpcalb_val_16(&self) -> bool[src]

Checks if the value of the field is LPCALB_VAL_16

pub fn is_lpcalb_val_17(&self) -> bool[src]

Checks if the value of the field is LPCALB_VAL_17

pub fn is_lpcalb_val_30(&self) -> bool[src]

Checks if the value of the field is LPCALB_VAL_30

pub fn is_lpcalb_val_31(&self) -> bool[src]

Checks if the value of the field is LPCALB_VAL_31

impl R<u32, Reg<u32, _LPCR>>[src]

pub fn srtc_env(&self) -> SRTC_ENV_R[src]

Bit 0 - Secure Real Time Counter Enabled and Valid When set, the SRTC becomes operational

pub fn lpta_en(&self) -> LPTA_EN_R[src]

Bit 1 - LP Time Alarm Enable When set, the SNVS functional interrupt is asserted if the LP Time Alarm Register is equal to the 32 MSBs of the secure real time counter

pub fn mc_env(&self) -> MC_ENV_R[src]

Bit 2 - Monotonic Counter Enabled and Valid When set, the MC can be incremented (by write transaction to the LPSMCMR or LPSMCLR)

pub fn lpwui_en(&self) -> LPWUI_EN_R[src]

Bit 3 - LP Wake-Up Interrupt Enable This interrupt line should be connected to the external pin and is intended to inform the external chip about an SNVS_LP event (tamper event, MC rollover, SRTC rollover, or time alarm )

pub fn srtc_inv_en(&self) -> SRTC_INV_EN_R[src]

Bit 4 - If this bit is 1, in the case of a security violation the SRTC stops counting and the SRTC is invalidated (SRTC_ENV bit is cleared)

pub fn dp_en(&self) -> DP_EN_R[src]

Bit 5 - Dumb PMIC Enabled When set, software can control the system power

pub fn top(&self) -> TOP_R[src]

Bit 6 - Turn off System Power Asserting this bit causes a signal to be sent to the Power Management IC to turn off the system power

pub fn pwr_glitch_en(&self) -> PWR_GLITCH_EN_R[src]

Bit 7 - Power Glitch Enable By default the detection of a power glitch does not cause the pmic_en_b signal to be asserted

pub fn lpcalb_en(&self) -> LPCALB_EN_R[src]

Bit 8 - LP Calibration Enable When set, enables the SRTC calibration mechanism

pub fn lpcalb_val(&self) -> LPCALB_VAL_R[src]

Bits 10:14 - LP Calibration Value Defines signed calibration value for SRTC

pub fn btn_press_time(&self) -> BTN_PRESS_TIME_R[src]

Bits 16:17 - This field configures the button press time out values for the PMIC Logic

pub fn debounce(&self) -> DEBOUNCE_R[src]

Bits 18:19 - This field configures the amount of debounce time for the BTN input signal

pub fn on_time(&self) -> ON_TIME_R[src]

Bits 20:21 - The ON_TIME field is used to configure the period of time after BTN is asserted before pmic_en_b is asserted to turn on the SoC power

pub fn pk_en(&self) -> PK_EN_R[src]

Bit 22 - PMIC On Request Enable The value written to PK_EN will be asserted on output signal snvs_lp_pk_en

pub fn pk_override(&self) -> PK_OVERRIDE_R[src]

Bit 23 - PMIC On Request Override The value written to PK_OVERRIDE will be asserted on output signal snvs_lp_pk_override

pub fn gpr_z_dis(&self) -> GPR_Z_DIS_R[src]

Bit 24 - General Purpose Registers Zeroization Disable

impl R<u8, MASTER_KEY_SEL_A>[src]

pub fn variant(&self) -> Variant<u8, MASTER_KEY_SEL_A>[src]

Get enumerated values variant

pub fn is_master_key_sel_0(&self) -> bool[src]

Checks if the value of the field is MASTER_KEY_SEL_0

pub fn is_master_key_sel_2(&self) -> bool[src]

Checks if the value of the field is MASTER_KEY_SEL_2

pub fn is_master_key_sel_3(&self) -> bool[src]

Checks if the value of the field is MASTER_KEY_SEL_3

impl R<bool, ZMK_HWP_A>[src]

pub fn variant(&self) -> ZMK_HWP_A[src]

Get enumerated values variant

pub fn is_zmk_hwp_0(&self) -> bool[src]

Checks if the value of the field is ZMK_HWP_0

pub fn is_zmk_hwp_1(&self) -> bool[src]

Checks if the value of the field is ZMK_HWP_1

impl R<bool, ZMK_VAL_A>[src]

pub fn variant(&self) -> ZMK_VAL_A[src]

Get enumerated values variant

pub fn is_zmk_val_0(&self) -> bool[src]

Checks if the value of the field is ZMK_VAL_0

pub fn is_zmk_val_1(&self) -> bool[src]

Checks if the value of the field is ZMK_VAL_1

impl R<bool, ZMK_ECC_EN_A>[src]

pub fn variant(&self) -> ZMK_ECC_EN_A[src]

Get enumerated values variant

pub fn is_zmk_ecc_en_0(&self) -> bool[src]

Checks if the value of the field is ZMK_ECC_EN_0

pub fn is_zmk_ecc_en_1(&self) -> bool[src]

Checks if the value of the field is ZMK_ECC_EN_1

impl R<u32, Reg<u32, _LPMKCR>>[src]

pub fn master_key_sel(&self) -> MASTER_KEY_SEL_R[src]

Bits 0:1 - Master Key Select These bits select the SNVS Master Key output when Master Key Select bits are enabled by MKS_EN bit in the HPCOMR

pub fn zmk_hwp(&self) -> ZMK_HWP_R[src]

Bit 2 - Zeroizable Master Key hardware Programming mode When set, only the hardware key programming mechanism can set the ZMK and software cannot read it

pub fn zmk_val(&self) -> ZMK_VAL_R[src]

Bit 3 - Zeroizable Master Key Valid When set, the ZMK value can be selected by the master key control block for use by cryptographic modules

pub fn zmk_ecc_en(&self) -> ZMK_ECC_EN_R[src]

Bit 4 - Zeroizable Master Key Error Correcting Code Check Enable Writing one to this field automatically calculates and sets the ZMK ECC value in the ZMK_ECC_VALUE field of this register

pub fn zmk_ecc_value(&self) -> ZMK_ECC_VALUE_R[src]

Bits 7:15 - Zeroizable Master Key Error Correcting Code Value This field is automatically calculated and set when one is written into ZMK_ECC_EN bit of this register

impl R<bool, SV0_EN_A>[src]

pub fn variant(&self) -> SV0_EN_A[src]

Get enumerated values variant

pub fn is_sv0_en_0(&self) -> bool[src]

Checks if the value of the field is SV0_EN_0

pub fn is_sv0_en_1(&self) -> bool[src]

Checks if the value of the field is SV0_EN_1

impl R<bool, SV1_EN_A>[src]

pub fn variant(&self) -> SV1_EN_A[src]

Get enumerated values variant

pub fn is_sv1_en_0(&self) -> bool[src]

Checks if the value of the field is SV1_EN_0

pub fn is_sv1_en_1(&self) -> bool[src]

Checks if the value of the field is SV1_EN_1

impl R<bool, SV2_EN_A>[src]

pub fn variant(&self) -> SV2_EN_A[src]

Get enumerated values variant

pub fn is_sv2_en_0(&self) -> bool[src]

Checks if the value of the field is SV2_EN_0

pub fn is_sv2_en_1(&self) -> bool[src]

Checks if the value of the field is SV2_EN_1

impl R<bool, SV3_EN_A>[src]

pub fn variant(&self) -> SV3_EN_A[src]

Get enumerated values variant

pub fn is_sv3_en_0(&self) -> bool[src]

Checks if the value of the field is SV3_EN_0

pub fn is_sv3_en_1(&self) -> bool[src]

Checks if the value of the field is SV3_EN_1

impl R<bool, SV4_EN_A>[src]

pub fn variant(&self) -> SV4_EN_A[src]

Get enumerated values variant

pub fn is_sv4_en_0(&self) -> bool[src]

Checks if the value of the field is SV4_EN_0

pub fn is_sv4_en_1(&self) -> bool[src]

Checks if the value of the field is SV4_EN_1

impl R<bool, SV5_EN_A>[src]

pub fn variant(&self) -> SV5_EN_A[src]

Get enumerated values variant

pub fn is_sv5_en_0(&self) -> bool[src]

Checks if the value of the field is SV5_EN_0

pub fn is_sv5_en_1(&self) -> bool[src]

Checks if the value of the field is SV5_EN_1

impl R<u32, Reg<u32, _LPSVCR>>[src]

pub fn sv0_en(&self) -> SV0_EN_R[src]

Bit 0 - Security Violation 0 Enable This bit enables Security Violation 0 Input

pub fn sv1_en(&self) -> SV1_EN_R[src]

Bit 1 - Security Violation 1 Enable This bit enables Security Violation 1 Input

pub fn sv2_en(&self) -> SV2_EN_R[src]

Bit 2 - Security Violation 2 Enable This bit enables Security Violation 2 Input

pub fn sv3_en(&self) -> SV3_EN_R[src]

Bit 3 - Security Violation 3 Enable This bit enables Security Violation 3 Input

pub fn sv4_en(&self) -> SV4_EN_R[src]

Bit 4 - Security Violation 4 Enable This bit enables Security Violation 4 Input

pub fn sv5_en(&self) -> SV5_EN_R[src]

Bit 5 - Security Violation 5 Enable This bit enables Security Violation 5 Input

impl R<bool, SRTCR_EN_A>[src]

pub fn variant(&self) -> SRTCR_EN_A[src]

Get enumerated values variant

pub fn is_srtcr_en_0(&self) -> bool[src]

Checks if the value of the field is SRTCR_EN_0

pub fn is_srtcr_en_1(&self) -> bool[src]

Checks if the value of the field is SRTCR_EN_1

impl R<bool, MCR_EN_A>[src]

pub fn variant(&self) -> MCR_EN_A[src]

Get enumerated values variant

pub fn is_mcr_en_0(&self) -> bool[src]

Checks if the value of the field is MCR_EN_0

pub fn is_mcr_en_1(&self) -> bool[src]

Checks if the value of the field is MCR_EN_1

impl R<bool, ET1_EN_A>[src]

pub fn variant(&self) -> ET1_EN_A[src]

Get enumerated values variant

pub fn is_et1_en_0(&self) -> bool[src]

Checks if the value of the field is ET1_EN_0

pub fn is_et1_en_1(&self) -> bool[src]

Checks if the value of the field is ET1_EN_1

impl R<bool, ET1P_A>[src]

pub fn variant(&self) -> ET1P_A[src]

Get enumerated values variant

pub fn is_et1p_0(&self) -> bool[src]

Checks if the value of the field is ET1P_0

pub fn is_et1p_1(&self) -> bool[src]

Checks if the value of the field is ET1P_1

impl R<bool, OSCB_A>[src]

pub fn variant(&self) -> OSCB_A[src]

Get enumerated values variant

pub fn is_oscb_0(&self) -> bool[src]

Checks if the value of the field is OSCB_0

pub fn is_oscb_1(&self) -> bool[src]

Checks if the value of the field is OSCB_1

impl R<u32, Reg<u32, _LPTDCR>>[src]

pub fn srtcr_en(&self) -> SRTCR_EN_R[src]

Bit 1 - SRTC Rollover Enable When set, an SRTC rollover event generates an LP security violation.

pub fn mcr_en(&self) -> MCR_EN_R[src]

Bit 2 - MC Rollover Enable When set, an MC Rollover event generates an LP security violation.

pub fn et1_en(&self) -> ET1_EN_R[src]

Bit 9 - External Tampering 1 Enable When set, external tampering 1 detection generates an LP security violation

pub fn et1p(&self) -> ET1P_R[src]

Bit 11 - External Tampering 1 Polarity This bit is used to determine the polarity of external tamper 1.

pub fn pfd_observ(&self) -> PFD_OBSERV_R[src]

Bit 14 - System Power Fail Detector (PFD) Observability Flop The asynchronous reset input of this flop is connected directly to the inverted output of the PFD analog circuitry (external to the SNVS block)

pub fn por_observ(&self) -> POR_OBSERV_R[src]

Bit 15 - Power On Reset (POR) Observability Flop The asynchronous reset input of this flop is connected directly to the output of the POR analog circuitry (external to the SNVS

pub fn oscb(&self) -> OSCB_R[src]

Bit 28 - Oscillator Bypass When OSCB=1 the osc_bypass signal is asserted

impl R<bool, LPTA_A>[src]

pub fn variant(&self) -> LPTA_A[src]

Get enumerated values variant

pub fn is_lpta_0(&self) -> bool[src]

Checks if the value of the field is LPTA_0

pub fn is_lpta_1(&self) -> bool[src]

Checks if the value of the field is LPTA_1

impl R<bool, SRTCR_A>[src]

pub fn variant(&self) -> SRTCR_A[src]

Get enumerated values variant

pub fn is_srtcr_0(&self) -> bool[src]

Checks if the value of the field is SRTCR_0

pub fn is_srtcr_1(&self) -> bool[src]

Checks if the value of the field is SRTCR_1

impl R<bool, MCR_A>[src]

pub fn variant(&self) -> MCR_A[src]

Get enumerated values variant

pub fn is_mcr_0(&self) -> bool[src]

Checks if the value of the field is MCR_0

pub fn is_mcr_1(&self) -> bool[src]

Checks if the value of the field is MCR_1

impl R<bool, ET1D_A>[src]

pub fn variant(&self) -> ET1D_A[src]

Get enumerated values variant

pub fn is_et1d_0(&self) -> bool[src]

Checks if the value of the field is ET1D_0

pub fn is_et1d_1(&self) -> bool[src]

Checks if the value of the field is ET1D_1

impl R<bool, ESVD_A>[src]

pub fn variant(&self) -> ESVD_A[src]

Get enumerated values variant

pub fn is_esvd_0(&self) -> bool[src]

Checks if the value of the field is ESVD_0

pub fn is_esvd_1(&self) -> bool[src]

Checks if the value of the field is ESVD_1

impl R<bool, EO_A>[src]

pub fn variant(&self) -> EO_A[src]

Get enumerated values variant

pub fn is_eo_0(&self) -> bool[src]

Checks if the value of the field is EO_0

pub fn is_eo_1(&self) -> bool[src]

Checks if the value of the field is EO_1

impl R<bool, SPO_A>[src]

pub fn variant(&self) -> SPO_A[src]

Get enumerated values variant

pub fn is_spo_0(&self) -> bool[src]

Checks if the value of the field is SPO_0

pub fn is_spo_1(&self) -> bool[src]

Checks if the value of the field is SPO_1

impl R<bool, SED_A>[src]

pub fn variant(&self) -> SED_A[src]

Get enumerated values variant

pub fn is_sed_0(&self) -> bool[src]

Checks if the value of the field is SED_0

pub fn is_sed_1(&self) -> bool[src]

Checks if the value of the field is SED_1

impl R<bool, LPNS_A>[src]

pub fn variant(&self) -> LPNS_A[src]

Get enumerated values variant

pub fn is_lpns_0(&self) -> bool[src]

Checks if the value of the field is LPNS_0

pub fn is_lpns_1(&self) -> bool[src]

Checks if the value of the field is LPNS_1

impl R<bool, LPS_A>[src]

pub fn variant(&self) -> LPS_A[src]

Get enumerated values variant

pub fn is_lps_0(&self) -> bool[src]

Checks if the value of the field is LPS_0

pub fn is_lps_1(&self) -> bool[src]

Checks if the value of the field is LPS_1

impl R<u32, Reg<u32, _LPSR>>[src]

pub fn lpta(&self) -> LPTA_R[src]

Bit 0 - LP Time Alarm

pub fn srtcr(&self) -> SRTCR_R[src]

Bit 1 - Secure Real Time Counter Rollover

pub fn mcr(&self) -> MCR_R[src]

Bit 2 - Monotonic Counter Rollover

pub fn pgd(&self) -> PGD_R[src]

Bit 3 - Power Supply Glitch Detected 0 No power supply glitch. 1 Power supply glitch is detected.

pub fn et1d(&self) -> ET1D_R[src]

Bit 9 - External Tampering 1 Detected

pub fn esvd(&self) -> ESVD_R[src]

Bit 16 - External Security Violation Detected Indicates that a security violation is detected on one of the HP security violation ports

pub fn eo(&self) -> EO_R[src]

Bit 17 - Emergency Off This bit is set when a power off is requested.

pub fn spo(&self) -> SPO_R[src]

Bit 18 - Set Power Off The SPO bit is set when the power button is pressed longer than the configured debounce time

pub fn sed(&self) -> SED_R[src]

Bit 20 - Scan Exit Detected

pub fn lpns(&self) -> LPNS_R[src]

Bit 30 - LP Section is Non-Secured Indicates that LP section was provisioned/programmed in the non-secure state

pub fn lps(&self) -> LPS_R[src]

Bit 31 - LP Section is Secured Indicates that the LP section is provisioned/programmed in the secure or trusted state

impl R<u32, Reg<u32, _LPSRTCMR>>[src]

pub fn srtc(&self) -> SRTC_R[src]

Bits 0:14 - LP Secure Real Time Counter The most-significant 15 bits of the SRTC

impl R<u32, Reg<u32, _LPSRTCLR>>[src]

pub fn srtc(&self) -> SRTC_R[src]

Bits 0:31 - LP Secure Real Time Counter least-significant 32 bits This register can be programmed only when SRTC is not active and not locked, meaning the SRTC_ENV, SRTC_SL, and SRTC_HL bits are not set

impl R<u32, Reg<u32, _LPTAR>>[src]

pub fn lpta(&self) -> LPTA_R[src]

Bits 0:31 - LP Time Alarm This register can be programmed only when the LP time alarm is disabled (LPTA_EN bit is not set)

impl R<u32, Reg<u32, _LPSMCMR>>[src]

pub fn mon_counter(&self) -> MON_COUNTER_R[src]

Bits 0:15 - Monotonic Counter most-significant 16 Bits The MC is incremented by one when: A write transaction to the LPSMCMR or LPSMCLR register is detected

pub fn mc_era_bits(&self) -> MC_ERA_BITS_R[src]

Bits 16:31 - Monotonic Counter Era Bits These bits are inputs to the module and typically connect to fuses

impl R<u32, Reg<u32, _LPSMCLR>>[src]

pub fn mon_counter(&self) -> MON_COUNTER_R[src]

Bits 0:31 - Monotonic Counter bits The MC is incremented by one when: A write transaction to the LPSMCMR or LPSMCLR Register is detected

impl R<u32, Reg<u32, _LPPGDR>>[src]

pub fn pgd(&self) -> PGD_R[src]

Bits 0:31 - Power Glitch Detector Value

impl R<u32, Reg<u32, _LPGPR0_LEGACY_ALIAS>>[src]

pub fn gpr(&self) -> GPR_R[src]

Bits 0:31 - General Purpose Register When GPR_SL or GPR_HL bit is set, the register cannot be programmed.

impl R<u32, Reg<u32, _LPZMKR>>[src]

pub fn zmk(&self) -> ZMK_R[src]

Bits 0:31 - Zeroizable Master Key Each of these registers contains 32 bits of the 256-bit ZMK value

impl R<u32, Reg<u32, _LPGPR_ALIAS>>[src]

pub fn gpr(&self) -> GPR_R[src]

Bits 0:31 - General Purpose Register When GPR_SL or GPR_HL bit is set, the register cannot be programmed.

impl R<u32, Reg<u32, _LPGPR>>[src]

pub fn gpr(&self) -> GPR_R[src]

Bits 0:31 - General Purpose Register When GPR_SL or GPR_HL bit is set, the register cannot be programmed.

impl R<u32, Reg<u32, _HPVIDR1>>[src]

pub fn minor_rev(&self) -> MINOR_REV_R[src]

Bits 0:7 - SNVS block minor version number

pub fn major_rev(&self) -> MAJOR_REV_R[src]

Bits 8:15 - SNVS block major version number

pub fn ip_id(&self) -> IP_ID_R[src]

Bits 16:31 - SNVS block ID

impl R<u32, Reg<u32, _HPVIDR2>>[src]

pub fn config_opt(&self) -> CONFIG_OPT_R[src]

Bits 0:7 - SNVS Configuration Options

pub fn eco_rev(&self) -> ECO_REV_R[src]

Bits 8:15 - SNVS ECO Revision

pub fn intg_opt(&self) -> INTG_OPT_R[src]

Bits 16:23 - SNVS Integration Options

pub fn ip_era(&self) -> IP_ERA_R[src]

Bits 24:31 - IP Era 00h - Era 1 or 2 03h - Era 3 04h - Era 4 05h - Era 5

Trait Implementations

impl<U, T, FI> PartialEq<FI> for R<U, T> where
    U: PartialEq,
    FI: Copy + Into<U>, 
[src]

Auto Trait Implementations

impl<U, T> Send for R<U, T> where
    T: Send,
    U: Send

impl<U, T> Sync for R<U, T> where
    T: Sync,
    U: Sync

impl<U, T> Unpin for R<U, T> where
    T: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.