[][src]Enum imxrt1062_snvs::hpcomr::LP_SWR_AW

pub enum LP_SWR_AW {
    LP_SWR_0,
    LP_SWR_1,
}

LP Software Reset When set to 1, most registers in the SNVS_LP section are reset, but the following registers are not reset by an LP software reset: Secure Real Time Counter Time Alarm Register This bit cannot be set when the LP_SWR_DIS bit is set

Value on reset: 0

Variants

LP_SWR_0

0: No Action

LP_SWR_1

1: Reset LP section

Trait Implementations

impl Clone for LP_SWR_AW[src]

impl Copy for LP_SWR_AW[src]

impl Debug for LP_SWR_AW[src]

impl From<LP_SWR_AW> for bool[src]

impl PartialEq<LP_SWR_AW> for LP_SWR_AW[src]

impl StructuralPartialEq for LP_SWR_AW[src]

Auto Trait Implementations

impl Send for LP_SWR_AW

impl Sync for LP_SWR_AW

impl Unpin for LP_SWR_AW

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Borrow<T> for T where
    T: ?Sized
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impl<T> BorrowMut<T> for T where
    T: ?Sized
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impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
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impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.