[−][src]Struct imxrt1062_pmu::R
Register/field reader
Result of the read method of a register.
Also it can be used in the modify method
Methods
impl<U, T> R<U, T> where
U: Copy, [src]
U: Copy,
impl<FI> R<bool, FI>[src]
pub fn bit(&self) -> bool[src]
Value of the field as raw bits
pub fn bit_is_clear(&self) -> bool[src]
Returns true if the bit is clear (0)
pub fn bit_is_set(&self) -> bool[src]
Returns true if the bit is set (1)
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_4(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_4
pub fn is_output_trg_16(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_16
impl R<bool, SELREF_WEAK_LINREG_A>[src]
pub fn variant(&self) -> SELREF_WEAK_LINREG_A[src]
Get enumerated values variant
pub fn is_selref_weak_linreg_0(&self) -> bool[src]
Checks if the value of the field is SELREF_WEAK_LINREG_0
pub fn is_selref_weak_linreg_1(&self) -> bool[src]
Checks if the value of the field is SELREF_WEAK_LINREG_1
impl R<u32, Reg<u32, _REG_1P1>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output.
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn enable_pulldown(&self) -> ENABLE_PULLDOWN_R[src]
Bit 3 - Control bit to enable the pull-down circuitry in the regulator
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd1p1(&self) -> BO_VDD1P1_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd1p1(&self) -> OK_VDD1P1_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
pub fn enable_weak_linreg(&self) -> ENABLE_WEAK_LINREG_R[src]
Bit 18 - Enables the weak 1p1 regulator
pub fn selref_weak_linreg(&self) -> SELREF_WEAK_LINREG_R[src]
Bit 19 - Selects the source for the reference voltage of the weak 1p1 regulator.
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_4(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_4
pub fn is_output_trg_16(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_16
impl R<bool, SELREF_WEAK_LINREG_A>[src]
pub fn variant(&self) -> SELREF_WEAK_LINREG_A[src]
Get enumerated values variant
pub fn is_selref_weak_linreg_0(&self) -> bool[src]
Checks if the value of the field is SELREF_WEAK_LINREG_0
pub fn is_selref_weak_linreg_1(&self) -> bool[src]
Checks if the value of the field is SELREF_WEAK_LINREG_1
impl R<u32, Reg<u32, _REG_1P1_SET>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output.
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn enable_pulldown(&self) -> ENABLE_PULLDOWN_R[src]
Bit 3 - Control bit to enable the pull-down circuitry in the regulator
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd1p1(&self) -> BO_VDD1P1_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd1p1(&self) -> OK_VDD1P1_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
pub fn enable_weak_linreg(&self) -> ENABLE_WEAK_LINREG_R[src]
Bit 18 - Enables the weak 1p1 regulator
pub fn selref_weak_linreg(&self) -> SELREF_WEAK_LINREG_R[src]
Bit 19 - Selects the source for the reference voltage of the weak 1p1 regulator.
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_4(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_4
pub fn is_output_trg_16(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_16
impl R<bool, SELREF_WEAK_LINREG_A>[src]
pub fn variant(&self) -> SELREF_WEAK_LINREG_A[src]
Get enumerated values variant
pub fn is_selref_weak_linreg_0(&self) -> bool[src]
Checks if the value of the field is SELREF_WEAK_LINREG_0
pub fn is_selref_weak_linreg_1(&self) -> bool[src]
Checks if the value of the field is SELREF_WEAK_LINREG_1
impl R<u32, Reg<u32, _REG_1P1_CLR>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output.
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn enable_pulldown(&self) -> ENABLE_PULLDOWN_R[src]
Bit 3 - Control bit to enable the pull-down circuitry in the regulator
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd1p1(&self) -> BO_VDD1P1_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd1p1(&self) -> OK_VDD1P1_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
pub fn enable_weak_linreg(&self) -> ENABLE_WEAK_LINREG_R[src]
Bit 18 - Enables the weak 1p1 regulator
pub fn selref_weak_linreg(&self) -> SELREF_WEAK_LINREG_R[src]
Bit 19 - Selects the source for the reference voltage of the weak 1p1 regulator.
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_4(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_4
pub fn is_output_trg_16(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_16
impl R<bool, SELREF_WEAK_LINREG_A>[src]
pub fn variant(&self) -> SELREF_WEAK_LINREG_A[src]
Get enumerated values variant
pub fn is_selref_weak_linreg_0(&self) -> bool[src]
Checks if the value of the field is SELREF_WEAK_LINREG_0
pub fn is_selref_weak_linreg_1(&self) -> bool[src]
Checks if the value of the field is SELREF_WEAK_LINREG_1
impl R<u32, Reg<u32, _REG_1P1_TOG>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output.
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn enable_pulldown(&self) -> ENABLE_PULLDOWN_R[src]
Bit 3 - Control bit to enable the pull-down circuitry in the regulator
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd1p1(&self) -> BO_VDD1P1_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd1p1(&self) -> OK_VDD1P1_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
pub fn enable_weak_linreg(&self) -> ENABLE_WEAK_LINREG_R[src]
Bit 18 - Enables the weak 1p1 regulator
pub fn selref_weak_linreg(&self) -> SELREF_WEAK_LINREG_R[src]
Bit 19 - Selects the source for the reference voltage of the weak 1p1 regulator.
impl R<bool, VBUS_SEL_A>[src]
pub fn variant(&self) -> VBUS_SEL_A[src]
Get enumerated values variant
pub fn is_usb_otg2_vbus(&self) -> bool[src]
Checks if the value of the field is USB_OTG2_VBUS
pub fn is_usb_otg1_vbus(&self) -> bool[src]
Checks if the value of the field is USB_OTG1_VBUS
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_0(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_0
pub fn is_output_trg_15(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_15
pub fn is_output_trg_31(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_31
impl R<u32, Reg<u32, _REG_3P0>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output to be set by the programmed target voltage setting and internal bandgap reference
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn vbus_sel(&self) -> VBUS_SEL_R[src]
Bit 7 - Select input voltage source for LDO_3P0 from either USB_OTG1_VBUS or USB_OTG2_VBUS
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd3p0(&self) -> BO_VDD3P0_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd3p0(&self) -> OK_VDD3P0_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
impl R<bool, VBUS_SEL_A>[src]
pub fn variant(&self) -> VBUS_SEL_A[src]
Get enumerated values variant
pub fn is_usb_otg2_vbus(&self) -> bool[src]
Checks if the value of the field is USB_OTG2_VBUS
pub fn is_usb_otg1_vbus(&self) -> bool[src]
Checks if the value of the field is USB_OTG1_VBUS
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_0(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_0
pub fn is_output_trg_15(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_15
pub fn is_output_trg_31(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_31
impl R<u32, Reg<u32, _REG_3P0_SET>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output to be set by the programmed target voltage setting and internal bandgap reference
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn vbus_sel(&self) -> VBUS_SEL_R[src]
Bit 7 - Select input voltage source for LDO_3P0 from either USB_OTG1_VBUS or USB_OTG2_VBUS
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd3p0(&self) -> BO_VDD3P0_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd3p0(&self) -> OK_VDD3P0_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
impl R<bool, VBUS_SEL_A>[src]
pub fn variant(&self) -> VBUS_SEL_A[src]
Get enumerated values variant
pub fn is_usb_otg2_vbus(&self) -> bool[src]
Checks if the value of the field is USB_OTG2_VBUS
pub fn is_usb_otg1_vbus(&self) -> bool[src]
Checks if the value of the field is USB_OTG1_VBUS
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_0(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_0
pub fn is_output_trg_15(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_15
pub fn is_output_trg_31(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_31
impl R<u32, Reg<u32, _REG_3P0_CLR>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output to be set by the programmed target voltage setting and internal bandgap reference
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn vbus_sel(&self) -> VBUS_SEL_R[src]
Bit 7 - Select input voltage source for LDO_3P0 from either USB_OTG1_VBUS or USB_OTG2_VBUS
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd3p0(&self) -> BO_VDD3P0_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd3p0(&self) -> OK_VDD3P0_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
impl R<bool, VBUS_SEL_A>[src]
pub fn variant(&self) -> VBUS_SEL_A[src]
Get enumerated values variant
pub fn is_usb_otg2_vbus(&self) -> bool[src]
Checks if the value of the field is USB_OTG2_VBUS
pub fn is_usb_otg1_vbus(&self) -> bool[src]
Checks if the value of the field is USB_OTG1_VBUS
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_0(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_0
pub fn is_output_trg_15(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_15
pub fn is_output_trg_31(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_31
impl R<u32, Reg<u32, _REG_3P0_TOG>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output to be set by the programmed target voltage setting and internal bandgap reference
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn vbus_sel(&self) -> VBUS_SEL_R[src]
Bit 7 - Select input voltage source for LDO_3P0 from either USB_OTG1_VBUS or USB_OTG2_VBUS
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd3p0(&self) -> BO_VDD3P0_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd3p0(&self) -> OK_VDD3P0_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_0(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_0
pub fn is_output_trg_16(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_16
pub fn is_output_trg_31(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_31
impl R<u32, Reg<u32, _REG_2P5>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output.
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn enable_pulldown(&self) -> ENABLE_PULLDOWN_R[src]
Bit 3 - Control bit to enable the pull-down circuitry in the regulator
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd2p5(&self) -> BO_VDD2P5_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd2p5(&self) -> OK_VDD2P5_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
pub fn enable_weak_linreg(&self) -> ENABLE_WEAK_LINREG_R[src]
Bit 18 - Enables the weak 2p5 regulator
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_0(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_0
pub fn is_output_trg_16(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_16
pub fn is_output_trg_31(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_31
impl R<u32, Reg<u32, _REG_2P5_SET>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output.
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn enable_pulldown(&self) -> ENABLE_PULLDOWN_R[src]
Bit 3 - Control bit to enable the pull-down circuitry in the regulator
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd2p5(&self) -> BO_VDD2P5_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd2p5(&self) -> OK_VDD2P5_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
pub fn enable_weak_linreg(&self) -> ENABLE_WEAK_LINREG_R[src]
Bit 18 - Enables the weak 2p5 regulator
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_0(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_0
pub fn is_output_trg_16(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_16
pub fn is_output_trg_31(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_31
impl R<u32, Reg<u32, _REG_2P5_CLR>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output.
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn enable_pulldown(&self) -> ENABLE_PULLDOWN_R[src]
Bit 3 - Control bit to enable the pull-down circuitry in the regulator
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd2p5(&self) -> BO_VDD2P5_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd2p5(&self) -> OK_VDD2P5_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
pub fn enable_weak_linreg(&self) -> ENABLE_WEAK_LINREG_R[src]
Bit 18 - Enables the weak 2p5 regulator
impl R<u8, OUTPUT_TRG_A>[src]
pub fn variant(&self) -> Variant<u8, OUTPUT_TRG_A>[src]
Get enumerated values variant
pub fn is_output_trg_0(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_0
pub fn is_output_trg_16(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_16
pub fn is_output_trg_31(&self) -> bool[src]
Checks if the value of the field is OUTPUT_TRG_31
impl R<u32, Reg<u32, _REG_2P5_TOG>>[src]
pub fn enable_linreg(&self) -> ENABLE_LINREG_R[src]
Bit 0 - Control bit to enable the regulator output.
pub fn enable_bo(&self) -> ENABLE_BO_R[src]
Bit 1 - Control bit to enable the brownout circuitry in the regulator.
pub fn enable_ilimit(&self) -> ENABLE_ILIMIT_R[src]
Bit 2 - Control bit to enable the current-limit circuitry in the regulator.
pub fn enable_pulldown(&self) -> ENABLE_PULLDOWN_R[src]
Bit 3 - Control bit to enable the pull-down circuitry in the regulator
pub fn bo_offset(&self) -> BO_OFFSET_R[src]
Bits 4:6 - Control bits to adjust the regulator brownout offset voltage in 25mV steps
pub fn output_trg(&self) -> OUTPUT_TRG_R[src]
Bits 8:12 - Control bits to adjust the regulator output voltage
pub fn bo_vdd2p5(&self) -> BO_VDD2P5_R[src]
Bit 16 - Status bit that signals when a brownout is detected on the regulator output.
pub fn ok_vdd2p5(&self) -> OK_VDD2P5_R[src]
Bit 17 - Status bit that signals when the regulator output is ok. 1 = regulator output > brownout target
pub fn enable_weak_linreg(&self) -> ENABLE_WEAK_LINREG_R[src]
Bit 18 - Enables the weak 2p5 regulator
impl R<u8, REG0_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG0_TARG_A>[src]
Get enumerated values variant
pub fn is_reg0_targ_0(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_0
pub fn is_reg0_targ_1(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_1
pub fn is_reg0_targ_2(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_2
pub fn is_reg0_targ_3(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_3
pub fn is_reg0_targ_16(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_16
pub fn is_reg0_targ_30(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_30
pub fn is_reg0_targ_31(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_31
impl R<u8, REG0_ADJ_A>[src]
pub fn variant(&self) -> REG0_ADJ_A[src]
Get enumerated values variant
pub fn is_reg0_adj_0(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_0
pub fn is_reg0_adj_1(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_1
pub fn is_reg0_adj_2(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_2
pub fn is_reg0_adj_3(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_3
pub fn is_reg0_adj_4(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_4
pub fn is_reg0_adj_5(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_5
pub fn is_reg0_adj_6(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_6
pub fn is_reg0_adj_7(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_7
pub fn is_reg0_adj_8(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_8
pub fn is_reg0_adj_9(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_9
pub fn is_reg0_adj_10(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_10
pub fn is_reg0_adj_11(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_11
pub fn is_reg0_adj_12(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_12
pub fn is_reg0_adj_13(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_13
pub fn is_reg0_adj_14(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_14
pub fn is_reg0_adj_15(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_15
impl R<u8, REG1_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG1_TARG_A>[src]
Get enumerated values variant
pub fn is_reg1_targ_0(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_0
pub fn is_reg1_targ_1(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_1
pub fn is_reg1_targ_2(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_2
pub fn is_reg1_targ_3(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_3
pub fn is_reg1_targ_16(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_16
pub fn is_reg1_targ_30(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_30
pub fn is_reg1_targ_31(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_31
impl R<u8, REG1_ADJ_A>[src]
pub fn variant(&self) -> REG1_ADJ_A[src]
Get enumerated values variant
pub fn is_reg1_adj_0(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_0
pub fn is_reg1_adj_1(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_1
pub fn is_reg1_adj_2(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_2
pub fn is_reg1_adj_3(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_3
pub fn is_reg1_adj_4(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_4
pub fn is_reg1_adj_5(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_5
pub fn is_reg1_adj_6(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_6
pub fn is_reg1_adj_7(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_7
pub fn is_reg1_adj_8(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_8
pub fn is_reg1_adj_9(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_9
pub fn is_reg1_adj_10(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_10
pub fn is_reg1_adj_11(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_11
pub fn is_reg1_adj_12(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_12
pub fn is_reg1_adj_13(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_13
pub fn is_reg1_adj_14(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_14
pub fn is_reg1_adj_15(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_15
impl R<u8, REG2_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG2_TARG_A>[src]
Get enumerated values variant
pub fn is_reg2_targ_0(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_0
pub fn is_reg2_targ_1(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_1
pub fn is_reg2_targ_2(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_2
pub fn is_reg2_targ_3(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_3
pub fn is_reg2_targ_16(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_16
pub fn is_reg2_targ_30(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_30
pub fn is_reg2_targ_31(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_31
impl R<u8, REG2_ADJ_A>[src]
pub fn variant(&self) -> REG2_ADJ_A[src]
Get enumerated values variant
pub fn is_reg2_adj_0(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_0
pub fn is_reg2_adj_1(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_1
pub fn is_reg2_adj_2(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_2
pub fn is_reg2_adj_3(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_3
pub fn is_reg2_adj_4(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_4
pub fn is_reg2_adj_5(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_5
pub fn is_reg2_adj_6(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_6
pub fn is_reg2_adj_7(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_7
pub fn is_reg2_adj_8(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_8
pub fn is_reg2_adj_9(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_9
pub fn is_reg2_adj_10(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_10
pub fn is_reg2_adj_11(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_11
pub fn is_reg2_adj_12(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_12
pub fn is_reg2_adj_13(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_13
pub fn is_reg2_adj_14(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_14
pub fn is_reg2_adj_15(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_15
impl R<u8, RAMP_RATE_A>[src]
pub fn variant(&self) -> RAMP_RATE_A[src]
Get enumerated values variant
pub fn is_ramp_rate_0(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_0
pub fn is_ramp_rate_1(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_1
pub fn is_ramp_rate_2(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_2
pub fn is_ramp_rate_3(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_3
impl R<u32, Reg<u32, _REG_CORE>>[src]
pub fn reg0_targ(&self) -> REG0_TARG_R[src]
Bits 0:4 - This field defines the target voltage for the ARM core power domain
pub fn reg0_adj(&self) -> REG0_ADJ_R[src]
Bits 5:8 - This bit field defines the adjustment bits to calibrate the target value of Reg0. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn reg1_targ(&self) -> REG1_TARG_R[src]
Bits 9:13 - This bit field defines the target voltage for the vpu/gpu power domain. Single bit increments reflect 25mV core voltage steps. Not all steps will make sense to use either because of input supply limitations or load operation.
pub fn reg1_adj(&self) -> REG1_ADJ_R[src]
Bits 14:17 - This bit field defines the adjustment bits to calibrate the target value of Reg1. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn reg2_targ(&self) -> REG2_TARG_R[src]
Bits 18:22 - This field defines the target voltage for the SOC power domain
pub fn reg2_adj(&self) -> REG2_ADJ_R[src]
Bits 23:26 - This bit field defines the adjustment bits to calibrate the target value of Reg2. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn ramp_rate(&self) -> RAMP_RATE_R[src]
Bits 27:28 - Regulator voltage ramp rate.
pub fn fet_odrive(&self) -> FET_ODRIVE_R[src]
Bit 29 - If set, increases the gate drive on power gating FETs to reduce leakage in the off state
impl R<u8, REG0_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG0_TARG_A>[src]
Get enumerated values variant
pub fn is_reg0_targ_0(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_0
pub fn is_reg0_targ_1(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_1
pub fn is_reg0_targ_2(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_2
pub fn is_reg0_targ_3(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_3
pub fn is_reg0_targ_16(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_16
pub fn is_reg0_targ_30(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_30
pub fn is_reg0_targ_31(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_31
impl R<u8, REG0_ADJ_A>[src]
pub fn variant(&self) -> REG0_ADJ_A[src]
Get enumerated values variant
pub fn is_reg0_adj_0(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_0
pub fn is_reg0_adj_1(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_1
pub fn is_reg0_adj_2(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_2
pub fn is_reg0_adj_3(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_3
pub fn is_reg0_adj_4(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_4
pub fn is_reg0_adj_5(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_5
pub fn is_reg0_adj_6(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_6
pub fn is_reg0_adj_7(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_7
pub fn is_reg0_adj_8(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_8
pub fn is_reg0_adj_9(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_9
pub fn is_reg0_adj_10(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_10
pub fn is_reg0_adj_11(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_11
pub fn is_reg0_adj_12(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_12
pub fn is_reg0_adj_13(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_13
pub fn is_reg0_adj_14(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_14
pub fn is_reg0_adj_15(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_15
impl R<u8, REG1_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG1_TARG_A>[src]
Get enumerated values variant
pub fn is_reg1_targ_0(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_0
pub fn is_reg1_targ_1(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_1
pub fn is_reg1_targ_2(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_2
pub fn is_reg1_targ_3(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_3
pub fn is_reg1_targ_16(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_16
pub fn is_reg1_targ_30(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_30
pub fn is_reg1_targ_31(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_31
impl R<u8, REG1_ADJ_A>[src]
pub fn variant(&self) -> REG1_ADJ_A[src]
Get enumerated values variant
pub fn is_reg1_adj_0(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_0
pub fn is_reg1_adj_1(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_1
pub fn is_reg1_adj_2(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_2
pub fn is_reg1_adj_3(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_3
pub fn is_reg1_adj_4(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_4
pub fn is_reg1_adj_5(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_5
pub fn is_reg1_adj_6(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_6
pub fn is_reg1_adj_7(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_7
pub fn is_reg1_adj_8(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_8
pub fn is_reg1_adj_9(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_9
pub fn is_reg1_adj_10(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_10
pub fn is_reg1_adj_11(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_11
pub fn is_reg1_adj_12(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_12
pub fn is_reg1_adj_13(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_13
pub fn is_reg1_adj_14(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_14
pub fn is_reg1_adj_15(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_15
impl R<u8, REG2_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG2_TARG_A>[src]
Get enumerated values variant
pub fn is_reg2_targ_0(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_0
pub fn is_reg2_targ_1(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_1
pub fn is_reg2_targ_2(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_2
pub fn is_reg2_targ_3(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_3
pub fn is_reg2_targ_16(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_16
pub fn is_reg2_targ_30(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_30
pub fn is_reg2_targ_31(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_31
impl R<u8, REG2_ADJ_A>[src]
pub fn variant(&self) -> REG2_ADJ_A[src]
Get enumerated values variant
pub fn is_reg2_adj_0(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_0
pub fn is_reg2_adj_1(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_1
pub fn is_reg2_adj_2(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_2
pub fn is_reg2_adj_3(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_3
pub fn is_reg2_adj_4(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_4
pub fn is_reg2_adj_5(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_5
pub fn is_reg2_adj_6(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_6
pub fn is_reg2_adj_7(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_7
pub fn is_reg2_adj_8(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_8
pub fn is_reg2_adj_9(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_9
pub fn is_reg2_adj_10(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_10
pub fn is_reg2_adj_11(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_11
pub fn is_reg2_adj_12(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_12
pub fn is_reg2_adj_13(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_13
pub fn is_reg2_adj_14(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_14
pub fn is_reg2_adj_15(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_15
impl R<u8, RAMP_RATE_A>[src]
pub fn variant(&self) -> RAMP_RATE_A[src]
Get enumerated values variant
pub fn is_ramp_rate_0(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_0
pub fn is_ramp_rate_1(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_1
pub fn is_ramp_rate_2(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_2
pub fn is_ramp_rate_3(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_3
impl R<u32, Reg<u32, _REG_CORE_SET>>[src]
pub fn reg0_targ(&self) -> REG0_TARG_R[src]
Bits 0:4 - This field defines the target voltage for the ARM core power domain
pub fn reg0_adj(&self) -> REG0_ADJ_R[src]
Bits 5:8 - This bit field defines the adjustment bits to calibrate the target value of Reg0. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn reg1_targ(&self) -> REG1_TARG_R[src]
Bits 9:13 - This bit field defines the target voltage for the vpu/gpu power domain. Single bit increments reflect 25mV core voltage steps. Not all steps will make sense to use either because of input supply limitations or load operation.
pub fn reg1_adj(&self) -> REG1_ADJ_R[src]
Bits 14:17 - This bit field defines the adjustment bits to calibrate the target value of Reg1. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn reg2_targ(&self) -> REG2_TARG_R[src]
Bits 18:22 - This field defines the target voltage for the SOC power domain
pub fn reg2_adj(&self) -> REG2_ADJ_R[src]
Bits 23:26 - This bit field defines the adjustment bits to calibrate the target value of Reg2. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn ramp_rate(&self) -> RAMP_RATE_R[src]
Bits 27:28 - Regulator voltage ramp rate.
pub fn fet_odrive(&self) -> FET_ODRIVE_R[src]
Bit 29 - If set, increases the gate drive on power gating FETs to reduce leakage in the off state
impl R<u8, REG0_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG0_TARG_A>[src]
Get enumerated values variant
pub fn is_reg0_targ_0(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_0
pub fn is_reg0_targ_1(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_1
pub fn is_reg0_targ_2(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_2
pub fn is_reg0_targ_3(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_3
pub fn is_reg0_targ_16(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_16
pub fn is_reg0_targ_30(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_30
pub fn is_reg0_targ_31(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_31
impl R<u8, REG0_ADJ_A>[src]
pub fn variant(&self) -> REG0_ADJ_A[src]
Get enumerated values variant
pub fn is_reg0_adj_0(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_0
pub fn is_reg0_adj_1(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_1
pub fn is_reg0_adj_2(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_2
pub fn is_reg0_adj_3(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_3
pub fn is_reg0_adj_4(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_4
pub fn is_reg0_adj_5(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_5
pub fn is_reg0_adj_6(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_6
pub fn is_reg0_adj_7(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_7
pub fn is_reg0_adj_8(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_8
pub fn is_reg0_adj_9(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_9
pub fn is_reg0_adj_10(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_10
pub fn is_reg0_adj_11(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_11
pub fn is_reg0_adj_12(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_12
pub fn is_reg0_adj_13(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_13
pub fn is_reg0_adj_14(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_14
pub fn is_reg0_adj_15(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_15
impl R<u8, REG1_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG1_TARG_A>[src]
Get enumerated values variant
pub fn is_reg1_targ_0(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_0
pub fn is_reg1_targ_1(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_1
pub fn is_reg1_targ_2(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_2
pub fn is_reg1_targ_3(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_3
pub fn is_reg1_targ_16(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_16
pub fn is_reg1_targ_30(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_30
pub fn is_reg1_targ_31(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_31
impl R<u8, REG1_ADJ_A>[src]
pub fn variant(&self) -> REG1_ADJ_A[src]
Get enumerated values variant
pub fn is_reg1_adj_0(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_0
pub fn is_reg1_adj_1(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_1
pub fn is_reg1_adj_2(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_2
pub fn is_reg1_adj_3(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_3
pub fn is_reg1_adj_4(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_4
pub fn is_reg1_adj_5(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_5
pub fn is_reg1_adj_6(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_6
pub fn is_reg1_adj_7(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_7
pub fn is_reg1_adj_8(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_8
pub fn is_reg1_adj_9(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_9
pub fn is_reg1_adj_10(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_10
pub fn is_reg1_adj_11(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_11
pub fn is_reg1_adj_12(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_12
pub fn is_reg1_adj_13(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_13
pub fn is_reg1_adj_14(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_14
pub fn is_reg1_adj_15(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_15
impl R<u8, REG2_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG2_TARG_A>[src]
Get enumerated values variant
pub fn is_reg2_targ_0(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_0
pub fn is_reg2_targ_1(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_1
pub fn is_reg2_targ_2(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_2
pub fn is_reg2_targ_3(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_3
pub fn is_reg2_targ_16(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_16
pub fn is_reg2_targ_30(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_30
pub fn is_reg2_targ_31(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_31
impl R<u8, REG2_ADJ_A>[src]
pub fn variant(&self) -> REG2_ADJ_A[src]
Get enumerated values variant
pub fn is_reg2_adj_0(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_0
pub fn is_reg2_adj_1(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_1
pub fn is_reg2_adj_2(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_2
pub fn is_reg2_adj_3(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_3
pub fn is_reg2_adj_4(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_4
pub fn is_reg2_adj_5(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_5
pub fn is_reg2_adj_6(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_6
pub fn is_reg2_adj_7(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_7
pub fn is_reg2_adj_8(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_8
pub fn is_reg2_adj_9(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_9
pub fn is_reg2_adj_10(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_10
pub fn is_reg2_adj_11(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_11
pub fn is_reg2_adj_12(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_12
pub fn is_reg2_adj_13(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_13
pub fn is_reg2_adj_14(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_14
pub fn is_reg2_adj_15(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_15
impl R<u8, RAMP_RATE_A>[src]
pub fn variant(&self) -> RAMP_RATE_A[src]
Get enumerated values variant
pub fn is_ramp_rate_0(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_0
pub fn is_ramp_rate_1(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_1
pub fn is_ramp_rate_2(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_2
pub fn is_ramp_rate_3(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_3
impl R<u32, Reg<u32, _REG_CORE_CLR>>[src]
pub fn reg0_targ(&self) -> REG0_TARG_R[src]
Bits 0:4 - This field defines the target voltage for the ARM core power domain
pub fn reg0_adj(&self) -> REG0_ADJ_R[src]
Bits 5:8 - This bit field defines the adjustment bits to calibrate the target value of Reg0. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn reg1_targ(&self) -> REG1_TARG_R[src]
Bits 9:13 - This bit field defines the target voltage for the vpu/gpu power domain. Single bit increments reflect 25mV core voltage steps. Not all steps will make sense to use either because of input supply limitations or load operation.
pub fn reg1_adj(&self) -> REG1_ADJ_R[src]
Bits 14:17 - This bit field defines the adjustment bits to calibrate the target value of Reg1. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn reg2_targ(&self) -> REG2_TARG_R[src]
Bits 18:22 - This field defines the target voltage for the SOC power domain
pub fn reg2_adj(&self) -> REG2_ADJ_R[src]
Bits 23:26 - This bit field defines the adjustment bits to calibrate the target value of Reg2. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn ramp_rate(&self) -> RAMP_RATE_R[src]
Bits 27:28 - Regulator voltage ramp rate.
pub fn fet_odrive(&self) -> FET_ODRIVE_R[src]
Bit 29 - If set, increases the gate drive on power gating FETs to reduce leakage in the off state
impl R<u8, REG0_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG0_TARG_A>[src]
Get enumerated values variant
pub fn is_reg0_targ_0(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_0
pub fn is_reg0_targ_1(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_1
pub fn is_reg0_targ_2(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_2
pub fn is_reg0_targ_3(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_3
pub fn is_reg0_targ_16(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_16
pub fn is_reg0_targ_30(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_30
pub fn is_reg0_targ_31(&self) -> bool[src]
Checks if the value of the field is REG0_TARG_31
impl R<u8, REG0_ADJ_A>[src]
pub fn variant(&self) -> REG0_ADJ_A[src]
Get enumerated values variant
pub fn is_reg0_adj_0(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_0
pub fn is_reg0_adj_1(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_1
pub fn is_reg0_adj_2(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_2
pub fn is_reg0_adj_3(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_3
pub fn is_reg0_adj_4(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_4
pub fn is_reg0_adj_5(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_5
pub fn is_reg0_adj_6(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_6
pub fn is_reg0_adj_7(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_7
pub fn is_reg0_adj_8(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_8
pub fn is_reg0_adj_9(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_9
pub fn is_reg0_adj_10(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_10
pub fn is_reg0_adj_11(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_11
pub fn is_reg0_adj_12(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_12
pub fn is_reg0_adj_13(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_13
pub fn is_reg0_adj_14(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_14
pub fn is_reg0_adj_15(&self) -> bool[src]
Checks if the value of the field is REG0_ADJ_15
impl R<u8, REG1_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG1_TARG_A>[src]
Get enumerated values variant
pub fn is_reg1_targ_0(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_0
pub fn is_reg1_targ_1(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_1
pub fn is_reg1_targ_2(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_2
pub fn is_reg1_targ_3(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_3
pub fn is_reg1_targ_16(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_16
pub fn is_reg1_targ_30(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_30
pub fn is_reg1_targ_31(&self) -> bool[src]
Checks if the value of the field is REG1_TARG_31
impl R<u8, REG1_ADJ_A>[src]
pub fn variant(&self) -> REG1_ADJ_A[src]
Get enumerated values variant
pub fn is_reg1_adj_0(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_0
pub fn is_reg1_adj_1(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_1
pub fn is_reg1_adj_2(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_2
pub fn is_reg1_adj_3(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_3
pub fn is_reg1_adj_4(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_4
pub fn is_reg1_adj_5(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_5
pub fn is_reg1_adj_6(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_6
pub fn is_reg1_adj_7(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_7
pub fn is_reg1_adj_8(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_8
pub fn is_reg1_adj_9(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_9
pub fn is_reg1_adj_10(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_10
pub fn is_reg1_adj_11(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_11
pub fn is_reg1_adj_12(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_12
pub fn is_reg1_adj_13(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_13
pub fn is_reg1_adj_14(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_14
pub fn is_reg1_adj_15(&self) -> bool[src]
Checks if the value of the field is REG1_ADJ_15
impl R<u8, REG2_TARG_A>[src]
pub fn variant(&self) -> Variant<u8, REG2_TARG_A>[src]
Get enumerated values variant
pub fn is_reg2_targ_0(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_0
pub fn is_reg2_targ_1(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_1
pub fn is_reg2_targ_2(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_2
pub fn is_reg2_targ_3(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_3
pub fn is_reg2_targ_16(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_16
pub fn is_reg2_targ_30(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_30
pub fn is_reg2_targ_31(&self) -> bool[src]
Checks if the value of the field is REG2_TARG_31
impl R<u8, REG2_ADJ_A>[src]
pub fn variant(&self) -> REG2_ADJ_A[src]
Get enumerated values variant
pub fn is_reg2_adj_0(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_0
pub fn is_reg2_adj_1(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_1
pub fn is_reg2_adj_2(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_2
pub fn is_reg2_adj_3(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_3
pub fn is_reg2_adj_4(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_4
pub fn is_reg2_adj_5(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_5
pub fn is_reg2_adj_6(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_6
pub fn is_reg2_adj_7(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_7
pub fn is_reg2_adj_8(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_8
pub fn is_reg2_adj_9(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_9
pub fn is_reg2_adj_10(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_10
pub fn is_reg2_adj_11(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_11
pub fn is_reg2_adj_12(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_12
pub fn is_reg2_adj_13(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_13
pub fn is_reg2_adj_14(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_14
pub fn is_reg2_adj_15(&self) -> bool[src]
Checks if the value of the field is REG2_ADJ_15
impl R<u8, RAMP_RATE_A>[src]
pub fn variant(&self) -> RAMP_RATE_A[src]
Get enumerated values variant
pub fn is_ramp_rate_0(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_0
pub fn is_ramp_rate_1(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_1
pub fn is_ramp_rate_2(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_2
pub fn is_ramp_rate_3(&self) -> bool[src]
Checks if the value of the field is RAMP_RATE_3
impl R<u32, Reg<u32, _REG_CORE_TOG>>[src]
pub fn reg0_targ(&self) -> REG0_TARG_R[src]
Bits 0:4 - This field defines the target voltage for the ARM core power domain
pub fn reg0_adj(&self) -> REG0_ADJ_R[src]
Bits 5:8 - This bit field defines the adjustment bits to calibrate the target value of Reg0. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn reg1_targ(&self) -> REG1_TARG_R[src]
Bits 9:13 - This bit field defines the target voltage for the vpu/gpu power domain. Single bit increments reflect 25mV core voltage steps. Not all steps will make sense to use either because of input supply limitations or load operation.
pub fn reg1_adj(&self) -> REG1_ADJ_R[src]
Bits 14:17 - This bit field defines the adjustment bits to calibrate the target value of Reg1. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn reg2_targ(&self) -> REG2_TARG_R[src]
Bits 18:22 - This field defines the target voltage for the SOC power domain
pub fn reg2_adj(&self) -> REG2_ADJ_R[src]
Bits 23:26 - This bit field defines the adjustment bits to calibrate the target value of Reg2. The adjustment is applied on top on any adjustment applied to the global reference in the misc0 register.
pub fn ramp_rate(&self) -> RAMP_RATE_R[src]
Bits 27:28 - Regulator voltage ramp rate.
pub fn fet_odrive(&self) -> FET_ODRIVE_R[src]
Bit 29 - If set, increases the gate drive on power gating FETs to reduce leakage in the off state
impl R<bool, REFTOP_SELFBIASOFF_A>[src]
pub fn variant(&self) -> REFTOP_SELFBIASOFF_A[src]
Get enumerated values variant
pub fn is_reftop_selfbiasoff_0(&self) -> bool[src]
Checks if the value of the field is REFTOP_SELFBIASOFF_0
pub fn is_reftop_selfbiasoff_1(&self) -> bool[src]
Checks if the value of the field is REFTOP_SELFBIASOFF_1
impl R<u8, REFTOP_VBGADJ_A>[src]
pub fn variant(&self) -> REFTOP_VBGADJ_A[src]
Get enumerated values variant
pub fn is_reftop_vbgadj_0(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_0
pub fn is_reftop_vbgadj_1(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_1
pub fn is_reftop_vbgadj_2(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_2
pub fn is_reftop_vbgadj_3(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_3
pub fn is_reftop_vbgadj_4(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_4
pub fn is_reftop_vbgadj_5(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_5
pub fn is_reftop_vbgadj_6(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_6
pub fn is_reftop_vbgadj_7(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_7
impl R<u8, STOP_MODE_CONFIG_A>[src]
pub fn variant(&self) -> STOP_MODE_CONFIG_A[src]
Get enumerated values variant
pub fn is_stop_mode_config_0(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_0
pub fn is_standby(&self) -> bool[src]
Checks if the value of the field is STANDBY
pub fn is_stop_mode_config_2(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_2
pub fn is_stop_mode_config_3(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_3
impl R<bool, DISCON_HIGH_SNVS_A>[src]
pub fn variant(&self) -> DISCON_HIGH_SNVS_A[src]
Get enumerated values variant
pub fn is_discon_high_snvs_0(&self) -> bool[src]
Checks if the value of the field is DISCON_HIGH_SNVS_0
pub fn is_discon_high_snvs_1(&self) -> bool[src]
Checks if the value of the field is DISCON_HIGH_SNVS_1
impl R<u8, OSC_I_A>[src]
pub fn variant(&self) -> OSC_I_A[src]
Get enumerated values variant
pub fn is_nominal(&self) -> bool[src]
Checks if the value of the field is NOMINAL
pub fn is_minus_12_5_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_12_5_PERCENT
pub fn is_minus_25_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_25_PERCENT
pub fn is_minus_37_5_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_37_5_PERCENT
impl R<bool, CLKGATE_CTRL_A>[src]
pub fn variant(&self) -> CLKGATE_CTRL_A[src]
Get enumerated values variant
pub fn is_allow_auto_gate(&self) -> bool[src]
Checks if the value of the field is ALLOW_AUTO_GATE
pub fn is_no_auto_gate(&self) -> bool[src]
Checks if the value of the field is NO_AUTO_GATE
impl R<u8, CLKGATE_DELAY_A>[src]
pub fn variant(&self) -> CLKGATE_DELAY_A[src]
Get enumerated values variant
pub fn is_clkgate_delay_0(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_0
pub fn is_clkgate_delay_1(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_1
pub fn is_clkgate_delay_2(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_2
pub fn is_clkgate_delay_3(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_3
pub fn is_clkgate_delay_4(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_4
pub fn is_clkgate_delay_5(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_5
pub fn is_clkgate_delay_6(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_6
pub fn is_clkgate_delay_7(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_7
impl R<bool, RTC_XTAL_SOURCE_A>[src]
pub fn variant(&self) -> RTC_XTAL_SOURCE_A[src]
Get enumerated values variant
pub fn is_rtc_xtal_source_0(&self) -> bool[src]
Checks if the value of the field is RTC_XTAL_SOURCE_0
pub fn is_rtc_xtal_source_1(&self) -> bool[src]
Checks if the value of the field is RTC_XTAL_SOURCE_1
impl R<bool, VID_PLL_PREDIV_A>[src]
pub fn variant(&self) -> VID_PLL_PREDIV_A[src]
Get enumerated values variant
pub fn is_vid_pll_prediv_0(&self) -> bool[src]
Checks if the value of the field is VID_PLL_PREDIV_0
pub fn is_vid_pll_prediv_1(&self) -> bool[src]
Checks if the value of the field is VID_PLL_PREDIV_1
impl R<u32, Reg<u32, _MISC0>>[src]
pub fn reftop_pwd(&self) -> REFTOP_PWD_R[src]
Bit 0 - Control bit to power-down the analog bandgap reference circuitry
pub fn reftop_selfbiasoff(&self) -> REFTOP_SELFBIASOFF_R[src]
Bit 3 - Control bit to disable the self-bias circuit in the analog bandgap
pub fn reftop_vbgadj(&self) -> REFTOP_VBGADJ_R[src]
Bits 4:6 - no description available
pub fn reftop_vbgup(&self) -> REFTOP_VBGUP_R[src]
Bit 7 - Status bit that signals the analog bandgap voltage is up and stable. 1 - Stable.
pub fn stop_mode_config(&self) -> STOP_MODE_CONFIG_R[src]
Bits 10:11 - Configure the analog behavior in stop mode.
pub fn discon_high_snvs(&self) -> DISCON_HIGH_SNVS_R[src]
Bit 12 - This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.
pub fn osc_i(&self) -> OSC_I_R[src]
Bits 13:14 - This field determines the bias current in the 24MHz oscillator
pub fn osc_xtalok(&self) -> OSC_XTALOK_R[src]
Bit 15 - Status bit that signals that the output of the 24-MHz crystal oscillator is stable
pub fn osc_xtalok_en(&self) -> OSC_XTALOK_EN_R[src]
Bit 16 - This bit enables the detector that signals when the 24MHz crystal oscillator is stable
pub fn clkgate_ctrl(&self) -> CLKGATE_CTRL_R[src]
Bit 25 - This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block
pub fn clkgate_delay(&self) -> CLKGATE_DELAY_R[src]
Bits 26:28 - This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block
pub fn rtc_xtal_source(&self) -> RTC_XTAL_SOURCE_R[src]
Bit 29 - This field indicates which chip source is being used for the rtc clock.
pub fn xtal_24m_pwd(&self) -> XTAL_24M_PWD_R[src]
Bit 30 - This field powers down the 24M crystal oscillator if set true.
pub fn vid_pll_prediv(&self) -> VID_PLL_PREDIV_R[src]
Bit 31 - Predivider for the source clock of the PLL's.
impl R<bool, REFTOP_SELFBIASOFF_A>[src]
pub fn variant(&self) -> REFTOP_SELFBIASOFF_A[src]
Get enumerated values variant
pub fn is_reftop_selfbiasoff_0(&self) -> bool[src]
Checks if the value of the field is REFTOP_SELFBIASOFF_0
pub fn is_reftop_selfbiasoff_1(&self) -> bool[src]
Checks if the value of the field is REFTOP_SELFBIASOFF_1
impl R<u8, REFTOP_VBGADJ_A>[src]
pub fn variant(&self) -> REFTOP_VBGADJ_A[src]
Get enumerated values variant
pub fn is_reftop_vbgadj_0(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_0
pub fn is_reftop_vbgadj_1(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_1
pub fn is_reftop_vbgadj_2(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_2
pub fn is_reftop_vbgadj_3(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_3
pub fn is_reftop_vbgadj_4(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_4
pub fn is_reftop_vbgadj_5(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_5
pub fn is_reftop_vbgadj_6(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_6
pub fn is_reftop_vbgadj_7(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_7
impl R<u8, STOP_MODE_CONFIG_A>[src]
pub fn variant(&self) -> STOP_MODE_CONFIG_A[src]
Get enumerated values variant
pub fn is_stop_mode_config_0(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_0
pub fn is_standby(&self) -> bool[src]
Checks if the value of the field is STANDBY
pub fn is_stop_mode_config_2(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_2
pub fn is_stop_mode_config_3(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_3
impl R<bool, DISCON_HIGH_SNVS_A>[src]
pub fn variant(&self) -> DISCON_HIGH_SNVS_A[src]
Get enumerated values variant
pub fn is_discon_high_snvs_0(&self) -> bool[src]
Checks if the value of the field is DISCON_HIGH_SNVS_0
pub fn is_discon_high_snvs_1(&self) -> bool[src]
Checks if the value of the field is DISCON_HIGH_SNVS_1
impl R<u8, OSC_I_A>[src]
pub fn variant(&self) -> OSC_I_A[src]
Get enumerated values variant
pub fn is_nominal(&self) -> bool[src]
Checks if the value of the field is NOMINAL
pub fn is_minus_12_5_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_12_5_PERCENT
pub fn is_minus_25_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_25_PERCENT
pub fn is_minus_37_5_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_37_5_PERCENT
impl R<bool, CLKGATE_CTRL_A>[src]
pub fn variant(&self) -> CLKGATE_CTRL_A[src]
Get enumerated values variant
pub fn is_allow_auto_gate(&self) -> bool[src]
Checks if the value of the field is ALLOW_AUTO_GATE
pub fn is_no_auto_gate(&self) -> bool[src]
Checks if the value of the field is NO_AUTO_GATE
impl R<u8, CLKGATE_DELAY_A>[src]
pub fn variant(&self) -> CLKGATE_DELAY_A[src]
Get enumerated values variant
pub fn is_clkgate_delay_0(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_0
pub fn is_clkgate_delay_1(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_1
pub fn is_clkgate_delay_2(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_2
pub fn is_clkgate_delay_3(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_3
pub fn is_clkgate_delay_4(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_4
pub fn is_clkgate_delay_5(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_5
pub fn is_clkgate_delay_6(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_6
pub fn is_clkgate_delay_7(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_7
impl R<bool, RTC_XTAL_SOURCE_A>[src]
pub fn variant(&self) -> RTC_XTAL_SOURCE_A[src]
Get enumerated values variant
pub fn is_rtc_xtal_source_0(&self) -> bool[src]
Checks if the value of the field is RTC_XTAL_SOURCE_0
pub fn is_rtc_xtal_source_1(&self) -> bool[src]
Checks if the value of the field is RTC_XTAL_SOURCE_1
impl R<bool, VID_PLL_PREDIV_A>[src]
pub fn variant(&self) -> VID_PLL_PREDIV_A[src]
Get enumerated values variant
pub fn is_vid_pll_prediv_0(&self) -> bool[src]
Checks if the value of the field is VID_PLL_PREDIV_0
pub fn is_vid_pll_prediv_1(&self) -> bool[src]
Checks if the value of the field is VID_PLL_PREDIV_1
impl R<u32, Reg<u32, _MISC0_SET>>[src]
pub fn reftop_pwd(&self) -> REFTOP_PWD_R[src]
Bit 0 - Control bit to power-down the analog bandgap reference circuitry
pub fn reftop_selfbiasoff(&self) -> REFTOP_SELFBIASOFF_R[src]
Bit 3 - Control bit to disable the self-bias circuit in the analog bandgap
pub fn reftop_vbgadj(&self) -> REFTOP_VBGADJ_R[src]
Bits 4:6 - no description available
pub fn reftop_vbgup(&self) -> REFTOP_VBGUP_R[src]
Bit 7 - Status bit that signals the analog bandgap voltage is up and stable. 1 - Stable.
pub fn stop_mode_config(&self) -> STOP_MODE_CONFIG_R[src]
Bits 10:11 - Configure the analog behavior in stop mode.
pub fn discon_high_snvs(&self) -> DISCON_HIGH_SNVS_R[src]
Bit 12 - This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.
pub fn osc_i(&self) -> OSC_I_R[src]
Bits 13:14 - This field determines the bias current in the 24MHz oscillator
pub fn osc_xtalok(&self) -> OSC_XTALOK_R[src]
Bit 15 - Status bit that signals that the output of the 24-MHz crystal oscillator is stable
pub fn osc_xtalok_en(&self) -> OSC_XTALOK_EN_R[src]
Bit 16 - This bit enables the detector that signals when the 24MHz crystal oscillator is stable
pub fn clkgate_ctrl(&self) -> CLKGATE_CTRL_R[src]
Bit 25 - This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block
pub fn clkgate_delay(&self) -> CLKGATE_DELAY_R[src]
Bits 26:28 - This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block
pub fn rtc_xtal_source(&self) -> RTC_XTAL_SOURCE_R[src]
Bit 29 - This field indicates which chip source is being used for the rtc clock.
pub fn xtal_24m_pwd(&self) -> XTAL_24M_PWD_R[src]
Bit 30 - This field powers down the 24M crystal oscillator if set true.
pub fn vid_pll_prediv(&self) -> VID_PLL_PREDIV_R[src]
Bit 31 - Predivider for the source clock of the PLL's.
impl R<bool, REFTOP_SELFBIASOFF_A>[src]
pub fn variant(&self) -> REFTOP_SELFBIASOFF_A[src]
Get enumerated values variant
pub fn is_reftop_selfbiasoff_0(&self) -> bool[src]
Checks if the value of the field is REFTOP_SELFBIASOFF_0
pub fn is_reftop_selfbiasoff_1(&self) -> bool[src]
Checks if the value of the field is REFTOP_SELFBIASOFF_1
impl R<u8, REFTOP_VBGADJ_A>[src]
pub fn variant(&self) -> REFTOP_VBGADJ_A[src]
Get enumerated values variant
pub fn is_reftop_vbgadj_0(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_0
pub fn is_reftop_vbgadj_1(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_1
pub fn is_reftop_vbgadj_2(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_2
pub fn is_reftop_vbgadj_3(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_3
pub fn is_reftop_vbgadj_4(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_4
pub fn is_reftop_vbgadj_5(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_5
pub fn is_reftop_vbgadj_6(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_6
pub fn is_reftop_vbgadj_7(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_7
impl R<u8, STOP_MODE_CONFIG_A>[src]
pub fn variant(&self) -> STOP_MODE_CONFIG_A[src]
Get enumerated values variant
pub fn is_stop_mode_config_0(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_0
pub fn is_standby(&self) -> bool[src]
Checks if the value of the field is STANDBY
pub fn is_stop_mode_config_2(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_2
pub fn is_stop_mode_config_3(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_3
impl R<bool, DISCON_HIGH_SNVS_A>[src]
pub fn variant(&self) -> DISCON_HIGH_SNVS_A[src]
Get enumerated values variant
pub fn is_discon_high_snvs_0(&self) -> bool[src]
Checks if the value of the field is DISCON_HIGH_SNVS_0
pub fn is_discon_high_snvs_1(&self) -> bool[src]
Checks if the value of the field is DISCON_HIGH_SNVS_1
impl R<u8, OSC_I_A>[src]
pub fn variant(&self) -> OSC_I_A[src]
Get enumerated values variant
pub fn is_nominal(&self) -> bool[src]
Checks if the value of the field is NOMINAL
pub fn is_minus_12_5_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_12_5_PERCENT
pub fn is_minus_25_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_25_PERCENT
pub fn is_minus_37_5_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_37_5_PERCENT
impl R<bool, CLKGATE_CTRL_A>[src]
pub fn variant(&self) -> CLKGATE_CTRL_A[src]
Get enumerated values variant
pub fn is_allow_auto_gate(&self) -> bool[src]
Checks if the value of the field is ALLOW_AUTO_GATE
pub fn is_no_auto_gate(&self) -> bool[src]
Checks if the value of the field is NO_AUTO_GATE
impl R<u8, CLKGATE_DELAY_A>[src]
pub fn variant(&self) -> CLKGATE_DELAY_A[src]
Get enumerated values variant
pub fn is_clkgate_delay_0(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_0
pub fn is_clkgate_delay_1(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_1
pub fn is_clkgate_delay_2(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_2
pub fn is_clkgate_delay_3(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_3
pub fn is_clkgate_delay_4(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_4
pub fn is_clkgate_delay_5(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_5
pub fn is_clkgate_delay_6(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_6
pub fn is_clkgate_delay_7(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_7
impl R<bool, RTC_XTAL_SOURCE_A>[src]
pub fn variant(&self) -> RTC_XTAL_SOURCE_A[src]
Get enumerated values variant
pub fn is_rtc_xtal_source_0(&self) -> bool[src]
Checks if the value of the field is RTC_XTAL_SOURCE_0
pub fn is_rtc_xtal_source_1(&self) -> bool[src]
Checks if the value of the field is RTC_XTAL_SOURCE_1
impl R<bool, VID_PLL_PREDIV_A>[src]
pub fn variant(&self) -> VID_PLL_PREDIV_A[src]
Get enumerated values variant
pub fn is_vid_pll_prediv_0(&self) -> bool[src]
Checks if the value of the field is VID_PLL_PREDIV_0
pub fn is_vid_pll_prediv_1(&self) -> bool[src]
Checks if the value of the field is VID_PLL_PREDIV_1
impl R<u32, Reg<u32, _MISC0_CLR>>[src]
pub fn reftop_pwd(&self) -> REFTOP_PWD_R[src]
Bit 0 - Control bit to power-down the analog bandgap reference circuitry
pub fn reftop_selfbiasoff(&self) -> REFTOP_SELFBIASOFF_R[src]
Bit 3 - Control bit to disable the self-bias circuit in the analog bandgap
pub fn reftop_vbgadj(&self) -> REFTOP_VBGADJ_R[src]
Bits 4:6 - no description available
pub fn reftop_vbgup(&self) -> REFTOP_VBGUP_R[src]
Bit 7 - Status bit that signals the analog bandgap voltage is up and stable. 1 - Stable.
pub fn stop_mode_config(&self) -> STOP_MODE_CONFIG_R[src]
Bits 10:11 - Configure the analog behavior in stop mode.
pub fn discon_high_snvs(&self) -> DISCON_HIGH_SNVS_R[src]
Bit 12 - This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.
pub fn osc_i(&self) -> OSC_I_R[src]
Bits 13:14 - This field determines the bias current in the 24MHz oscillator
pub fn osc_xtalok(&self) -> OSC_XTALOK_R[src]
Bit 15 - Status bit that signals that the output of the 24-MHz crystal oscillator is stable
pub fn osc_xtalok_en(&self) -> OSC_XTALOK_EN_R[src]
Bit 16 - This bit enables the detector that signals when the 24MHz crystal oscillator is stable
pub fn clkgate_ctrl(&self) -> CLKGATE_CTRL_R[src]
Bit 25 - This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block
pub fn clkgate_delay(&self) -> CLKGATE_DELAY_R[src]
Bits 26:28 - This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block
pub fn rtc_xtal_source(&self) -> RTC_XTAL_SOURCE_R[src]
Bit 29 - This field indicates which chip source is being used for the rtc clock.
pub fn xtal_24m_pwd(&self) -> XTAL_24M_PWD_R[src]
Bit 30 - This field powers down the 24M crystal oscillator if set true.
pub fn vid_pll_prediv(&self) -> VID_PLL_PREDIV_R[src]
Bit 31 - Predivider for the source clock of the PLL's.
impl R<bool, REFTOP_SELFBIASOFF_A>[src]
pub fn variant(&self) -> REFTOP_SELFBIASOFF_A[src]
Get enumerated values variant
pub fn is_reftop_selfbiasoff_0(&self) -> bool[src]
Checks if the value of the field is REFTOP_SELFBIASOFF_0
pub fn is_reftop_selfbiasoff_1(&self) -> bool[src]
Checks if the value of the field is REFTOP_SELFBIASOFF_1
impl R<u8, REFTOP_VBGADJ_A>[src]
pub fn variant(&self) -> REFTOP_VBGADJ_A[src]
Get enumerated values variant
pub fn is_reftop_vbgadj_0(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_0
pub fn is_reftop_vbgadj_1(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_1
pub fn is_reftop_vbgadj_2(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_2
pub fn is_reftop_vbgadj_3(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_3
pub fn is_reftop_vbgadj_4(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_4
pub fn is_reftop_vbgadj_5(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_5
pub fn is_reftop_vbgadj_6(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_6
pub fn is_reftop_vbgadj_7(&self) -> bool[src]
Checks if the value of the field is REFTOP_VBGADJ_7
impl R<u8, STOP_MODE_CONFIG_A>[src]
pub fn variant(&self) -> STOP_MODE_CONFIG_A[src]
Get enumerated values variant
pub fn is_stop_mode_config_0(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_0
pub fn is_standby(&self) -> bool[src]
Checks if the value of the field is STANDBY
pub fn is_stop_mode_config_2(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_2
pub fn is_stop_mode_config_3(&self) -> bool[src]
Checks if the value of the field is STOP_MODE_CONFIG_3
impl R<bool, DISCON_HIGH_SNVS_A>[src]
pub fn variant(&self) -> DISCON_HIGH_SNVS_A[src]
Get enumerated values variant
pub fn is_discon_high_snvs_0(&self) -> bool[src]
Checks if the value of the field is DISCON_HIGH_SNVS_0
pub fn is_discon_high_snvs_1(&self) -> bool[src]
Checks if the value of the field is DISCON_HIGH_SNVS_1
impl R<u8, OSC_I_A>[src]
pub fn variant(&self) -> OSC_I_A[src]
Get enumerated values variant
pub fn is_nominal(&self) -> bool[src]
Checks if the value of the field is NOMINAL
pub fn is_minus_12_5_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_12_5_PERCENT
pub fn is_minus_25_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_25_PERCENT
pub fn is_minus_37_5_percent(&self) -> bool[src]
Checks if the value of the field is MINUS_37_5_PERCENT
impl R<bool, CLKGATE_CTRL_A>[src]
pub fn variant(&self) -> CLKGATE_CTRL_A[src]
Get enumerated values variant
pub fn is_allow_auto_gate(&self) -> bool[src]
Checks if the value of the field is ALLOW_AUTO_GATE
pub fn is_no_auto_gate(&self) -> bool[src]
Checks if the value of the field is NO_AUTO_GATE
impl R<u8, CLKGATE_DELAY_A>[src]
pub fn variant(&self) -> CLKGATE_DELAY_A[src]
Get enumerated values variant
pub fn is_clkgate_delay_0(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_0
pub fn is_clkgate_delay_1(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_1
pub fn is_clkgate_delay_2(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_2
pub fn is_clkgate_delay_3(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_3
pub fn is_clkgate_delay_4(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_4
pub fn is_clkgate_delay_5(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_5
pub fn is_clkgate_delay_6(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_6
pub fn is_clkgate_delay_7(&self) -> bool[src]
Checks if the value of the field is CLKGATE_DELAY_7
impl R<bool, RTC_XTAL_SOURCE_A>[src]
pub fn variant(&self) -> RTC_XTAL_SOURCE_A[src]
Get enumerated values variant
pub fn is_rtc_xtal_source_0(&self) -> bool[src]
Checks if the value of the field is RTC_XTAL_SOURCE_0
pub fn is_rtc_xtal_source_1(&self) -> bool[src]
Checks if the value of the field is RTC_XTAL_SOURCE_1
impl R<bool, VID_PLL_PREDIV_A>[src]
pub fn variant(&self) -> VID_PLL_PREDIV_A[src]
Get enumerated values variant
pub fn is_vid_pll_prediv_0(&self) -> bool[src]
Checks if the value of the field is VID_PLL_PREDIV_0
pub fn is_vid_pll_prediv_1(&self) -> bool[src]
Checks if the value of the field is VID_PLL_PREDIV_1
impl R<u32, Reg<u32, _MISC0_TOG>>[src]
pub fn reftop_pwd(&self) -> REFTOP_PWD_R[src]
Bit 0 - Control bit to power-down the analog bandgap reference circuitry
pub fn reftop_selfbiasoff(&self) -> REFTOP_SELFBIASOFF_R[src]
Bit 3 - Control bit to disable the self-bias circuit in the analog bandgap
pub fn reftop_vbgadj(&self) -> REFTOP_VBGADJ_R[src]
Bits 4:6 - no description available
pub fn reftop_vbgup(&self) -> REFTOP_VBGUP_R[src]
Bit 7 - Status bit that signals the analog bandgap voltage is up and stable. 1 - Stable.
pub fn stop_mode_config(&self) -> STOP_MODE_CONFIG_R[src]
Bits 10:11 - Configure the analog behavior in stop mode.
pub fn discon_high_snvs(&self) -> DISCON_HIGH_SNVS_R[src]
Bit 12 - This bit controls a switch from VDD_HIGH_IN to VDD_SNVS_IN.
pub fn osc_i(&self) -> OSC_I_R[src]
Bits 13:14 - This field determines the bias current in the 24MHz oscillator
pub fn osc_xtalok(&self) -> OSC_XTALOK_R[src]
Bit 15 - Status bit that signals that the output of the 24-MHz crystal oscillator is stable
pub fn osc_xtalok_en(&self) -> OSC_XTALOK_EN_R[src]
Bit 16 - This bit enables the detector that signals when the 24MHz crystal oscillator is stable
pub fn clkgate_ctrl(&self) -> CLKGATE_CTRL_R[src]
Bit 25 - This bit allows disabling the clock gate (always ungated) for the xtal 24MHz clock that clocks the digital logic in the analog block
pub fn clkgate_delay(&self) -> CLKGATE_DELAY_R[src]
Bits 26:28 - This field specifies the delay between powering up the XTAL 24MHz clock and releasing the clock to the digital logic inside the analog block
pub fn rtc_xtal_source(&self) -> RTC_XTAL_SOURCE_R[src]
Bit 29 - This field indicates which chip source is being used for the rtc clock.
pub fn xtal_24m_pwd(&self) -> XTAL_24M_PWD_R[src]
Bit 30 - This field powers down the 24M crystal oscillator if set true.
pub fn vid_pll_prediv(&self) -> VID_PLL_PREDIV_R[src]
Bit 31 - Predivider for the source clock of the PLL's.
impl R<u8, LVDS1_CLK_SEL_A>[src]
pub fn variant(&self) -> Variant<u8, LVDS1_CLK_SEL_A>[src]
Get enumerated values variant
pub fn is_arm_pll(&self) -> bool[src]
Checks if the value of the field is ARM_PLL
pub fn is_sys_pll(&self) -> bool[src]
Checks if the value of the field is SYS_PLL
pub fn is_pfd4(&self) -> bool[src]
Checks if the value of the field is PFD4
pub fn is_pfd5(&self) -> bool[src]
Checks if the value of the field is PFD5
pub fn is_pfd6(&self) -> bool[src]
Checks if the value of the field is PFD6
pub fn is_pfd7(&self) -> bool[src]
Checks if the value of the field is PFD7
pub fn is_audio_pll(&self) -> bool[src]
Checks if the value of the field is AUDIO_PLL
pub fn is_video_pll(&self) -> bool[src]
Checks if the value of the field is VIDEO_PLL
pub fn is_ethernet_ref(&self) -> bool[src]
Checks if the value of the field is ETHERNET_REF
pub fn is_usb1_pll(&self) -> bool[src]
Checks if the value of the field is USB1_PLL
pub fn is_usb2_pll(&self) -> bool[src]
Checks if the value of the field is USB2_PLL
pub fn is_pfd0(&self) -> bool[src]
Checks if the value of the field is PFD0
pub fn is_pfd1(&self) -> bool[src]
Checks if the value of the field is PFD1
pub fn is_pfd2(&self) -> bool[src]
Checks if the value of the field is PFD2
pub fn is_pfd3(&self) -> bool[src]
Checks if the value of the field is PFD3
pub fn is_xtal(&self) -> bool[src]
Checks if the value of the field is XTAL
impl R<u8, LVDS2_CLK_SEL_A>[src]
pub fn variant(&self) -> Variant<u8, LVDS2_CLK_SEL_A>[src]
Get enumerated values variant
pub fn is_arm_pll(&self) -> bool[src]
Checks if the value of the field is ARM_PLL
pub fn is_sys_pll(&self) -> bool[src]
Checks if the value of the field is SYS_PLL
pub fn is_pfd4(&self) -> bool[src]
Checks if the value of the field is PFD4
pub fn is_pfd5(&self) -> bool[src]
Checks if the value of the field is PFD5
pub fn is_pfd6(&self) -> bool[src]
Checks if the value of the field is PFD6
pub fn is_pfd7(&self) -> bool[src]
Checks if the value of the field is PFD7
pub fn is_audio_pll(&self) -> bool[src]
Checks if the value of the field is AUDIO_PLL
pub fn is_video_pll(&self) -> bool[src]
Checks if the value of the field is VIDEO_PLL
pub fn is_mlb_pll(&self) -> bool[src]
Checks if the value of the field is MLB_PLL
pub fn is_ethernet_ref(&self) -> bool[src]
Checks if the value of the field is ETHERNET_REF
pub fn is_pcie_ref(&self) -> bool[src]
Checks if the value of the field is PCIE_REF
pub fn is_sata_ref(&self) -> bool[src]
Checks if the value of the field is SATA_REF
pub fn is_usb1_pll(&self) -> bool[src]
Checks if the value of the field is USB1_PLL
pub fn is_usb2_pll(&self) -> bool[src]
Checks if the value of the field is USB2_PLL
pub fn is_pfd0(&self) -> bool[src]
Checks if the value of the field is PFD0
pub fn is_pfd1(&self) -> bool[src]
Checks if the value of the field is PFD1
pub fn is_pfd2(&self) -> bool[src]
Checks if the value of the field is PFD2
pub fn is_pfd3(&self) -> bool[src]
Checks if the value of the field is PFD3
pub fn is_xtal(&self) -> bool[src]
Checks if the value of the field is XTAL
pub fn is_lvds1(&self) -> bool[src]
Checks if the value of the field is LVDS1
pub fn is_lvds2(&self) -> bool[src]
Checks if the value of the field is LVDS2
impl R<u32, Reg<u32, _MISC1>>[src]
pub fn lvds1_clk_sel(&self) -> LVDS1_CLK_SEL_R[src]
Bits 0:4 - This field selects the clk to be routed to anaclk1/1b.Not related to PMU.
pub fn lvds2_clk_sel(&self) -> LVDS2_CLK_SEL_R[src]
Bits 5:9 - This field selects the clk to be routed to anaclk2/2b.Not related to PMU.
pub fn lvdsclk1_oben(&self) -> LVDSCLK1_OBEN_R[src]
Bit 10 - This enables the LVDS output buffer for anaclk1/1b
pub fn lvdsclk2_oben(&self) -> LVDSCLK2_OBEN_R[src]
Bit 11 - This enables the LVDS output buffer for anaclk2/2b
pub fn lvdsclk1_iben(&self) -> LVDSCLK1_IBEN_R[src]
Bit 12 - This enables the LVDS input buffer for anaclk1/1b
pub fn lvdsclk2_iben(&self) -> LVDSCLK2_IBEN_R[src]
Bit 13 - This enables the LVDS input buffer for anaclk2/2b
pub fn pfd_480_autogate_en(&self) -> PFD_480_AUTOGATE_EN_R[src]
Bit 16 - This enables a feature that will clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off
pub fn pfd_528_autogate_en(&self) -> PFD_528_AUTOGATE_EN_R[src]
Bit 17 - This enables a feature that will clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off
pub fn irq_temppanic(&self) -> IRQ_TEMPPANIC_R[src]
Bit 27 - This status bit is set to one when the temperature sensor panic interrupt asserts for a panic high temperature
pub fn irq_templow(&self) -> IRQ_TEMPLOW_R[src]
Bit 28 - This status bit is set to one when the temperature sensor low interrupt asserts for low temperature
pub fn irq_temphigh(&self) -> IRQ_TEMPHIGH_R[src]
Bit 29 - This status bit is set to one when the temperature sensor high interrupt asserts for high temperature
pub fn irq_ana_bo(&self) -> IRQ_ANA_BO_R[src]
Bit 30 - This status bit is set to one when when any of the analog regulator brownout interrupts assert
pub fn irq_dig_bo(&self) -> IRQ_DIG_BO_R[src]
Bit 31 - This status bit is set to one when when any of the digital regulator brownout interrupts assert
impl R<u8, LVDS1_CLK_SEL_A>[src]
pub fn variant(&self) -> Variant<u8, LVDS1_CLK_SEL_A>[src]
Get enumerated values variant
pub fn is_arm_pll(&self) -> bool[src]
Checks if the value of the field is ARM_PLL
pub fn is_sys_pll(&self) -> bool[src]
Checks if the value of the field is SYS_PLL
pub fn is_pfd4(&self) -> bool[src]
Checks if the value of the field is PFD4
pub fn is_pfd5(&self) -> bool[src]
Checks if the value of the field is PFD5
pub fn is_pfd6(&self) -> bool[src]
Checks if the value of the field is PFD6
pub fn is_pfd7(&self) -> bool[src]
Checks if the value of the field is PFD7
pub fn is_audio_pll(&self) -> bool[src]
Checks if the value of the field is AUDIO_PLL
pub fn is_video_pll(&self) -> bool[src]
Checks if the value of the field is VIDEO_PLL
pub fn is_ethernet_ref(&self) -> bool[src]
Checks if the value of the field is ETHERNET_REF
pub fn is_usb1_pll(&self) -> bool[src]
Checks if the value of the field is USB1_PLL
pub fn is_usb2_pll(&self) -> bool[src]
Checks if the value of the field is USB2_PLL
pub fn is_pfd0(&self) -> bool[src]
Checks if the value of the field is PFD0
pub fn is_pfd1(&self) -> bool[src]
Checks if the value of the field is PFD1
pub fn is_pfd2(&self) -> bool[src]
Checks if the value of the field is PFD2
pub fn is_pfd3(&self) -> bool[src]
Checks if the value of the field is PFD3
pub fn is_xtal(&self) -> bool[src]
Checks if the value of the field is XTAL
impl R<u8, LVDS2_CLK_SEL_A>[src]
pub fn variant(&self) -> Variant<u8, LVDS2_CLK_SEL_A>[src]
Get enumerated values variant
pub fn is_arm_pll(&self) -> bool[src]
Checks if the value of the field is ARM_PLL
pub fn is_sys_pll(&self) -> bool[src]
Checks if the value of the field is SYS_PLL
pub fn is_pfd4(&self) -> bool[src]
Checks if the value of the field is PFD4
pub fn is_pfd5(&self) -> bool[src]
Checks if the value of the field is PFD5
pub fn is_pfd6(&self) -> bool[src]
Checks if the value of the field is PFD6
pub fn is_pfd7(&self) -> bool[src]
Checks if the value of the field is PFD7
pub fn is_audio_pll(&self) -> bool[src]
Checks if the value of the field is AUDIO_PLL
pub fn is_video_pll(&self) -> bool[src]
Checks if the value of the field is VIDEO_PLL
pub fn is_mlb_pll(&self) -> bool[src]
Checks if the value of the field is MLB_PLL
pub fn is_ethernet_ref(&self) -> bool[src]
Checks if the value of the field is ETHERNET_REF
pub fn is_pcie_ref(&self) -> bool[src]
Checks if the value of the field is PCIE_REF
pub fn is_sata_ref(&self) -> bool[src]
Checks if the value of the field is SATA_REF
pub fn is_usb1_pll(&self) -> bool[src]
Checks if the value of the field is USB1_PLL
pub fn is_usb2_pll(&self) -> bool[src]
Checks if the value of the field is USB2_PLL
pub fn is_pfd0(&self) -> bool[src]
Checks if the value of the field is PFD0
pub fn is_pfd1(&self) -> bool[src]
Checks if the value of the field is PFD1
pub fn is_pfd2(&self) -> bool[src]
Checks if the value of the field is PFD2
pub fn is_pfd3(&self) -> bool[src]
Checks if the value of the field is PFD3
pub fn is_xtal(&self) -> bool[src]
Checks if the value of the field is XTAL
pub fn is_lvds1(&self) -> bool[src]
Checks if the value of the field is LVDS1
pub fn is_lvds2(&self) -> bool[src]
Checks if the value of the field is LVDS2
impl R<u32, Reg<u32, _MISC1_SET>>[src]
pub fn lvds1_clk_sel(&self) -> LVDS1_CLK_SEL_R[src]
Bits 0:4 - This field selects the clk to be routed to anaclk1/1b.Not related to PMU.
pub fn lvds2_clk_sel(&self) -> LVDS2_CLK_SEL_R[src]
Bits 5:9 - This field selects the clk to be routed to anaclk2/2b.Not related to PMU.
pub fn lvdsclk1_oben(&self) -> LVDSCLK1_OBEN_R[src]
Bit 10 - This enables the LVDS output buffer for anaclk1/1b
pub fn lvdsclk2_oben(&self) -> LVDSCLK2_OBEN_R[src]
Bit 11 - This enables the LVDS output buffer for anaclk2/2b
pub fn lvdsclk1_iben(&self) -> LVDSCLK1_IBEN_R[src]
Bit 12 - This enables the LVDS input buffer for anaclk1/1b
pub fn lvdsclk2_iben(&self) -> LVDSCLK2_IBEN_R[src]
Bit 13 - This enables the LVDS input buffer for anaclk2/2b
pub fn pfd_480_autogate_en(&self) -> PFD_480_AUTOGATE_EN_R[src]
Bit 16 - This enables a feature that will clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off
pub fn pfd_528_autogate_en(&self) -> PFD_528_AUTOGATE_EN_R[src]
Bit 17 - This enables a feature that will clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off
pub fn irq_temppanic(&self) -> IRQ_TEMPPANIC_R[src]
Bit 27 - This status bit is set to one when the temperature sensor panic interrupt asserts for a panic high temperature
pub fn irq_templow(&self) -> IRQ_TEMPLOW_R[src]
Bit 28 - This status bit is set to one when the temperature sensor low interrupt asserts for low temperature
pub fn irq_temphigh(&self) -> IRQ_TEMPHIGH_R[src]
Bit 29 - This status bit is set to one when the temperature sensor high interrupt asserts for high temperature
pub fn irq_ana_bo(&self) -> IRQ_ANA_BO_R[src]
Bit 30 - This status bit is set to one when when any of the analog regulator brownout interrupts assert
pub fn irq_dig_bo(&self) -> IRQ_DIG_BO_R[src]
Bit 31 - This status bit is set to one when when any of the digital regulator brownout interrupts assert
impl R<u8, LVDS1_CLK_SEL_A>[src]
pub fn variant(&self) -> Variant<u8, LVDS1_CLK_SEL_A>[src]
Get enumerated values variant
pub fn is_arm_pll(&self) -> bool[src]
Checks if the value of the field is ARM_PLL
pub fn is_sys_pll(&self) -> bool[src]
Checks if the value of the field is SYS_PLL
pub fn is_pfd4(&self) -> bool[src]
Checks if the value of the field is PFD4
pub fn is_pfd5(&self) -> bool[src]
Checks if the value of the field is PFD5
pub fn is_pfd6(&self) -> bool[src]
Checks if the value of the field is PFD6
pub fn is_pfd7(&self) -> bool[src]
Checks if the value of the field is PFD7
pub fn is_audio_pll(&self) -> bool[src]
Checks if the value of the field is AUDIO_PLL
pub fn is_video_pll(&self) -> bool[src]
Checks if the value of the field is VIDEO_PLL
pub fn is_ethernet_ref(&self) -> bool[src]
Checks if the value of the field is ETHERNET_REF
pub fn is_usb1_pll(&self) -> bool[src]
Checks if the value of the field is USB1_PLL
pub fn is_usb2_pll(&self) -> bool[src]
Checks if the value of the field is USB2_PLL
pub fn is_pfd0(&self) -> bool[src]
Checks if the value of the field is PFD0
pub fn is_pfd1(&self) -> bool[src]
Checks if the value of the field is PFD1
pub fn is_pfd2(&self) -> bool[src]
Checks if the value of the field is PFD2
pub fn is_pfd3(&self) -> bool[src]
Checks if the value of the field is PFD3
pub fn is_xtal(&self) -> bool[src]
Checks if the value of the field is XTAL
impl R<u8, LVDS2_CLK_SEL_A>[src]
pub fn variant(&self) -> Variant<u8, LVDS2_CLK_SEL_A>[src]
Get enumerated values variant
pub fn is_arm_pll(&self) -> bool[src]
Checks if the value of the field is ARM_PLL
pub fn is_sys_pll(&self) -> bool[src]
Checks if the value of the field is SYS_PLL
pub fn is_pfd4(&self) -> bool[src]
Checks if the value of the field is PFD4
pub fn is_pfd5(&self) -> bool[src]
Checks if the value of the field is PFD5
pub fn is_pfd6(&self) -> bool[src]
Checks if the value of the field is PFD6
pub fn is_pfd7(&self) -> bool[src]
Checks if the value of the field is PFD7
pub fn is_audio_pll(&self) -> bool[src]
Checks if the value of the field is AUDIO_PLL
pub fn is_video_pll(&self) -> bool[src]
Checks if the value of the field is VIDEO_PLL
pub fn is_mlb_pll(&self) -> bool[src]
Checks if the value of the field is MLB_PLL
pub fn is_ethernet_ref(&self) -> bool[src]
Checks if the value of the field is ETHERNET_REF
pub fn is_pcie_ref(&self) -> bool[src]
Checks if the value of the field is PCIE_REF
pub fn is_sata_ref(&self) -> bool[src]
Checks if the value of the field is SATA_REF
pub fn is_usb1_pll(&self) -> bool[src]
Checks if the value of the field is USB1_PLL
pub fn is_usb2_pll(&self) -> bool[src]
Checks if the value of the field is USB2_PLL
pub fn is_pfd0(&self) -> bool[src]
Checks if the value of the field is PFD0
pub fn is_pfd1(&self) -> bool[src]
Checks if the value of the field is PFD1
pub fn is_pfd2(&self) -> bool[src]
Checks if the value of the field is PFD2
pub fn is_pfd3(&self) -> bool[src]
Checks if the value of the field is PFD3
pub fn is_xtal(&self) -> bool[src]
Checks if the value of the field is XTAL
pub fn is_lvds1(&self) -> bool[src]
Checks if the value of the field is LVDS1
pub fn is_lvds2(&self) -> bool[src]
Checks if the value of the field is LVDS2
impl R<u32, Reg<u32, _MISC1_CLR>>[src]
pub fn lvds1_clk_sel(&self) -> LVDS1_CLK_SEL_R[src]
Bits 0:4 - This field selects the clk to be routed to anaclk1/1b.Not related to PMU.
pub fn lvds2_clk_sel(&self) -> LVDS2_CLK_SEL_R[src]
Bits 5:9 - This field selects the clk to be routed to anaclk2/2b.Not related to PMU.
pub fn lvdsclk1_oben(&self) -> LVDSCLK1_OBEN_R[src]
Bit 10 - This enables the LVDS output buffer for anaclk1/1b
pub fn lvdsclk2_oben(&self) -> LVDSCLK2_OBEN_R[src]
Bit 11 - This enables the LVDS output buffer for anaclk2/2b
pub fn lvdsclk1_iben(&self) -> LVDSCLK1_IBEN_R[src]
Bit 12 - This enables the LVDS input buffer for anaclk1/1b
pub fn lvdsclk2_iben(&self) -> LVDSCLK2_IBEN_R[src]
Bit 13 - This enables the LVDS input buffer for anaclk2/2b
pub fn pfd_480_autogate_en(&self) -> PFD_480_AUTOGATE_EN_R[src]
Bit 16 - This enables a feature that will clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off
pub fn pfd_528_autogate_en(&self) -> PFD_528_AUTOGATE_EN_R[src]
Bit 17 - This enables a feature that will clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off
pub fn irq_temppanic(&self) -> IRQ_TEMPPANIC_R[src]
Bit 27 - This status bit is set to one when the temperature sensor panic interrupt asserts for a panic high temperature
pub fn irq_templow(&self) -> IRQ_TEMPLOW_R[src]
Bit 28 - This status bit is set to one when the temperature sensor low interrupt asserts for low temperature
pub fn irq_temphigh(&self) -> IRQ_TEMPHIGH_R[src]
Bit 29 - This status bit is set to one when the temperature sensor high interrupt asserts for high temperature
pub fn irq_ana_bo(&self) -> IRQ_ANA_BO_R[src]
Bit 30 - This status bit is set to one when when any of the analog regulator brownout interrupts assert
pub fn irq_dig_bo(&self) -> IRQ_DIG_BO_R[src]
Bit 31 - This status bit is set to one when when any of the digital regulator brownout interrupts assert
impl R<u8, LVDS1_CLK_SEL_A>[src]
pub fn variant(&self) -> Variant<u8, LVDS1_CLK_SEL_A>[src]
Get enumerated values variant
pub fn is_arm_pll(&self) -> bool[src]
Checks if the value of the field is ARM_PLL
pub fn is_sys_pll(&self) -> bool[src]
Checks if the value of the field is SYS_PLL
pub fn is_pfd4(&self) -> bool[src]
Checks if the value of the field is PFD4
pub fn is_pfd5(&self) -> bool[src]
Checks if the value of the field is PFD5
pub fn is_pfd6(&self) -> bool[src]
Checks if the value of the field is PFD6
pub fn is_pfd7(&self) -> bool[src]
Checks if the value of the field is PFD7
pub fn is_audio_pll(&self) -> bool[src]
Checks if the value of the field is AUDIO_PLL
pub fn is_video_pll(&self) -> bool[src]
Checks if the value of the field is VIDEO_PLL
pub fn is_ethernet_ref(&self) -> bool[src]
Checks if the value of the field is ETHERNET_REF
pub fn is_usb1_pll(&self) -> bool[src]
Checks if the value of the field is USB1_PLL
pub fn is_usb2_pll(&self) -> bool[src]
Checks if the value of the field is USB2_PLL
pub fn is_pfd0(&self) -> bool[src]
Checks if the value of the field is PFD0
pub fn is_pfd1(&self) -> bool[src]
Checks if the value of the field is PFD1
pub fn is_pfd2(&self) -> bool[src]
Checks if the value of the field is PFD2
pub fn is_pfd3(&self) -> bool[src]
Checks if the value of the field is PFD3
pub fn is_xtal(&self) -> bool[src]
Checks if the value of the field is XTAL
impl R<u8, LVDS2_CLK_SEL_A>[src]
pub fn variant(&self) -> Variant<u8, LVDS2_CLK_SEL_A>[src]
Get enumerated values variant
pub fn is_arm_pll(&self) -> bool[src]
Checks if the value of the field is ARM_PLL
pub fn is_sys_pll(&self) -> bool[src]
Checks if the value of the field is SYS_PLL
pub fn is_pfd4(&self) -> bool[src]
Checks if the value of the field is PFD4
pub fn is_pfd5(&self) -> bool[src]
Checks if the value of the field is PFD5
pub fn is_pfd6(&self) -> bool[src]
Checks if the value of the field is PFD6
pub fn is_pfd7(&self) -> bool[src]
Checks if the value of the field is PFD7
pub fn is_audio_pll(&self) -> bool[src]
Checks if the value of the field is AUDIO_PLL
pub fn is_video_pll(&self) -> bool[src]
Checks if the value of the field is VIDEO_PLL
pub fn is_mlb_pll(&self) -> bool[src]
Checks if the value of the field is MLB_PLL
pub fn is_ethernet_ref(&self) -> bool[src]
Checks if the value of the field is ETHERNET_REF
pub fn is_pcie_ref(&self) -> bool[src]
Checks if the value of the field is PCIE_REF
pub fn is_sata_ref(&self) -> bool[src]
Checks if the value of the field is SATA_REF
pub fn is_usb1_pll(&self) -> bool[src]
Checks if the value of the field is USB1_PLL
pub fn is_usb2_pll(&self) -> bool[src]
Checks if the value of the field is USB2_PLL
pub fn is_pfd0(&self) -> bool[src]
Checks if the value of the field is PFD0
pub fn is_pfd1(&self) -> bool[src]
Checks if the value of the field is PFD1
pub fn is_pfd2(&self) -> bool[src]
Checks if the value of the field is PFD2
pub fn is_pfd3(&self) -> bool[src]
Checks if the value of the field is PFD3
pub fn is_xtal(&self) -> bool[src]
Checks if the value of the field is XTAL
pub fn is_lvds1(&self) -> bool[src]
Checks if the value of the field is LVDS1
pub fn is_lvds2(&self) -> bool[src]
Checks if the value of the field is LVDS2
impl R<u32, Reg<u32, _MISC1_TOG>>[src]
pub fn lvds1_clk_sel(&self) -> LVDS1_CLK_SEL_R[src]
Bits 0:4 - This field selects the clk to be routed to anaclk1/1b.Not related to PMU.
pub fn lvds2_clk_sel(&self) -> LVDS2_CLK_SEL_R[src]
Bits 5:9 - This field selects the clk to be routed to anaclk2/2b.Not related to PMU.
pub fn lvdsclk1_oben(&self) -> LVDSCLK1_OBEN_R[src]
Bit 10 - This enables the LVDS output buffer for anaclk1/1b
pub fn lvdsclk2_oben(&self) -> LVDSCLK2_OBEN_R[src]
Bit 11 - This enables the LVDS output buffer for anaclk2/2b
pub fn lvdsclk1_iben(&self) -> LVDSCLK1_IBEN_R[src]
Bit 12 - This enables the LVDS input buffer for anaclk1/1b
pub fn lvdsclk2_iben(&self) -> LVDSCLK2_IBEN_R[src]
Bit 13 - This enables the LVDS input buffer for anaclk2/2b
pub fn pfd_480_autogate_en(&self) -> PFD_480_AUTOGATE_EN_R[src]
Bit 16 - This enables a feature that will clkgate (reset) all PFD_480 clocks anytime the USB1_PLL_480 is unlocked or powered off
pub fn pfd_528_autogate_en(&self) -> PFD_528_AUTOGATE_EN_R[src]
Bit 17 - This enables a feature that will clkgate (reset) all PFD_528 clocks anytime the PLL_528 is unlocked or powered off
pub fn irq_temppanic(&self) -> IRQ_TEMPPANIC_R[src]
Bit 27 - This status bit is set to one when the temperature sensor panic interrupt asserts for a panic high temperature
pub fn irq_templow(&self) -> IRQ_TEMPLOW_R[src]
Bit 28 - This status bit is set to one when the temperature sensor low interrupt asserts for low temperature
pub fn irq_temphigh(&self) -> IRQ_TEMPHIGH_R[src]
Bit 29 - This status bit is set to one when the temperature sensor high interrupt asserts for high temperature
pub fn irq_ana_bo(&self) -> IRQ_ANA_BO_R[src]
Bit 30 - This status bit is set to one when when any of the analog regulator brownout interrupts assert
pub fn irq_dig_bo(&self) -> IRQ_DIG_BO_R[src]
Bit 31 - This status bit is set to one when when any of the digital regulator brownout interrupts assert
impl R<u8, REG0_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG0_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg0_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG0_BO_OFFSET_4
pub fn is_reg0_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG0_BO_OFFSET_7
impl R<bool, REG0_BO_STATUS_A>[src]
pub fn variant(&self) -> Variant<bool, REG0_BO_STATUS_A>[src]
Get enumerated values variant
pub fn is_reg0_bo_status_1(&self) -> bool[src]
Checks if the value of the field is REG0_BO_STATUS_1
impl R<u8, REG1_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG1_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg1_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG1_BO_OFFSET_4
pub fn is_reg1_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG1_BO_OFFSET_7
impl R<bool, REG1_BO_STATUS_A>[src]
pub fn variant(&self) -> Variant<bool, REG1_BO_STATUS_A>[src]
Get enumerated values variant
pub fn is_reg1_bo_status_1(&self) -> bool[src]
Checks if the value of the field is REG1_BO_STATUS_1
impl R<bool, AUDIO_DIV_LSB_A>[src]
pub fn variant(&self) -> AUDIO_DIV_LSB_A[src]
Get enumerated values variant
pub fn is_audio_div_lsb_0(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_LSB_0
pub fn is_audio_div_lsb_1(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_LSB_1
impl R<u8, REG2_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG2_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg2_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG2_BO_OFFSET_4
pub fn is_reg2_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG2_BO_OFFSET_7
impl R<bool, AUDIO_DIV_MSB_A>[src]
pub fn variant(&self) -> AUDIO_DIV_MSB_A[src]
Get enumerated values variant
pub fn is_audio_div_msb_0(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_MSB_0
pub fn is_audio_div_msb_1(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_MSB_1
impl R<u8, REG0_STEP_TIME_A>[src]
pub fn variant(&self) -> REG0_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, REG1_STEP_TIME_A>[src]
pub fn variant(&self) -> REG1_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, REG2_STEP_TIME_A>[src]
pub fn variant(&self) -> REG2_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, VIDEO_DIV_A>[src]
pub fn variant(&self) -> VIDEO_DIV_A[src]
Get enumerated values variant
pub fn is_video_div_0(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_0
pub fn is_video_div_1(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_1
pub fn is_video_div_2(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_2
pub fn is_video_div_3(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_3
impl R<u32, Reg<u32, _MISC2>>[src]
pub fn reg0_bo_offset(&self) -> REG0_BO_OFFSET_R[src]
Bits 0:2 - This field defines the brown out voltage offset for the CORE power domain
pub fn reg0_bo_status(&self) -> REG0_BO_STATUS_R[src]
Bit 3 - Reg0 brownout status bit.
pub fn reg0_enable_bo(&self) -> REG0_ENABLE_BO_R[src]
Bit 5 - Enables the brownout detection.
pub fn pll3_disable(&self) -> PLL3_DISABLE_R[src]
Bit 7 - Default value of "0"
pub fn reg1_bo_offset(&self) -> REG1_BO_OFFSET_R[src]
Bits 8:10 - This field defines the brown out voltage offset for the xPU power domain
pub fn reg1_bo_status(&self) -> REG1_BO_STATUS_R[src]
Bit 11 - Reg1 brownout status bit.
pub fn reg1_enable_bo(&self) -> REG1_ENABLE_BO_R[src]
Bit 13 - Enables the brownout detection.
pub fn audio_div_lsb(&self) -> AUDIO_DIV_LSB_R[src]
Bit 15 - LSB of Post-divider for Audio PLL
pub fn reg2_bo_offset(&self) -> REG2_BO_OFFSET_R[src]
Bits 16:18 - This field defines the brown out voltage offset for the xPU power domain
pub fn reg2_bo_status(&self) -> REG2_BO_STATUS_R[src]
Bit 19 - Reg2 brownout status bit.
pub fn reg2_enable_bo(&self) -> REG2_ENABLE_BO_R[src]
Bit 21 - Enables the brownout detection.
pub fn reg2_ok(&self) -> REG2_OK_R[src]
Bit 22 - Signals that the voltage is above the brownout level for the SOC supply
pub fn audio_div_msb(&self) -> AUDIO_DIV_MSB_R[src]
Bit 23 - MSB of Post-divider for Audio PLL
pub fn reg0_step_time(&self) -> REG0_STEP_TIME_R[src]
Bits 24:25 - Number of clock periods (24MHz clock).
pub fn reg1_step_time(&self) -> REG1_STEP_TIME_R[src]
Bits 26:27 - Number of clock periods (24MHz clock).
pub fn reg2_step_time(&self) -> REG2_STEP_TIME_R[src]
Bits 28:29 - Number of clock periods (24MHz clock).
pub fn video_div(&self) -> VIDEO_DIV_R[src]
Bits 30:31 - Post-divider for video
impl R<u8, REG0_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG0_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg0_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG0_BO_OFFSET_4
pub fn is_reg0_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG0_BO_OFFSET_7
impl R<bool, REG0_BO_STATUS_A>[src]
pub fn variant(&self) -> Variant<bool, REG0_BO_STATUS_A>[src]
Get enumerated values variant
pub fn is_reg0_bo_status_1(&self) -> bool[src]
Checks if the value of the field is REG0_BO_STATUS_1
impl R<u8, REG1_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG1_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg1_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG1_BO_OFFSET_4
pub fn is_reg1_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG1_BO_OFFSET_7
impl R<bool, REG1_BO_STATUS_A>[src]
pub fn variant(&self) -> Variant<bool, REG1_BO_STATUS_A>[src]
Get enumerated values variant
pub fn is_reg1_bo_status_1(&self) -> bool[src]
Checks if the value of the field is REG1_BO_STATUS_1
impl R<bool, AUDIO_DIV_LSB_A>[src]
pub fn variant(&self) -> AUDIO_DIV_LSB_A[src]
Get enumerated values variant
pub fn is_audio_div_lsb_0(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_LSB_0
pub fn is_audio_div_lsb_1(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_LSB_1
impl R<u8, REG2_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG2_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg2_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG2_BO_OFFSET_4
pub fn is_reg2_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG2_BO_OFFSET_7
impl R<bool, AUDIO_DIV_MSB_A>[src]
pub fn variant(&self) -> AUDIO_DIV_MSB_A[src]
Get enumerated values variant
pub fn is_audio_div_msb_0(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_MSB_0
pub fn is_audio_div_msb_1(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_MSB_1
impl R<u8, REG0_STEP_TIME_A>[src]
pub fn variant(&self) -> REG0_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, REG1_STEP_TIME_A>[src]
pub fn variant(&self) -> REG1_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, REG2_STEP_TIME_A>[src]
pub fn variant(&self) -> REG2_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, VIDEO_DIV_A>[src]
pub fn variant(&self) -> VIDEO_DIV_A[src]
Get enumerated values variant
pub fn is_video_div_0(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_0
pub fn is_video_div_1(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_1
pub fn is_video_div_2(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_2
pub fn is_video_div_3(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_3
impl R<u32, Reg<u32, _MISC2_SET>>[src]
pub fn reg0_bo_offset(&self) -> REG0_BO_OFFSET_R[src]
Bits 0:2 - This field defines the brown out voltage offset for the CORE power domain
pub fn reg0_bo_status(&self) -> REG0_BO_STATUS_R[src]
Bit 3 - Reg0 brownout status bit.
pub fn reg0_enable_bo(&self) -> REG0_ENABLE_BO_R[src]
Bit 5 - Enables the brownout detection.
pub fn pll3_disable(&self) -> PLL3_DISABLE_R[src]
Bit 7 - Default value of "0"
pub fn reg1_bo_offset(&self) -> REG1_BO_OFFSET_R[src]
Bits 8:10 - This field defines the brown out voltage offset for the xPU power domain
pub fn reg1_bo_status(&self) -> REG1_BO_STATUS_R[src]
Bit 11 - Reg1 brownout status bit.
pub fn reg1_enable_bo(&self) -> REG1_ENABLE_BO_R[src]
Bit 13 - Enables the brownout detection.
pub fn audio_div_lsb(&self) -> AUDIO_DIV_LSB_R[src]
Bit 15 - LSB of Post-divider for Audio PLL
pub fn reg2_bo_offset(&self) -> REG2_BO_OFFSET_R[src]
Bits 16:18 - This field defines the brown out voltage offset for the xPU power domain
pub fn reg2_bo_status(&self) -> REG2_BO_STATUS_R[src]
Bit 19 - Reg2 brownout status bit.
pub fn reg2_enable_bo(&self) -> REG2_ENABLE_BO_R[src]
Bit 21 - Enables the brownout detection.
pub fn reg2_ok(&self) -> REG2_OK_R[src]
Bit 22 - Signals that the voltage is above the brownout level for the SOC supply
pub fn audio_div_msb(&self) -> AUDIO_DIV_MSB_R[src]
Bit 23 - MSB of Post-divider for Audio PLL
pub fn reg0_step_time(&self) -> REG0_STEP_TIME_R[src]
Bits 24:25 - Number of clock periods (24MHz clock).
pub fn reg1_step_time(&self) -> REG1_STEP_TIME_R[src]
Bits 26:27 - Number of clock periods (24MHz clock).
pub fn reg2_step_time(&self) -> REG2_STEP_TIME_R[src]
Bits 28:29 - Number of clock periods (24MHz clock).
pub fn video_div(&self) -> VIDEO_DIV_R[src]
Bits 30:31 - Post-divider for video
impl R<u8, REG0_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG0_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg0_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG0_BO_OFFSET_4
pub fn is_reg0_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG0_BO_OFFSET_7
impl R<bool, REG0_BO_STATUS_A>[src]
pub fn variant(&self) -> Variant<bool, REG0_BO_STATUS_A>[src]
Get enumerated values variant
pub fn is_reg0_bo_status_1(&self) -> bool[src]
Checks if the value of the field is REG0_BO_STATUS_1
impl R<u8, REG1_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG1_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg1_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG1_BO_OFFSET_4
pub fn is_reg1_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG1_BO_OFFSET_7
impl R<bool, REG1_BO_STATUS_A>[src]
pub fn variant(&self) -> Variant<bool, REG1_BO_STATUS_A>[src]
Get enumerated values variant
pub fn is_reg1_bo_status_1(&self) -> bool[src]
Checks if the value of the field is REG1_BO_STATUS_1
impl R<bool, AUDIO_DIV_LSB_A>[src]
pub fn variant(&self) -> AUDIO_DIV_LSB_A[src]
Get enumerated values variant
pub fn is_audio_div_lsb_0(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_LSB_0
pub fn is_audio_div_lsb_1(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_LSB_1
impl R<u8, REG2_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG2_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg2_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG2_BO_OFFSET_4
pub fn is_reg2_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG2_BO_OFFSET_7
impl R<bool, AUDIO_DIV_MSB_A>[src]
pub fn variant(&self) -> AUDIO_DIV_MSB_A[src]
Get enumerated values variant
pub fn is_audio_div_msb_0(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_MSB_0
pub fn is_audio_div_msb_1(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_MSB_1
impl R<u8, REG0_STEP_TIME_A>[src]
pub fn variant(&self) -> REG0_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, REG1_STEP_TIME_A>[src]
pub fn variant(&self) -> REG1_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, REG2_STEP_TIME_A>[src]
pub fn variant(&self) -> REG2_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, VIDEO_DIV_A>[src]
pub fn variant(&self) -> VIDEO_DIV_A[src]
Get enumerated values variant
pub fn is_video_div_0(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_0
pub fn is_video_div_1(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_1
pub fn is_video_div_2(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_2
pub fn is_video_div_3(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_3
impl R<u32, Reg<u32, _MISC2_CLR>>[src]
pub fn reg0_bo_offset(&self) -> REG0_BO_OFFSET_R[src]
Bits 0:2 - This field defines the brown out voltage offset for the CORE power domain
pub fn reg0_bo_status(&self) -> REG0_BO_STATUS_R[src]
Bit 3 - Reg0 brownout status bit.
pub fn reg0_enable_bo(&self) -> REG0_ENABLE_BO_R[src]
Bit 5 - Enables the brownout detection.
pub fn pll3_disable(&self) -> PLL3_DISABLE_R[src]
Bit 7 - Default value of "0"
pub fn reg1_bo_offset(&self) -> REG1_BO_OFFSET_R[src]
Bits 8:10 - This field defines the brown out voltage offset for the xPU power domain
pub fn reg1_bo_status(&self) -> REG1_BO_STATUS_R[src]
Bit 11 - Reg1 brownout status bit.
pub fn reg1_enable_bo(&self) -> REG1_ENABLE_BO_R[src]
Bit 13 - Enables the brownout detection.
pub fn audio_div_lsb(&self) -> AUDIO_DIV_LSB_R[src]
Bit 15 - LSB of Post-divider for Audio PLL
pub fn reg2_bo_offset(&self) -> REG2_BO_OFFSET_R[src]
Bits 16:18 - This field defines the brown out voltage offset for the xPU power domain
pub fn reg2_bo_status(&self) -> REG2_BO_STATUS_R[src]
Bit 19 - Reg2 brownout status bit.
pub fn reg2_enable_bo(&self) -> REG2_ENABLE_BO_R[src]
Bit 21 - Enables the brownout detection.
pub fn reg2_ok(&self) -> REG2_OK_R[src]
Bit 22 - Signals that the voltage is above the brownout level for the SOC supply
pub fn audio_div_msb(&self) -> AUDIO_DIV_MSB_R[src]
Bit 23 - MSB of Post-divider for Audio PLL
pub fn reg0_step_time(&self) -> REG0_STEP_TIME_R[src]
Bits 24:25 - Number of clock periods (24MHz clock).
pub fn reg1_step_time(&self) -> REG1_STEP_TIME_R[src]
Bits 26:27 - Number of clock periods (24MHz clock).
pub fn reg2_step_time(&self) -> REG2_STEP_TIME_R[src]
Bits 28:29 - Number of clock periods (24MHz clock).
pub fn video_div(&self) -> VIDEO_DIV_R[src]
Bits 30:31 - Post-divider for video
impl R<u8, REG0_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG0_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg0_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG0_BO_OFFSET_4
pub fn is_reg0_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG0_BO_OFFSET_7
impl R<bool, REG0_BO_STATUS_A>[src]
pub fn variant(&self) -> Variant<bool, REG0_BO_STATUS_A>[src]
Get enumerated values variant
pub fn is_reg0_bo_status_1(&self) -> bool[src]
Checks if the value of the field is REG0_BO_STATUS_1
impl R<u8, REG1_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG1_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg1_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG1_BO_OFFSET_4
pub fn is_reg1_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG1_BO_OFFSET_7
impl R<bool, REG1_BO_STATUS_A>[src]
pub fn variant(&self) -> Variant<bool, REG1_BO_STATUS_A>[src]
Get enumerated values variant
pub fn is_reg1_bo_status_1(&self) -> bool[src]
Checks if the value of the field is REG1_BO_STATUS_1
impl R<bool, AUDIO_DIV_LSB_A>[src]
pub fn variant(&self) -> AUDIO_DIV_LSB_A[src]
Get enumerated values variant
pub fn is_audio_div_lsb_0(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_LSB_0
pub fn is_audio_div_lsb_1(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_LSB_1
impl R<u8, REG2_BO_OFFSET_A>[src]
pub fn variant(&self) -> Variant<u8, REG2_BO_OFFSET_A>[src]
Get enumerated values variant
pub fn is_reg2_bo_offset_4(&self) -> bool[src]
Checks if the value of the field is REG2_BO_OFFSET_4
pub fn is_reg2_bo_offset_7(&self) -> bool[src]
Checks if the value of the field is REG2_BO_OFFSET_7
impl R<bool, AUDIO_DIV_MSB_A>[src]
pub fn variant(&self) -> AUDIO_DIV_MSB_A[src]
Get enumerated values variant
pub fn is_audio_div_msb_0(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_MSB_0
pub fn is_audio_div_msb_1(&self) -> bool[src]
Checks if the value of the field is AUDIO_DIV_MSB_1
impl R<u8, REG0_STEP_TIME_A>[src]
pub fn variant(&self) -> REG0_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, REG1_STEP_TIME_A>[src]
pub fn variant(&self) -> REG1_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, REG2_STEP_TIME_A>[src]
pub fn variant(&self) -> REG2_STEP_TIME_A[src]
Get enumerated values variant
pub fn is_64_clocks(&self) -> bool[src]
Checks if the value of the field is _64_CLOCKS
pub fn is_128_clocks(&self) -> bool[src]
Checks if the value of the field is _128_CLOCKS
pub fn is_256_clocks(&self) -> bool[src]
Checks if the value of the field is _256_CLOCKS
pub fn is_512_clocks(&self) -> bool[src]
Checks if the value of the field is _512_CLOCKS
impl R<u8, VIDEO_DIV_A>[src]
pub fn variant(&self) -> VIDEO_DIV_A[src]
Get enumerated values variant
pub fn is_video_div_0(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_0
pub fn is_video_div_1(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_1
pub fn is_video_div_2(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_2
pub fn is_video_div_3(&self) -> bool[src]
Checks if the value of the field is VIDEO_DIV_3
impl R<u32, Reg<u32, _MISC2_TOG>>[src]
pub fn reg0_bo_offset(&self) -> REG0_BO_OFFSET_R[src]
Bits 0:2 - This field defines the brown out voltage offset for the CORE power domain
pub fn reg0_bo_status(&self) -> REG0_BO_STATUS_R[src]
Bit 3 - Reg0 brownout status bit.
pub fn reg0_enable_bo(&self) -> REG0_ENABLE_BO_R[src]
Bit 5 - Enables the brownout detection.
pub fn pll3_disable(&self) -> PLL3_DISABLE_R[src]
Bit 7 - Default value of "0"
pub fn reg1_bo_offset(&self) -> REG1_BO_OFFSET_R[src]
Bits 8:10 - This field defines the brown out voltage offset for the xPU power domain
pub fn reg1_bo_status(&self) -> REG1_BO_STATUS_R[src]
Bit 11 - Reg1 brownout status bit.
pub fn reg1_enable_bo(&self) -> REG1_ENABLE_BO_R[src]
Bit 13 - Enables the brownout detection.
pub fn audio_div_lsb(&self) -> AUDIO_DIV_LSB_R[src]
Bit 15 - LSB of Post-divider for Audio PLL
pub fn reg2_bo_offset(&self) -> REG2_BO_OFFSET_R[src]
Bits 16:18 - This field defines the brown out voltage offset for the xPU power domain
pub fn reg2_bo_status(&self) -> REG2_BO_STATUS_R[src]
Bit 19 - Reg2 brownout status bit.
pub fn reg2_enable_bo(&self) -> REG2_ENABLE_BO_R[src]
Bit 21 - Enables the brownout detection.
pub fn reg2_ok(&self) -> REG2_OK_R[src]
Bit 22 - Signals that the voltage is above the brownout level for the SOC supply
pub fn audio_div_msb(&self) -> AUDIO_DIV_MSB_R[src]
Bit 23 - MSB of Post-divider for Audio PLL
pub fn reg0_step_time(&self) -> REG0_STEP_TIME_R[src]
Bits 24:25 - Number of clock periods (24MHz clock).
pub fn reg1_step_time(&self) -> REG1_STEP_TIME_R[src]
Bits 26:27 - Number of clock periods (24MHz clock).
pub fn reg2_step_time(&self) -> REG2_STEP_TIME_R[src]
Bits 28:29 - Number of clock periods (24MHz clock).
pub fn video_div(&self) -> VIDEO_DIV_R[src]
Bits 30:31 - Post-divider for video
Trait Implementations
Auto Trait Implementations
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T: Send,
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T: 'static + ?Sized, [src]
T: 'static + ?Sized,
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T: ?Sized, [src]
T: ?Sized,
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T: ?Sized, [src]
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