Struct imxrt1062_iomuxc::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub sw_mux_ctl_pad_gpio_emc_00: SW_MUX_CTL_PAD_GPIO_EMC_00,
    pub sw_mux_ctl_pad_gpio_emc_01: SW_MUX_CTL_PAD_GPIO_EMC_01,
    pub sw_mux_ctl_pad_gpio_emc_02: SW_MUX_CTL_PAD_GPIO_EMC_02,
    pub sw_mux_ctl_pad_gpio_emc_03: SW_MUX_CTL_PAD_GPIO_EMC_03,
    pub sw_mux_ctl_pad_gpio_emc_04: SW_MUX_CTL_PAD_GPIO_EMC_04,
    pub sw_mux_ctl_pad_gpio_emc_05: SW_MUX_CTL_PAD_GPIO_EMC_05,
    pub sw_mux_ctl_pad_gpio_emc_06: SW_MUX_CTL_PAD_GPIO_EMC_06,
    pub sw_mux_ctl_pad_gpio_emc_07: SW_MUX_CTL_PAD_GPIO_EMC_07,
    pub sw_mux_ctl_pad_gpio_emc_08: SW_MUX_CTL_PAD_GPIO_EMC_08,
    pub sw_mux_ctl_pad_gpio_emc_09: SW_MUX_CTL_PAD_GPIO_EMC_09,
    pub sw_mux_ctl_pad_gpio_emc_10: SW_MUX_CTL_PAD_GPIO_EMC_10,
    pub sw_mux_ctl_pad_gpio_emc_11: SW_MUX_CTL_PAD_GPIO_EMC_11,
    pub sw_mux_ctl_pad_gpio_emc_12: SW_MUX_CTL_PAD_GPIO_EMC_12,
    pub sw_mux_ctl_pad_gpio_emc_13: SW_MUX_CTL_PAD_GPIO_EMC_13,
    pub sw_mux_ctl_pad_gpio_emc_14: SW_MUX_CTL_PAD_GPIO_EMC_14,
    pub sw_mux_ctl_pad_gpio_emc_15: SW_MUX_CTL_PAD_GPIO_EMC_15,
    pub sw_mux_ctl_pad_gpio_emc_16: SW_MUX_CTL_PAD_GPIO_EMC_16,
    pub sw_mux_ctl_pad_gpio_emc_17: SW_MUX_CTL_PAD_GPIO_EMC_17,
    pub sw_mux_ctl_pad_gpio_emc_18: SW_MUX_CTL_PAD_GPIO_EMC_18,
    pub sw_mux_ctl_pad_gpio_emc_19: SW_MUX_CTL_PAD_GPIO_EMC_19,
    pub sw_mux_ctl_pad_gpio_emc_20: SW_MUX_CTL_PAD_GPIO_EMC_20,
    pub sw_mux_ctl_pad_gpio_emc_21: SW_MUX_CTL_PAD_GPIO_EMC_21,
    pub sw_mux_ctl_pad_gpio_emc_22: SW_MUX_CTL_PAD_GPIO_EMC_22,
    pub sw_mux_ctl_pad_gpio_emc_23: SW_MUX_CTL_PAD_GPIO_EMC_23,
    pub sw_mux_ctl_pad_gpio_emc_24: SW_MUX_CTL_PAD_GPIO_EMC_24,
    pub sw_mux_ctl_pad_gpio_emc_25: SW_MUX_CTL_PAD_GPIO_EMC_25,
    pub sw_mux_ctl_pad_gpio_emc_26: SW_MUX_CTL_PAD_GPIO_EMC_26,
    pub sw_mux_ctl_pad_gpio_emc_27: SW_MUX_CTL_PAD_GPIO_EMC_27,
    pub sw_mux_ctl_pad_gpio_emc_28: SW_MUX_CTL_PAD_GPIO_EMC_28,
    pub sw_mux_ctl_pad_gpio_emc_29: SW_MUX_CTL_PAD_GPIO_EMC_29,
    pub sw_mux_ctl_pad_gpio_emc_30: SW_MUX_CTL_PAD_GPIO_EMC_30,
    pub sw_mux_ctl_pad_gpio_emc_31: SW_MUX_CTL_PAD_GPIO_EMC_31,
    pub sw_mux_ctl_pad_gpio_emc_32: SW_MUX_CTL_PAD_GPIO_EMC_32,
    pub sw_mux_ctl_pad_gpio_emc_33: SW_MUX_CTL_PAD_GPIO_EMC_33,
    pub sw_mux_ctl_pad_gpio_emc_34: SW_MUX_CTL_PAD_GPIO_EMC_34,
    pub sw_mux_ctl_pad_gpio_emc_35: SW_MUX_CTL_PAD_GPIO_EMC_35,
    pub sw_mux_ctl_pad_gpio_emc_36: SW_MUX_CTL_PAD_GPIO_EMC_36,
    pub sw_mux_ctl_pad_gpio_emc_37: SW_MUX_CTL_PAD_GPIO_EMC_37,
    pub sw_mux_ctl_pad_gpio_emc_38: SW_MUX_CTL_PAD_GPIO_EMC_38,
    pub sw_mux_ctl_pad_gpio_emc_39: SW_MUX_CTL_PAD_GPIO_EMC_39,
    pub sw_mux_ctl_pad_gpio_emc_40: SW_MUX_CTL_PAD_GPIO_EMC_40,
    pub sw_mux_ctl_pad_gpio_emc_41: SW_MUX_CTL_PAD_GPIO_EMC_41,
    pub sw_mux_ctl_pad_gpio_ad_b0_00: SW_MUX_CTL_PAD_GPIO_AD_B0_00,
    pub sw_mux_ctl_pad_gpio_ad_b0_01: SW_MUX_CTL_PAD_GPIO_AD_B0_01,
    pub sw_mux_ctl_pad_gpio_ad_b0_02: SW_MUX_CTL_PAD_GPIO_AD_B0_02,
    pub sw_mux_ctl_pad_gpio_ad_b0_03: SW_MUX_CTL_PAD_GPIO_AD_B0_03,
    pub sw_mux_ctl_pad_gpio_ad_b0_04: SW_MUX_CTL_PAD_GPIO_AD_B0_04,
    pub sw_mux_ctl_pad_gpio_ad_b0_05: SW_MUX_CTL_PAD_GPIO_AD_B0_05,
    pub sw_mux_ctl_pad_gpio_ad_b0_06: SW_MUX_CTL_PAD_GPIO_AD_B0_06,
    pub sw_mux_ctl_pad_gpio_ad_b0_07: SW_MUX_CTL_PAD_GPIO_AD_B0_07,
    pub sw_mux_ctl_pad_gpio_ad_b0_08: SW_MUX_CTL_PAD_GPIO_AD_B0_08,
    pub sw_mux_ctl_pad_gpio_ad_b0_09: SW_MUX_CTL_PAD_GPIO_AD_B0_09,
    pub sw_mux_ctl_pad_gpio_ad_b0_10: SW_MUX_CTL_PAD_GPIO_AD_B0_10,
    pub sw_mux_ctl_pad_gpio_ad_b0_11: SW_MUX_CTL_PAD_GPIO_AD_B0_11,
    pub sw_mux_ctl_pad_gpio_ad_b0_12: SW_MUX_CTL_PAD_GPIO_AD_B0_12,
    pub sw_mux_ctl_pad_gpio_ad_b0_13: SW_MUX_CTL_PAD_GPIO_AD_B0_13,
    pub sw_mux_ctl_pad_gpio_ad_b0_14: SW_MUX_CTL_PAD_GPIO_AD_B0_14,
    pub sw_mux_ctl_pad_gpio_ad_b0_15: SW_MUX_CTL_PAD_GPIO_AD_B0_15,
    pub sw_mux_ctl_pad_gpio_ad_b1_00: SW_MUX_CTL_PAD_GPIO_AD_B1_00,
    pub sw_mux_ctl_pad_gpio_ad_b1_01: SW_MUX_CTL_PAD_GPIO_AD_B1_01,
    pub sw_mux_ctl_pad_gpio_ad_b1_02: SW_MUX_CTL_PAD_GPIO_AD_B1_02,
    pub sw_mux_ctl_pad_gpio_ad_b1_03: SW_MUX_CTL_PAD_GPIO_AD_B1_03,
    pub sw_mux_ctl_pad_gpio_ad_b1_04: SW_MUX_CTL_PAD_GPIO_AD_B1_04,
    pub sw_mux_ctl_pad_gpio_ad_b1_05: SW_MUX_CTL_PAD_GPIO_AD_B1_05,
    pub sw_mux_ctl_pad_gpio_ad_b1_06: SW_MUX_CTL_PAD_GPIO_AD_B1_06,
    pub sw_mux_ctl_pad_gpio_ad_b1_07: SW_MUX_CTL_PAD_GPIO_AD_B1_07,
    pub sw_mux_ctl_pad_gpio_ad_b1_08: SW_MUX_CTL_PAD_GPIO_AD_B1_08,
    pub sw_mux_ctl_pad_gpio_ad_b1_09: SW_MUX_CTL_PAD_GPIO_AD_B1_09,
    pub sw_mux_ctl_pad_gpio_ad_b1_10: SW_MUX_CTL_PAD_GPIO_AD_B1_10,
    pub sw_mux_ctl_pad_gpio_ad_b1_11: SW_MUX_CTL_PAD_GPIO_AD_B1_11,
    pub sw_mux_ctl_pad_gpio_ad_b1_12: SW_MUX_CTL_PAD_GPIO_AD_B1_12,
    pub sw_mux_ctl_pad_gpio_ad_b1_13: SW_MUX_CTL_PAD_GPIO_AD_B1_13,
    pub sw_mux_ctl_pad_gpio_ad_b1_14: SW_MUX_CTL_PAD_GPIO_AD_B1_14,
    pub sw_mux_ctl_pad_gpio_ad_b1_15: SW_MUX_CTL_PAD_GPIO_AD_B1_15,
    pub sw_mux_ctl_pad_gpio_b0_00: SW_MUX_CTL_PAD_GPIO_B0_00,
    pub sw_mux_ctl_pad_gpio_b0_01: SW_MUX_CTL_PAD_GPIO_B0_01,
    pub sw_mux_ctl_pad_gpio_b0_02: SW_MUX_CTL_PAD_GPIO_B0_02,
    pub sw_mux_ctl_pad_gpio_b0_03: SW_MUX_CTL_PAD_GPIO_B0_03,
    pub sw_mux_ctl_pad_gpio_b0_04: SW_MUX_CTL_PAD_GPIO_B0_04,
    pub sw_mux_ctl_pad_gpio_b0_05: SW_MUX_CTL_PAD_GPIO_B0_05,
    pub sw_mux_ctl_pad_gpio_b0_06: SW_MUX_CTL_PAD_GPIO_B0_06,
    pub sw_mux_ctl_pad_gpio_b0_07: SW_MUX_CTL_PAD_GPIO_B0_07,
    pub sw_mux_ctl_pad_gpio_b0_08: SW_MUX_CTL_PAD_GPIO_B0_08,
    pub sw_mux_ctl_pad_gpio_b0_09: SW_MUX_CTL_PAD_GPIO_B0_09,
    pub sw_mux_ctl_pad_gpio_b0_10: SW_MUX_CTL_PAD_GPIO_B0_10,
    pub sw_mux_ctl_pad_gpio_b0_11: SW_MUX_CTL_PAD_GPIO_B0_11,
    pub sw_mux_ctl_pad_gpio_b0_12: SW_MUX_CTL_PAD_GPIO_B0_12,
    pub sw_mux_ctl_pad_gpio_b0_13: SW_MUX_CTL_PAD_GPIO_B0_13,
    pub sw_mux_ctl_pad_gpio_b0_14: SW_MUX_CTL_PAD_GPIO_B0_14,
    pub sw_mux_ctl_pad_gpio_b0_15: SW_MUX_CTL_PAD_GPIO_B0_15,
    pub sw_mux_ctl_pad_gpio_b1_00: SW_MUX_CTL_PAD_GPIO_B1_00,
    pub sw_mux_ctl_pad_gpio_b1_01: SW_MUX_CTL_PAD_GPIO_B1_01,
    pub sw_mux_ctl_pad_gpio_b1_02: SW_MUX_CTL_PAD_GPIO_B1_02,
    pub sw_mux_ctl_pad_gpio_b1_03: SW_MUX_CTL_PAD_GPIO_B1_03,
    pub sw_mux_ctl_pad_gpio_b1_04: SW_MUX_CTL_PAD_GPIO_B1_04,
    pub sw_mux_ctl_pad_gpio_b1_05: SW_MUX_CTL_PAD_GPIO_B1_05,
    pub sw_mux_ctl_pad_gpio_b1_06: SW_MUX_CTL_PAD_GPIO_B1_06,
    pub sw_mux_ctl_pad_gpio_b1_07: SW_MUX_CTL_PAD_GPIO_B1_07,
    pub sw_mux_ctl_pad_gpio_b1_08: SW_MUX_CTL_PAD_GPIO_B1_08,
    pub sw_mux_ctl_pad_gpio_b1_09: SW_MUX_CTL_PAD_GPIO_B1_09,
    pub sw_mux_ctl_pad_gpio_b1_10: SW_MUX_CTL_PAD_GPIO_B1_10,
    pub sw_mux_ctl_pad_gpio_b1_11: SW_MUX_CTL_PAD_GPIO_B1_11,
    pub sw_mux_ctl_pad_gpio_b1_12: SW_MUX_CTL_PAD_GPIO_B1_12,
    pub sw_mux_ctl_pad_gpio_b1_13: SW_MUX_CTL_PAD_GPIO_B1_13,
    pub sw_mux_ctl_pad_gpio_b1_14: SW_MUX_CTL_PAD_GPIO_B1_14,
    pub sw_mux_ctl_pad_gpio_b1_15: SW_MUX_CTL_PAD_GPIO_B1_15,
    pub sw_mux_ctl_pad_gpio_sd_b0_00: SW_MUX_CTL_PAD_GPIO_SD_B0_00,
    pub sw_mux_ctl_pad_gpio_sd_b0_01: SW_MUX_CTL_PAD_GPIO_SD_B0_01,
    pub sw_mux_ctl_pad_gpio_sd_b0_02: SW_MUX_CTL_PAD_GPIO_SD_B0_02,
    pub sw_mux_ctl_pad_gpio_sd_b0_03: SW_MUX_CTL_PAD_GPIO_SD_B0_03,
    pub sw_mux_ctl_pad_gpio_sd_b0_04: SW_MUX_CTL_PAD_GPIO_SD_B0_04,
    pub sw_mux_ctl_pad_gpio_sd_b0_05: SW_MUX_CTL_PAD_GPIO_SD_B0_05,
    pub sw_mux_ctl_pad_gpio_sd_b1_00: SW_MUX_CTL_PAD_GPIO_SD_B1_00,
    pub sw_mux_ctl_pad_gpio_sd_b1_01: SW_MUX_CTL_PAD_GPIO_SD_B1_01,
    pub sw_mux_ctl_pad_gpio_sd_b1_02: SW_MUX_CTL_PAD_GPIO_SD_B1_02,
    pub sw_mux_ctl_pad_gpio_sd_b1_03: SW_MUX_CTL_PAD_GPIO_SD_B1_03,
    pub sw_mux_ctl_pad_gpio_sd_b1_04: SW_MUX_CTL_PAD_GPIO_SD_B1_04,
    pub sw_mux_ctl_pad_gpio_sd_b1_05: SW_MUX_CTL_PAD_GPIO_SD_B1_05,
    pub sw_mux_ctl_pad_gpio_sd_b1_06: SW_MUX_CTL_PAD_GPIO_SD_B1_06,
    pub sw_mux_ctl_pad_gpio_sd_b1_07: SW_MUX_CTL_PAD_GPIO_SD_B1_07,
    pub sw_mux_ctl_pad_gpio_sd_b1_08: SW_MUX_CTL_PAD_GPIO_SD_B1_08,
    pub sw_mux_ctl_pad_gpio_sd_b1_09: SW_MUX_CTL_PAD_GPIO_SD_B1_09,
    pub sw_mux_ctl_pad_gpio_sd_b1_10: SW_MUX_CTL_PAD_GPIO_SD_B1_10,
    pub sw_mux_ctl_pad_gpio_sd_b1_11: SW_MUX_CTL_PAD_GPIO_SD_B1_11,
    pub sw_pad_ctl_pad_gpio_emc_00: SW_PAD_CTL_PAD_GPIO_EMC_00,
    pub sw_pad_ctl_pad_gpio_emc_01: SW_PAD_CTL_PAD_GPIO_EMC_01,
    pub sw_pad_ctl_pad_gpio_emc_02: SW_PAD_CTL_PAD_GPIO_EMC_02,
    pub sw_pad_ctl_pad_gpio_emc_03: SW_PAD_CTL_PAD_GPIO_EMC_03,
    pub sw_pad_ctl_pad_gpio_emc_04: SW_PAD_CTL_PAD_GPIO_EMC_04,
    pub sw_pad_ctl_pad_gpio_emc_05: SW_PAD_CTL_PAD_GPIO_EMC_05,
    pub sw_pad_ctl_pad_gpio_emc_06: SW_PAD_CTL_PAD_GPIO_EMC_06,
    pub sw_pad_ctl_pad_gpio_emc_07: SW_PAD_CTL_PAD_GPIO_EMC_07,
    pub sw_pad_ctl_pad_gpio_emc_08: SW_PAD_CTL_PAD_GPIO_EMC_08,
    pub sw_pad_ctl_pad_gpio_emc_09: SW_PAD_CTL_PAD_GPIO_EMC_09,
    pub sw_pad_ctl_pad_gpio_emc_10: SW_PAD_CTL_PAD_GPIO_EMC_10,
    pub sw_pad_ctl_pad_gpio_emc_11: SW_PAD_CTL_PAD_GPIO_EMC_11,
    pub sw_pad_ctl_pad_gpio_emc_12: SW_PAD_CTL_PAD_GPIO_EMC_12,
    pub sw_pad_ctl_pad_gpio_emc_13: SW_PAD_CTL_PAD_GPIO_EMC_13,
    pub sw_pad_ctl_pad_gpio_emc_14: SW_PAD_CTL_PAD_GPIO_EMC_14,
    pub sw_pad_ctl_pad_gpio_emc_15: SW_PAD_CTL_PAD_GPIO_EMC_15,
    pub sw_pad_ctl_pad_gpio_emc_16: SW_PAD_CTL_PAD_GPIO_EMC_16,
    pub sw_pad_ctl_pad_gpio_emc_17: SW_PAD_CTL_PAD_GPIO_EMC_17,
    pub sw_pad_ctl_pad_gpio_emc_18: SW_PAD_CTL_PAD_GPIO_EMC_18,
    pub sw_pad_ctl_pad_gpio_emc_19: SW_PAD_CTL_PAD_GPIO_EMC_19,
    pub sw_pad_ctl_pad_gpio_emc_20: SW_PAD_CTL_PAD_GPIO_EMC_20,
    pub sw_pad_ctl_pad_gpio_emc_21: SW_PAD_CTL_PAD_GPIO_EMC_21,
    pub sw_pad_ctl_pad_gpio_emc_22: SW_PAD_CTL_PAD_GPIO_EMC_22,
    pub sw_pad_ctl_pad_gpio_emc_23: SW_PAD_CTL_PAD_GPIO_EMC_23,
    pub sw_pad_ctl_pad_gpio_emc_24: SW_PAD_CTL_PAD_GPIO_EMC_24,
    pub sw_pad_ctl_pad_gpio_emc_25: SW_PAD_CTL_PAD_GPIO_EMC_25,
    pub sw_pad_ctl_pad_gpio_emc_26: SW_PAD_CTL_PAD_GPIO_EMC_26,
    pub sw_pad_ctl_pad_gpio_emc_27: SW_PAD_CTL_PAD_GPIO_EMC_27,
    pub sw_pad_ctl_pad_gpio_emc_28: SW_PAD_CTL_PAD_GPIO_EMC_28,
    pub sw_pad_ctl_pad_gpio_emc_29: SW_PAD_CTL_PAD_GPIO_EMC_29,
    pub sw_pad_ctl_pad_gpio_emc_30: SW_PAD_CTL_PAD_GPIO_EMC_30,
    pub sw_pad_ctl_pad_gpio_emc_31: SW_PAD_CTL_PAD_GPIO_EMC_31,
    pub sw_pad_ctl_pad_gpio_emc_32: SW_PAD_CTL_PAD_GPIO_EMC_32,
    pub sw_pad_ctl_pad_gpio_emc_33: SW_PAD_CTL_PAD_GPIO_EMC_33,
    pub sw_pad_ctl_pad_gpio_emc_34: SW_PAD_CTL_PAD_GPIO_EMC_34,
    pub sw_pad_ctl_pad_gpio_emc_35: SW_PAD_CTL_PAD_GPIO_EMC_35,
    pub sw_pad_ctl_pad_gpio_emc_36: SW_PAD_CTL_PAD_GPIO_EMC_36,
    pub sw_pad_ctl_pad_gpio_emc_37: SW_PAD_CTL_PAD_GPIO_EMC_37,
    pub sw_pad_ctl_pad_gpio_emc_38: SW_PAD_CTL_PAD_GPIO_EMC_38,
    pub sw_pad_ctl_pad_gpio_emc_39: SW_PAD_CTL_PAD_GPIO_EMC_39,
    pub sw_pad_ctl_pad_gpio_emc_40: SW_PAD_CTL_PAD_GPIO_EMC_40,
    pub sw_pad_ctl_pad_gpio_emc_41: SW_PAD_CTL_PAD_GPIO_EMC_41,
    pub sw_pad_ctl_pad_gpio_ad_b0_00: SW_PAD_CTL_PAD_GPIO_AD_B0_00,
    pub sw_pad_ctl_pad_gpio_ad_b0_01: SW_PAD_CTL_PAD_GPIO_AD_B0_01,
    pub sw_pad_ctl_pad_gpio_ad_b0_02: SW_PAD_CTL_PAD_GPIO_AD_B0_02,
    pub sw_pad_ctl_pad_gpio_ad_b0_03: SW_PAD_CTL_PAD_GPIO_AD_B0_03,
    pub sw_pad_ctl_pad_gpio_ad_b0_04: SW_PAD_CTL_PAD_GPIO_AD_B0_04,
    pub sw_pad_ctl_pad_gpio_ad_b0_05: SW_PAD_CTL_PAD_GPIO_AD_B0_05,
    pub sw_pad_ctl_pad_gpio_ad_b0_06: SW_PAD_CTL_PAD_GPIO_AD_B0_06,
    pub sw_pad_ctl_pad_gpio_ad_b0_07: SW_PAD_CTL_PAD_GPIO_AD_B0_07,
    pub sw_pad_ctl_pad_gpio_ad_b0_08: SW_PAD_CTL_PAD_GPIO_AD_B0_08,
    pub sw_pad_ctl_pad_gpio_ad_b0_09: SW_PAD_CTL_PAD_GPIO_AD_B0_09,
    pub sw_pad_ctl_pad_gpio_ad_b0_10: SW_PAD_CTL_PAD_GPIO_AD_B0_10,
    pub sw_pad_ctl_pad_gpio_ad_b0_11: SW_PAD_CTL_PAD_GPIO_AD_B0_11,
    pub sw_pad_ctl_pad_gpio_ad_b0_12: SW_PAD_CTL_PAD_GPIO_AD_B0_12,
    pub sw_pad_ctl_pad_gpio_ad_b0_13: SW_PAD_CTL_PAD_GPIO_AD_B0_13,
    pub sw_pad_ctl_pad_gpio_ad_b0_14: SW_PAD_CTL_PAD_GPIO_AD_B0_14,
    pub sw_pad_ctl_pad_gpio_ad_b0_15: SW_PAD_CTL_PAD_GPIO_AD_B0_15,
    pub sw_pad_ctl_pad_gpio_ad_b1_00: SW_PAD_CTL_PAD_GPIO_AD_B1_00,
    pub sw_pad_ctl_pad_gpio_ad_b1_01: SW_PAD_CTL_PAD_GPIO_AD_B1_01,
    pub sw_pad_ctl_pad_gpio_ad_b1_02: SW_PAD_CTL_PAD_GPIO_AD_B1_02,
    pub sw_pad_ctl_pad_gpio_ad_b1_03: SW_PAD_CTL_PAD_GPIO_AD_B1_03,
    pub sw_pad_ctl_pad_gpio_ad_b1_04: SW_PAD_CTL_PAD_GPIO_AD_B1_04,
    pub sw_pad_ctl_pad_gpio_ad_b1_05: SW_PAD_CTL_PAD_GPIO_AD_B1_05,
    pub sw_pad_ctl_pad_gpio_ad_b1_06: SW_PAD_CTL_PAD_GPIO_AD_B1_06,
    pub sw_pad_ctl_pad_gpio_ad_b1_07: SW_PAD_CTL_PAD_GPIO_AD_B1_07,
    pub sw_pad_ctl_pad_gpio_ad_b1_08: SW_PAD_CTL_PAD_GPIO_AD_B1_08,
    pub sw_pad_ctl_pad_gpio_ad_b1_09: SW_PAD_CTL_PAD_GPIO_AD_B1_09,
    pub sw_pad_ctl_pad_gpio_ad_b1_10: SW_PAD_CTL_PAD_GPIO_AD_B1_10,
    pub sw_pad_ctl_pad_gpio_ad_b1_11: SW_PAD_CTL_PAD_GPIO_AD_B1_11,
    pub sw_pad_ctl_pad_gpio_ad_b1_12: SW_PAD_CTL_PAD_GPIO_AD_B1_12,
    pub sw_pad_ctl_pad_gpio_ad_b1_13: SW_PAD_CTL_PAD_GPIO_AD_B1_13,
    pub sw_pad_ctl_pad_gpio_ad_b1_14: SW_PAD_CTL_PAD_GPIO_AD_B1_14,
    pub sw_pad_ctl_pad_gpio_ad_b1_15: SW_PAD_CTL_PAD_GPIO_AD_B1_15,
    pub sw_pad_ctl_pad_gpio_b0_00: SW_PAD_CTL_PAD_GPIO_B0_00,
    pub sw_pad_ctl_pad_gpio_b0_01: SW_PAD_CTL_PAD_GPIO_B0_01,
    pub sw_pad_ctl_pad_gpio_b0_02: SW_PAD_CTL_PAD_GPIO_B0_02,
    pub sw_pad_ctl_pad_gpio_b0_03: SW_PAD_CTL_PAD_GPIO_B0_03,
    pub sw_pad_ctl_pad_gpio_b0_04: SW_PAD_CTL_PAD_GPIO_B0_04,
    pub sw_pad_ctl_pad_gpio_b0_05: SW_PAD_CTL_PAD_GPIO_B0_05,
    pub sw_pad_ctl_pad_gpio_b0_06: SW_PAD_CTL_PAD_GPIO_B0_06,
    pub sw_pad_ctl_pad_gpio_b0_07: SW_PAD_CTL_PAD_GPIO_B0_07,
    pub sw_pad_ctl_pad_gpio_b0_08: SW_PAD_CTL_PAD_GPIO_B0_08,
    pub sw_pad_ctl_pad_gpio_b0_09: SW_PAD_CTL_PAD_GPIO_B0_09,
    pub sw_pad_ctl_pad_gpio_b0_10: SW_PAD_CTL_PAD_GPIO_B0_10,
    pub sw_pad_ctl_pad_gpio_b0_11: SW_PAD_CTL_PAD_GPIO_B0_11,
    pub sw_pad_ctl_pad_gpio_b0_12: SW_PAD_CTL_PAD_GPIO_B0_12,
    pub sw_pad_ctl_pad_gpio_b0_13: SW_PAD_CTL_PAD_GPIO_B0_13,
    pub sw_pad_ctl_pad_gpio_b0_14: SW_PAD_CTL_PAD_GPIO_B0_14,
    pub sw_pad_ctl_pad_gpio_b0_15: SW_PAD_CTL_PAD_GPIO_B0_15,
    pub sw_pad_ctl_pad_gpio_b1_00: SW_PAD_CTL_PAD_GPIO_B1_00,
    pub sw_pad_ctl_pad_gpio_b1_01: SW_PAD_CTL_PAD_GPIO_B1_01,
    pub sw_pad_ctl_pad_gpio_b1_02: SW_PAD_CTL_PAD_GPIO_B1_02,
    pub sw_pad_ctl_pad_gpio_b1_03: SW_PAD_CTL_PAD_GPIO_B1_03,
    pub sw_pad_ctl_pad_gpio_b1_04: SW_PAD_CTL_PAD_GPIO_B1_04,
    pub sw_pad_ctl_pad_gpio_b1_05: SW_PAD_CTL_PAD_GPIO_B1_05,
    pub sw_pad_ctl_pad_gpio_b1_06: SW_PAD_CTL_PAD_GPIO_B1_06,
    pub sw_pad_ctl_pad_gpio_b1_07: SW_PAD_CTL_PAD_GPIO_B1_07,
    pub sw_pad_ctl_pad_gpio_b1_08: SW_PAD_CTL_PAD_GPIO_B1_08,
    pub sw_pad_ctl_pad_gpio_b1_09: SW_PAD_CTL_PAD_GPIO_B1_09,
    pub sw_pad_ctl_pad_gpio_b1_10: SW_PAD_CTL_PAD_GPIO_B1_10,
    pub sw_pad_ctl_pad_gpio_b1_11: SW_PAD_CTL_PAD_GPIO_B1_11,
    pub sw_pad_ctl_pad_gpio_b1_12: SW_PAD_CTL_PAD_GPIO_B1_12,
    pub sw_pad_ctl_pad_gpio_b1_13: SW_PAD_CTL_PAD_GPIO_B1_13,
    pub sw_pad_ctl_pad_gpio_b1_14: SW_PAD_CTL_PAD_GPIO_B1_14,
    pub sw_pad_ctl_pad_gpio_b1_15: SW_PAD_CTL_PAD_GPIO_B1_15,
    pub sw_pad_ctl_pad_gpio_sd_b0_00: SW_PAD_CTL_PAD_GPIO_SD_B0_00,
    pub sw_pad_ctl_pad_gpio_sd_b0_01: SW_PAD_CTL_PAD_GPIO_SD_B0_01,
    pub sw_pad_ctl_pad_gpio_sd_b0_02: SW_PAD_CTL_PAD_GPIO_SD_B0_02,
    pub sw_pad_ctl_pad_gpio_sd_b0_03: SW_PAD_CTL_PAD_GPIO_SD_B0_03,
    pub sw_pad_ctl_pad_gpio_sd_b0_04: SW_PAD_CTL_PAD_GPIO_SD_B0_04,
    pub sw_pad_ctl_pad_gpio_sd_b0_05: SW_PAD_CTL_PAD_GPIO_SD_B0_05,
    pub sw_pad_ctl_pad_gpio_sd_b1_00: SW_PAD_CTL_PAD_GPIO_SD_B1_00,
    pub sw_pad_ctl_pad_gpio_sd_b1_01: SW_PAD_CTL_PAD_GPIO_SD_B1_01,
    pub sw_pad_ctl_pad_gpio_sd_b1_02: SW_PAD_CTL_PAD_GPIO_SD_B1_02,
    pub sw_pad_ctl_pad_gpio_sd_b1_03: SW_PAD_CTL_PAD_GPIO_SD_B1_03,
    pub sw_pad_ctl_pad_gpio_sd_b1_04: SW_PAD_CTL_PAD_GPIO_SD_B1_04,
    pub sw_pad_ctl_pad_gpio_sd_b1_05: SW_PAD_CTL_PAD_GPIO_SD_B1_05,
    pub sw_pad_ctl_pad_gpio_sd_b1_06: SW_PAD_CTL_PAD_GPIO_SD_B1_06,
    pub sw_pad_ctl_pad_gpio_sd_b1_07: SW_PAD_CTL_PAD_GPIO_SD_B1_07,
    pub sw_pad_ctl_pad_gpio_sd_b1_08: SW_PAD_CTL_PAD_GPIO_SD_B1_08,
    pub sw_pad_ctl_pad_gpio_sd_b1_09: SW_PAD_CTL_PAD_GPIO_SD_B1_09,
    pub sw_pad_ctl_pad_gpio_sd_b1_10: SW_PAD_CTL_PAD_GPIO_SD_B1_10,
    pub sw_pad_ctl_pad_gpio_sd_b1_11: SW_PAD_CTL_PAD_GPIO_SD_B1_11,
    pub anatop_usb_otg1_id_select_input: ANATOP_USB_OTG1_ID_SELECT_INPUT,
    pub anatop_usb_otg2_id_select_input: ANATOP_USB_OTG2_ID_SELECT_INPUT,
    pub ccm_pmic_ready_select_input: CCM_PMIC_READY_SELECT_INPUT,
    pub csi_data02_select_input: CSI_DATA02_SELECT_INPUT,
    pub csi_data03_select_input: CSI_DATA03_SELECT_INPUT,
    pub csi_data04_select_input: CSI_DATA04_SELECT_INPUT,
    pub csi_data05_select_input: CSI_DATA05_SELECT_INPUT,
    pub csi_data06_select_input: CSI_DATA06_SELECT_INPUT,
    pub csi_data07_select_input: CSI_DATA07_SELECT_INPUT,
    pub csi_data08_select_input: CSI_DATA08_SELECT_INPUT,
    pub csi_data09_select_input: CSI_DATA09_SELECT_INPUT,
    pub csi_hsync_select_input: CSI_HSYNC_SELECT_INPUT,
    pub csi_pixclk_select_input: CSI_PIXCLK_SELECT_INPUT,
    pub csi_vsync_select_input: CSI_VSYNC_SELECT_INPUT,
    pub enet_ipg_clk_rmii_select_input: ENET_IPG_CLK_RMII_SELECT_INPUT,
    pub enet_mdio_select_input: ENET_MDIO_SELECT_INPUT,
    pub enet0_rxdata_select_input: ENET0_RXDATA_SELECT_INPUT,
    pub enet1_rxdata_select_input: ENET1_RXDATA_SELECT_INPUT,
    pub enet_rxen_select_input: ENET_RXEN_SELECT_INPUT,
    pub enet_rxerr_select_input: ENET_RXERR_SELECT_INPUT,
    pub enet0_timer_select_input: ENET0_TIMER_SELECT_INPUT,
    pub enet_txclk_select_input: ENET_TXCLK_SELECT_INPUT,
    pub flexcan1_rx_select_input: FLEXCAN1_RX_SELECT_INPUT,
    pub flexcan2_rx_select_input: FLEXCAN2_RX_SELECT_INPUT,
    pub flexpwm1_pwma3_select_input: FLEXPWM1_PWMA3_SELECT_INPUT,
    pub flexpwm1_pwma0_select_input: FLEXPWM1_PWMA0_SELECT_INPUT,
    pub flexpwm1_pwma1_select_input: FLEXPWM1_PWMA1_SELECT_INPUT,
    pub flexpwm1_pwma2_select_input: FLEXPWM1_PWMA2_SELECT_INPUT,
    pub flexpwm1_pwmb3_select_input: FLEXPWM1_PWMB3_SELECT_INPUT,
    pub flexpwm1_pwmb0_select_input: FLEXPWM1_PWMB0_SELECT_INPUT,
    pub flexpwm1_pwmb1_select_input: FLEXPWM1_PWMB1_SELECT_INPUT,
    pub flexpwm1_pwmb2_select_input: FLEXPWM1_PWMB2_SELECT_INPUT,
    pub flexpwm2_pwma3_select_input: FLEXPWM2_PWMA3_SELECT_INPUT,
    pub flexpwm2_pwma0_select_input: FLEXPWM2_PWMA0_SELECT_INPUT,
    pub flexpwm2_pwma1_select_input: FLEXPWM2_PWMA1_SELECT_INPUT,
    pub flexpwm2_pwma2_select_input: FLEXPWM2_PWMA2_SELECT_INPUT,
    pub flexpwm2_pwmb3_select_input: FLEXPWM2_PWMB3_SELECT_INPUT,
    pub flexpwm2_pwmb0_select_input: FLEXPWM2_PWMB0_SELECT_INPUT,
    pub flexpwm2_pwmb1_select_input: FLEXPWM2_PWMB1_SELECT_INPUT,
    pub flexpwm2_pwmb2_select_input: FLEXPWM2_PWMB2_SELECT_INPUT,
    pub flexpwm4_pwma0_select_input: FLEXPWM4_PWMA0_SELECT_INPUT,
    pub flexpwm4_pwma1_select_input: FLEXPWM4_PWMA1_SELECT_INPUT,
    pub flexpwm4_pwma2_select_input: FLEXPWM4_PWMA2_SELECT_INPUT,
    pub flexpwm4_pwma3_select_input: FLEXPWM4_PWMA3_SELECT_INPUT,
    pub flexspia_dqs_select_input: FLEXSPIA_DQS_SELECT_INPUT,
    pub flexspia_data0_select_input: FLEXSPIA_DATA0_SELECT_INPUT,
    pub flexspia_data1_select_input: FLEXSPIA_DATA1_SELECT_INPUT,
    pub flexspia_data2_select_input: FLEXSPIA_DATA2_SELECT_INPUT,
    pub flexspia_data3_select_input: FLEXSPIA_DATA3_SELECT_INPUT,
    pub flexspib_data0_select_input: FLEXSPIB_DATA0_SELECT_INPUT,
    pub flexspib_data1_select_input: FLEXSPIB_DATA1_SELECT_INPUT,
    pub flexspib_data2_select_input: FLEXSPIB_DATA2_SELECT_INPUT,
    pub flexspib_data3_select_input: FLEXSPIB_DATA3_SELECT_INPUT,
    pub flexspia_sck_select_input: FLEXSPIA_SCK_SELECT_INPUT,
    pub lpi2c1_scl_select_input: LPI2C1_SCL_SELECT_INPUT,
    pub lpi2c1_sda_select_input: LPI2C1_SDA_SELECT_INPUT,
    pub lpi2c2_scl_select_input: LPI2C2_SCL_SELECT_INPUT,
    pub lpi2c2_sda_select_input: LPI2C2_SDA_SELECT_INPUT,
    pub lpi2c3_scl_select_input: LPI2C3_SCL_SELECT_INPUT,
    pub lpi2c3_sda_select_input: LPI2C3_SDA_SELECT_INPUT,
    pub lpi2c4_scl_select_input: LPI2C4_SCL_SELECT_INPUT,
    pub lpi2c4_sda_select_input: LPI2C4_SDA_SELECT_INPUT,
    pub lpspi1_pcs0_select_input: LPSPI1_PCS0_SELECT_INPUT,
    pub lpspi1_sck_select_input: LPSPI1_SCK_SELECT_INPUT,
    pub lpspi1_sdi_select_input: LPSPI1_SDI_SELECT_INPUT,
    pub lpspi1_sdo_select_input: LPSPI1_SDO_SELECT_INPUT,
    pub lpspi2_pcs0_select_input: LPSPI2_PCS0_SELECT_INPUT,
    pub lpspi2_sck_select_input: LPSPI2_SCK_SELECT_INPUT,
    pub lpspi2_sdi_select_input: LPSPI2_SDI_SELECT_INPUT,
    pub lpspi2_sdo_select_input: LPSPI2_SDO_SELECT_INPUT,
    pub lpspi3_pcs0_select_input: LPSPI3_PCS0_SELECT_INPUT,
    pub lpspi3_sck_select_input: LPSPI3_SCK_SELECT_INPUT,
    pub lpspi3_sdi_select_input: LPSPI3_SDI_SELECT_INPUT,
    pub lpspi3_sdo_select_input: LPSPI3_SDO_SELECT_INPUT,
    pub lpspi4_pcs0_select_input: LPSPI4_PCS0_SELECT_INPUT,
    pub lpspi4_sck_select_input: LPSPI4_SCK_SELECT_INPUT,
    pub lpspi4_sdi_select_input: LPSPI4_SDI_SELECT_INPUT,
    pub lpspi4_sdo_select_input: LPSPI4_SDO_SELECT_INPUT,
    pub lpuart2_rx_select_input: LPUART2_RX_SELECT_INPUT,
    pub lpuart2_tx_select_input: LPUART2_TX_SELECT_INPUT,
    pub lpuart3_cts_b_select_input: LPUART3_CTS_B_SELECT_INPUT,
    pub lpuart3_rx_select_input: LPUART3_RX_SELECT_INPUT,
    pub lpuart3_tx_select_input: LPUART3_TX_SELECT_INPUT,
    pub lpuart4_rx_select_input: LPUART4_RX_SELECT_INPUT,
    pub lpuart4_tx_select_input: LPUART4_TX_SELECT_INPUT,
    pub lpuart5_rx_select_input: LPUART5_RX_SELECT_INPUT,
    pub lpuart5_tx_select_input: LPUART5_TX_SELECT_INPUT,
    pub lpuart6_rx_select_input: LPUART6_RX_SELECT_INPUT,
    pub lpuart6_tx_select_input: LPUART6_TX_SELECT_INPUT,
    pub lpuart7_rx_select_input: LPUART7_RX_SELECT_INPUT,
    pub lpuart7_tx_select_input: LPUART7_TX_SELECT_INPUT,
    pub lpuart8_rx_select_input: LPUART8_RX_SELECT_INPUT,
    pub lpuart8_tx_select_input: LPUART8_TX_SELECT_INPUT,
    pub nmi_select_input: NMI_SELECT_INPUT,
    pub qtimer2_timer0_select_input: QTIMER2_TIMER0_SELECT_INPUT,
    pub qtimer2_timer1_select_input: QTIMER2_TIMER1_SELECT_INPUT,
    pub qtimer2_timer2_select_input: QTIMER2_TIMER2_SELECT_INPUT,
    pub qtimer2_timer3_select_input: QTIMER2_TIMER3_SELECT_INPUT,
    pub qtimer3_timer0_select_input: QTIMER3_TIMER0_SELECT_INPUT,
    pub qtimer3_timer1_select_input: QTIMER3_TIMER1_SELECT_INPUT,
    pub qtimer3_timer2_select_input: QTIMER3_TIMER2_SELECT_INPUT,
    pub qtimer3_timer3_select_input: QTIMER3_TIMER3_SELECT_INPUT,
    pub sai1_mclk2_select_input: SAI1_MCLK2_SELECT_INPUT,
    pub sai1_rx_bclk_select_input: SAI1_RX_BCLK_SELECT_INPUT,
    pub sai1_rx_data0_select_input: SAI1_RX_DATA0_SELECT_INPUT,
    pub sai1_rx_data1_select_input: SAI1_RX_DATA1_SELECT_INPUT,
    pub sai1_rx_data2_select_input: SAI1_RX_DATA2_SELECT_INPUT,
    pub sai1_rx_data3_select_input: SAI1_RX_DATA3_SELECT_INPUT,
    pub sai1_rx_sync_select_input: SAI1_RX_SYNC_SELECT_INPUT,
    pub sai1_tx_bclk_select_input: SAI1_TX_BCLK_SELECT_INPUT,
    pub sai1_tx_sync_select_input: SAI1_TX_SYNC_SELECT_INPUT,
    pub sai2_mclk2_select_input: SAI2_MCLK2_SELECT_INPUT,
    pub sai2_rx_bclk_select_input: SAI2_RX_BCLK_SELECT_INPUT,
    pub sai2_rx_data0_select_input: SAI2_RX_DATA0_SELECT_INPUT,
    pub sai2_rx_sync_select_input: SAI2_RX_SYNC_SELECT_INPUT,
    pub sai2_tx_bclk_select_input: SAI2_TX_BCLK_SELECT_INPUT,
    pub sai2_tx_sync_select_input: SAI2_TX_SYNC_SELECT_INPUT,
    pub spdif_in_select_input: SPDIF_IN_SELECT_INPUT,
    pub usb_otg2_oc_select_input: USB_OTG2_OC_SELECT_INPUT,
    pub usb_otg1_oc_select_input: USB_OTG1_OC_SELECT_INPUT,
    pub usdhc1_cd_b_select_input: USDHC1_CD_B_SELECT_INPUT,
    pub usdhc1_wp_select_input: USDHC1_WP_SELECT_INPUT,
    pub usdhc2_clk_select_input: USDHC2_CLK_SELECT_INPUT,
    pub usdhc2_cd_b_select_input: USDHC2_CD_B_SELECT_INPUT,
    pub usdhc2_cmd_select_input: USDHC2_CMD_SELECT_INPUT,
    pub usdhc2_data0_select_input: USDHC2_DATA0_SELECT_INPUT,
    pub usdhc2_data1_select_input: USDHC2_DATA1_SELECT_INPUT,
    pub usdhc2_data2_select_input: USDHC2_DATA2_SELECT_INPUT,
    pub usdhc2_data3_select_input: USDHC2_DATA3_SELECT_INPUT,
    pub usdhc2_data4_select_input: USDHC2_DATA4_SELECT_INPUT,
    pub usdhc2_data5_select_input: USDHC2_DATA5_SELECT_INPUT,
    pub usdhc2_data6_select_input: USDHC2_DATA6_SELECT_INPUT,
    pub usdhc2_data7_select_input: USDHC2_DATA7_SELECT_INPUT,
    pub usdhc2_wp_select_input: USDHC2_WP_SELECT_INPUT,
    pub xbar1_in02_select_input: XBAR1_IN02_SELECT_INPUT,
    pub xbar1_in03_select_input: XBAR1_IN03_SELECT_INPUT,
    pub xbar1_in04_select_input: XBAR1_IN04_SELECT_INPUT,
    pub xbar1_in05_select_input: XBAR1_IN05_SELECT_INPUT,
    pub xbar1_in06_select_input: XBAR1_IN06_SELECT_INPUT,
    pub xbar1_in07_select_input: XBAR1_IN07_SELECT_INPUT,
    pub xbar1_in08_select_input: XBAR1_IN08_SELECT_INPUT,
    pub xbar1_in09_select_input: XBAR1_IN09_SELECT_INPUT,
    pub xbar1_in17_select_input: XBAR1_IN17_SELECT_INPUT,
    pub xbar1_in18_select_input: XBAR1_IN18_SELECT_INPUT,
    pub xbar1_in20_select_input: XBAR1_IN20_SELECT_INPUT,
    pub xbar1_in22_select_input: XBAR1_IN22_SELECT_INPUT,
    pub xbar1_in23_select_input: XBAR1_IN23_SELECT_INPUT,
    pub xbar1_in24_select_input: XBAR1_IN24_SELECT_INPUT,
    pub xbar1_in14_select_input: XBAR1_IN14_SELECT_INPUT,
    pub xbar1_in15_select_input: XBAR1_IN15_SELECT_INPUT,
    pub xbar1_in16_select_input: XBAR1_IN16_SELECT_INPUT,
    pub xbar1_in25_select_input: XBAR1_IN25_SELECT_INPUT,
    pub xbar1_in19_select_input: XBAR1_IN19_SELECT_INPUT,
    pub xbar1_in21_select_input: XBAR1_IN21_SELECT_INPUT,
    pub sw_mux_ctl_pad_gpio_spi_b0_00: SW_MUX_CTL_PAD_GPIO_SPI_B0_00,
    pub sw_mux_ctl_pad_gpio_spi_b0_01: SW_MUX_CTL_PAD_GPIO_SPI_B0_01,
    pub sw_mux_ctl_pad_gpio_spi_b0_02: SW_MUX_CTL_PAD_GPIO_SPI_B0_02,
    pub sw_mux_ctl_pad_gpio_spi_b0_03: SW_MUX_CTL_PAD_GPIO_SPI_B0_03,
    pub sw_mux_ctl_pad_gpio_spi_b0_04: SW_MUX_CTL_PAD_GPIO_SPI_B0_04,
    pub sw_mux_ctl_pad_gpio_spi_b0_05: SW_MUX_CTL_PAD_GPIO_SPI_B0_05,
    pub sw_mux_ctl_pad_gpio_spi_b0_06: SW_MUX_CTL_PAD_GPIO_SPI_B0_06,
    pub sw_mux_ctl_pad_gpio_spi_b0_07: SW_MUX_CTL_PAD_GPIO_SPI_B0_07,
    pub sw_mux_ctl_pad_gpio_spi_b0_08: SW_MUX_CTL_PAD_GPIO_SPI_B0_08,
    pub sw_mux_ctl_pad_gpio_spi_b0_09: SW_MUX_CTL_PAD_GPIO_SPI_B0_09,
    pub sw_mux_ctl_pad_gpio_spi_b0_10: SW_MUX_CTL_PAD_GPIO_SPI_B0_10,
    pub sw_mux_ctl_pad_gpio_spi_b0_11: SW_MUX_CTL_PAD_GPIO_SPI_B0_11,
    pub sw_mux_ctl_pad_gpio_spi_b0_12: SW_MUX_CTL_PAD_GPIO_SPI_B0_12,
    pub sw_mux_ctl_pad_gpio_spi_b0_13: SW_MUX_CTL_PAD_GPIO_SPI_B0_13,
    pub sw_mux_ctl_pad_gpio_spi_b1_00: SW_MUX_CTL_PAD_GPIO_SPI_B1_00,
    pub sw_mux_ctl_pad_gpio_spi_b1_01: SW_MUX_CTL_PAD_GPIO_SPI_B1_01,
    pub sw_mux_ctl_pad_gpio_spi_b1_02: SW_MUX_CTL_PAD_GPIO_SPI_B1_02,
    pub sw_mux_ctl_pad_gpio_spi_b1_03: SW_MUX_CTL_PAD_GPIO_SPI_B1_03,
    pub sw_mux_ctl_pad_gpio_spi_b1_04: SW_MUX_CTL_PAD_GPIO_SPI_B1_04,
    pub sw_mux_ctl_pad_gpio_spi_b1_05: SW_MUX_CTL_PAD_GPIO_SPI_B1_05,
    pub sw_mux_ctl_pad_gpio_spi_b1_06: SW_MUX_CTL_PAD_GPIO_SPI_B1_06,
    pub sw_mux_ctl_pad_gpio_spi_b1_07: SW_MUX_CTL_PAD_GPIO_SPI_B1_07,
    pub sw_pad_ctl_pad_gpio_spi_b0_00: SW_PAD_CTL_PAD_GPIO_SPI_B0_00,
    pub sw_pad_ctl_pad_gpio_spi_b0_01: SW_PAD_CTL_PAD_GPIO_SPI_B0_01,
    pub sw_pad_ctl_pad_gpio_spi_b0_02: SW_PAD_CTL_PAD_GPIO_SPI_B0_02,
    pub sw_pad_ctl_pad_gpio_spi_b0_03: SW_PAD_CTL_PAD_GPIO_SPI_B0_03,
    pub sw_pad_ctl_pad_gpio_spi_b0_04: SW_PAD_CTL_PAD_GPIO_SPI_B0_04,
    pub sw_pad_ctl_pad_gpio_spi_b0_05: SW_PAD_CTL_PAD_GPIO_SPI_B0_05,
    pub sw_pad_ctl_pad_gpio_spi_b0_06: SW_PAD_CTL_PAD_GPIO_SPI_B0_06,
    pub sw_pad_ctl_pad_gpio_spi_b0_07: SW_PAD_CTL_PAD_GPIO_SPI_B0_07,
    pub sw_pad_ctl_pad_gpio_spi_b0_08: SW_PAD_CTL_PAD_GPIO_SPI_B0_08,
    pub sw_pad_ctl_pad_gpio_spi_b0_09: SW_PAD_CTL_PAD_GPIO_SPI_B0_09,
    pub sw_pad_ctl_pad_gpio_spi_b0_10: SW_PAD_CTL_PAD_GPIO_SPI_B0_10,
    pub sw_pad_ctl_pad_gpio_spi_b0_11: SW_PAD_CTL_PAD_GPIO_SPI_B0_11,
    pub sw_pad_ctl_pad_gpio_spi_b0_12: SW_PAD_CTL_PAD_GPIO_SPI_B0_12,
    pub sw_pad_ctl_pad_gpio_spi_b0_13: SW_PAD_CTL_PAD_GPIO_SPI_B0_13,
    pub sw_pad_ctl_pad_gpio_spi_b1_00: SW_PAD_CTL_PAD_GPIO_SPI_B1_00,
    pub sw_pad_ctl_pad_gpio_spi_b1_01: SW_PAD_CTL_PAD_GPIO_SPI_B1_01,
    pub sw_pad_ctl_pad_gpio_spi_b1_02: SW_PAD_CTL_PAD_GPIO_SPI_B1_02,
    pub sw_pad_ctl_pad_gpio_spi_b1_03: SW_PAD_CTL_PAD_GPIO_SPI_B1_03,
    pub sw_pad_ctl_pad_gpio_spi_b1_04: SW_PAD_CTL_PAD_GPIO_SPI_B1_04,
    pub sw_pad_ctl_pad_gpio_spi_b1_05: SW_PAD_CTL_PAD_GPIO_SPI_B1_05,
    pub sw_pad_ctl_pad_gpio_spi_b1_06: SW_PAD_CTL_PAD_GPIO_SPI_B1_06,
    pub sw_pad_ctl_pad_gpio_spi_b1_07: SW_PAD_CTL_PAD_GPIO_SPI_B1_07,
    pub enet2_ipg_clk_rmii_select_input: ENET2_IPG_CLK_RMII_SELECT_INPUT,
    pub enet2_ipp_ind_mac0_mdio_select_input: ENET2_IPP_IND_MAC0_MDIO_SELECT_INPUT,
    pub enet2_ipp_ind_mac0_rxdata_select_input_0: ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_0,
    pub enet2_ipp_ind_mac0_rxdata_select_input_1: ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_1,
    pub enet2_ipp_ind_mac0_rxen_select_input: ENET2_IPP_IND_MAC0_RXEN_SELECT_INPUT,
    pub enet2_ipp_ind_mac0_rxerr_select_input: ENET2_IPP_IND_MAC0_RXERR_SELECT_INPUT,
    pub enet2_ipp_ind_mac0_timer_select_input_0: ENET2_IPP_IND_MAC0_TIMER_SELECT_INPUT_0,
    pub enet2_ipp_ind_mac0_txclk_select_input: ENET2_IPP_IND_MAC0_TXCLK_SELECT_INPUT,
    pub flexspi2_ipp_ind_dqs_fa_select_input: FLEXSPI2_IPP_IND_DQS_FA_SELECT_INPUT,
    pub flexspi2_ipp_ind_io_fa_bit0_select_input: FLEXSPI2_IPP_IND_IO_FA_BIT0_SELECT_INPUT,
    pub flexspi2_ipp_ind_io_fa_bit1_select_input: FLEXSPI2_IPP_IND_IO_FA_BIT1_SELECT_INPUT,
    pub flexspi2_ipp_ind_io_fa_bit2_select_input: FLEXSPI2_IPP_IND_IO_FA_BIT2_SELECT_INPUT,
    pub flexspi2_ipp_ind_io_fa_bit3_select_input: FLEXSPI2_IPP_IND_IO_FA_BIT3_SELECT_INPUT,
    pub flexspi2_ipp_ind_io_fb_bit0_select_input: FLEXSPI2_IPP_IND_IO_FB_BIT0_SELECT_INPUT,
    pub flexspi2_ipp_ind_io_fb_bit1_select_input: FLEXSPI2_IPP_IND_IO_FB_BIT1_SELECT_INPUT,
    pub flexspi2_ipp_ind_io_fb_bit2_select_input: FLEXSPI2_IPP_IND_IO_FB_BIT2_SELECT_INPUT,
    pub flexspi2_ipp_ind_io_fb_bit3_select_input: FLEXSPI2_IPP_IND_IO_FB_BIT3_SELECT_INPUT,
    pub flexspi2_ipp_ind_sck_fa_select_input: FLEXSPI2_IPP_IND_SCK_FA_SELECT_INPUT,
    pub flexspi2_ipp_ind_sck_fb_select_input: FLEXSPI2_IPP_IND_SCK_FB_SELECT_INPUT,
    pub gpt1_ipp_ind_capin1_select_input: GPT1_IPP_IND_CAPIN1_SELECT_INPUT,
    pub gpt1_ipp_ind_capin2_select_input: GPT1_IPP_IND_CAPIN2_SELECT_INPUT,
    pub gpt1_ipp_ind_clkin_select_input: GPT1_IPP_IND_CLKIN_SELECT_INPUT,
    pub gpt2_ipp_ind_capin1_select_input: GPT2_IPP_IND_CAPIN1_SELECT_INPUT,
    pub gpt2_ipp_ind_capin2_select_input: GPT2_IPP_IND_CAPIN2_SELECT_INPUT,
    pub gpt2_ipp_ind_clkin_select_input: GPT2_IPP_IND_CLKIN_SELECT_INPUT,
    pub sai3_ipg_clk_sai_mclk_select_input_2: SAI3_IPG_CLK_SAI_MCLK_SELECT_INPUT_2,
    pub sai3_ipp_ind_sai_rxbclk_select_input: SAI3_IPP_IND_SAI_RXBCLK_SELECT_INPUT,
    pub sai3_ipp_ind_sai_rxdata_select_input_0: SAI3_IPP_IND_SAI_RXDATA_SELECT_INPUT_0,
    pub sai3_ipp_ind_sai_rxsync_select_input: SAI3_IPP_IND_SAI_RXSYNC_SELECT_INPUT,
    pub sai3_ipp_ind_sai_txbclk_select_input: SAI3_IPP_IND_SAI_TXBCLK_SELECT_INPUT,
    pub sai3_ipp_ind_sai_txsync_select_input: SAI3_IPP_IND_SAI_TXSYNC_SELECT_INPUT,
    pub semc_i_ipp_ind_dqs4_select_input: SEMC_I_IPP_IND_DQS4_SELECT_INPUT,
    pub canfd_ipp_ind_canrx_select_input: CANFD_IPP_IND_CANRX_SELECT_INPUT,
    // some fields omitted
}

Register block

Fields

sw_mux_ctl_pad_gpio_emc_00: SW_MUX_CTL_PAD_GPIO_EMC_00

0x14 - SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_01: SW_MUX_CTL_PAD_GPIO_EMC_01

0x18 - SW_MUX_CTL_PAD_GPIO_EMC_01 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_02: SW_MUX_CTL_PAD_GPIO_EMC_02

0x1c - SW_MUX_CTL_PAD_GPIO_EMC_02 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_03: SW_MUX_CTL_PAD_GPIO_EMC_03

0x20 - SW_MUX_CTL_PAD_GPIO_EMC_03 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_04: SW_MUX_CTL_PAD_GPIO_EMC_04

0x24 - SW_MUX_CTL_PAD_GPIO_EMC_04 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_05: SW_MUX_CTL_PAD_GPIO_EMC_05

0x28 - SW_MUX_CTL_PAD_GPIO_EMC_05 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_06: SW_MUX_CTL_PAD_GPIO_EMC_06

0x2c - SW_MUX_CTL_PAD_GPIO_EMC_06 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_07: SW_MUX_CTL_PAD_GPIO_EMC_07

0x30 - SW_MUX_CTL_PAD_GPIO_EMC_07 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_08: SW_MUX_CTL_PAD_GPIO_EMC_08

0x34 - SW_MUX_CTL_PAD_GPIO_EMC_08 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_09: SW_MUX_CTL_PAD_GPIO_EMC_09

0x38 - SW_MUX_CTL_PAD_GPIO_EMC_09 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_10: SW_MUX_CTL_PAD_GPIO_EMC_10

0x3c - SW_MUX_CTL_PAD_GPIO_EMC_10 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_11: SW_MUX_CTL_PAD_GPIO_EMC_11

0x40 - SW_MUX_CTL_PAD_GPIO_EMC_11 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_12: SW_MUX_CTL_PAD_GPIO_EMC_12

0x44 - SW_MUX_CTL_PAD_GPIO_EMC_12 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_13: SW_MUX_CTL_PAD_GPIO_EMC_13

0x48 - SW_MUX_CTL_PAD_GPIO_EMC_13 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_14: SW_MUX_CTL_PAD_GPIO_EMC_14

0x4c - SW_MUX_CTL_PAD_GPIO_EMC_14 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_15: SW_MUX_CTL_PAD_GPIO_EMC_15

0x50 - SW_MUX_CTL_PAD_GPIO_EMC_15 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_16: SW_MUX_CTL_PAD_GPIO_EMC_16

0x54 - SW_MUX_CTL_PAD_GPIO_EMC_16 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_17: SW_MUX_CTL_PAD_GPIO_EMC_17

0x58 - SW_MUX_CTL_PAD_GPIO_EMC_17 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_18: SW_MUX_CTL_PAD_GPIO_EMC_18

0x5c - SW_MUX_CTL_PAD_GPIO_EMC_18 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_19: SW_MUX_CTL_PAD_GPIO_EMC_19

0x60 - SW_MUX_CTL_PAD_GPIO_EMC_19 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_20: SW_MUX_CTL_PAD_GPIO_EMC_20

0x64 - SW_MUX_CTL_PAD_GPIO_EMC_20 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_21: SW_MUX_CTL_PAD_GPIO_EMC_21

0x68 - SW_MUX_CTL_PAD_GPIO_EMC_21 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_22: SW_MUX_CTL_PAD_GPIO_EMC_22

0x6c - SW_MUX_CTL_PAD_GPIO_EMC_22 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_23: SW_MUX_CTL_PAD_GPIO_EMC_23

0x70 - SW_MUX_CTL_PAD_GPIO_EMC_23 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_24: SW_MUX_CTL_PAD_GPIO_EMC_24

0x74 - SW_MUX_CTL_PAD_GPIO_EMC_24 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_25: SW_MUX_CTL_PAD_GPIO_EMC_25

0x78 - SW_MUX_CTL_PAD_GPIO_EMC_25 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_26: SW_MUX_CTL_PAD_GPIO_EMC_26

0x7c - SW_MUX_CTL_PAD_GPIO_EMC_26 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_27: SW_MUX_CTL_PAD_GPIO_EMC_27

0x80 - SW_MUX_CTL_PAD_GPIO_EMC_27 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_28: SW_MUX_CTL_PAD_GPIO_EMC_28

0x84 - SW_MUX_CTL_PAD_GPIO_EMC_28 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_29: SW_MUX_CTL_PAD_GPIO_EMC_29

0x88 - SW_MUX_CTL_PAD_GPIO_EMC_29 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_30: SW_MUX_CTL_PAD_GPIO_EMC_30

0x8c - SW_MUX_CTL_PAD_GPIO_EMC_30 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_31: SW_MUX_CTL_PAD_GPIO_EMC_31

0x90 - SW_MUX_CTL_PAD_GPIO_EMC_31 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_32: SW_MUX_CTL_PAD_GPIO_EMC_32

0x94 - SW_MUX_CTL_PAD_GPIO_EMC_32 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_33: SW_MUX_CTL_PAD_GPIO_EMC_33

0x98 - SW_MUX_CTL_PAD_GPIO_EMC_33 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_34: SW_MUX_CTL_PAD_GPIO_EMC_34

0x9c - SW_MUX_CTL_PAD_GPIO_EMC_34 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_35: SW_MUX_CTL_PAD_GPIO_EMC_35

0xa0 - SW_MUX_CTL_PAD_GPIO_EMC_35 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_36: SW_MUX_CTL_PAD_GPIO_EMC_36

0xa4 - SW_MUX_CTL_PAD_GPIO_EMC_36 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_37: SW_MUX_CTL_PAD_GPIO_EMC_37

0xa8 - SW_MUX_CTL_PAD_GPIO_EMC_37 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_38: SW_MUX_CTL_PAD_GPIO_EMC_38

0xac - SW_MUX_CTL_PAD_GPIO_EMC_38 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_39: SW_MUX_CTL_PAD_GPIO_EMC_39

0xb0 - SW_MUX_CTL_PAD_GPIO_EMC_39 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_40: SW_MUX_CTL_PAD_GPIO_EMC_40

0xb4 - SW_MUX_CTL_PAD_GPIO_EMC_40 SW MUX Control Register

sw_mux_ctl_pad_gpio_emc_41: SW_MUX_CTL_PAD_GPIO_EMC_41

0xb8 - SW_MUX_CTL_PAD_GPIO_EMC_41 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_00: SW_MUX_CTL_PAD_GPIO_AD_B0_00

0xbc - SW_MUX_CTL_PAD_GPIO_AD_B0_00 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_01: SW_MUX_CTL_PAD_GPIO_AD_B0_01

0xc0 - SW_MUX_CTL_PAD_GPIO_AD_B0_01 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_02: SW_MUX_CTL_PAD_GPIO_AD_B0_02

0xc4 - SW_MUX_CTL_PAD_GPIO_AD_B0_02 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_03: SW_MUX_CTL_PAD_GPIO_AD_B0_03

0xc8 - SW_MUX_CTL_PAD_GPIO_AD_B0_03 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_04: SW_MUX_CTL_PAD_GPIO_AD_B0_04

0xcc - SW_MUX_CTL_PAD_GPIO_AD_B0_04 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_05: SW_MUX_CTL_PAD_GPIO_AD_B0_05

0xd0 - SW_MUX_CTL_PAD_GPIO_AD_B0_05 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_06: SW_MUX_CTL_PAD_GPIO_AD_B0_06

0xd4 - SW_MUX_CTL_PAD_GPIO_AD_B0_06 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_07: SW_MUX_CTL_PAD_GPIO_AD_B0_07

0xd8 - SW_MUX_CTL_PAD_GPIO_AD_B0_07 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_08: SW_MUX_CTL_PAD_GPIO_AD_B0_08

0xdc - SW_MUX_CTL_PAD_GPIO_AD_B0_08 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_09: SW_MUX_CTL_PAD_GPIO_AD_B0_09

0xe0 - SW_MUX_CTL_PAD_GPIO_AD_B0_09 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_10: SW_MUX_CTL_PAD_GPIO_AD_B0_10

0xe4 - SW_MUX_CTL_PAD_GPIO_AD_B0_10 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_11: SW_MUX_CTL_PAD_GPIO_AD_B0_11

0xe8 - SW_MUX_CTL_PAD_GPIO_AD_B0_11 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_12: SW_MUX_CTL_PAD_GPIO_AD_B0_12

0xec - SW_MUX_CTL_PAD_GPIO_AD_B0_12 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_13: SW_MUX_CTL_PAD_GPIO_AD_B0_13

0xf0 - SW_MUX_CTL_PAD_GPIO_AD_B0_13 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_14: SW_MUX_CTL_PAD_GPIO_AD_B0_14

0xf4 - SW_MUX_CTL_PAD_GPIO_AD_B0_14 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b0_15: SW_MUX_CTL_PAD_GPIO_AD_B0_15

0xf8 - SW_MUX_CTL_PAD_GPIO_AD_B0_15 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_00: SW_MUX_CTL_PAD_GPIO_AD_B1_00

0xfc - SW_MUX_CTL_PAD_GPIO_AD_B1_00 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_01: SW_MUX_CTL_PAD_GPIO_AD_B1_01

0x100 - SW_MUX_CTL_PAD_GPIO_AD_B1_01 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_02: SW_MUX_CTL_PAD_GPIO_AD_B1_02

0x104 - SW_MUX_CTL_PAD_GPIO_AD_B1_02 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_03: SW_MUX_CTL_PAD_GPIO_AD_B1_03

0x108 - SW_MUX_CTL_PAD_GPIO_AD_B1_03 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_04: SW_MUX_CTL_PAD_GPIO_AD_B1_04

0x10c - SW_MUX_CTL_PAD_GPIO_AD_B1_04 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_05: SW_MUX_CTL_PAD_GPIO_AD_B1_05

0x110 - SW_MUX_CTL_PAD_GPIO_AD_B1_05 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_06: SW_MUX_CTL_PAD_GPIO_AD_B1_06

0x114 - SW_MUX_CTL_PAD_GPIO_AD_B1_06 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_07: SW_MUX_CTL_PAD_GPIO_AD_B1_07

0x118 - SW_MUX_CTL_PAD_GPIO_AD_B1_07 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_08: SW_MUX_CTL_PAD_GPIO_AD_B1_08

0x11c - SW_MUX_CTL_PAD_GPIO_AD_B1_08 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_09: SW_MUX_CTL_PAD_GPIO_AD_B1_09

0x120 - SW_MUX_CTL_PAD_GPIO_AD_B1_09 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_10: SW_MUX_CTL_PAD_GPIO_AD_B1_10

0x124 - SW_MUX_CTL_PAD_GPIO_AD_B1_10 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_11: SW_MUX_CTL_PAD_GPIO_AD_B1_11

0x128 - SW_MUX_CTL_PAD_GPIO_AD_B1_11 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_12: SW_MUX_CTL_PAD_GPIO_AD_B1_12

0x12c - SW_MUX_CTL_PAD_GPIO_AD_B1_12 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_13: SW_MUX_CTL_PAD_GPIO_AD_B1_13

0x130 - SW_MUX_CTL_PAD_GPIO_AD_B1_13 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_14: SW_MUX_CTL_PAD_GPIO_AD_B1_14

0x134 - SW_MUX_CTL_PAD_GPIO_AD_B1_14 SW MUX Control Register

sw_mux_ctl_pad_gpio_ad_b1_15: SW_MUX_CTL_PAD_GPIO_AD_B1_15

0x138 - SW_MUX_CTL_PAD_GPIO_AD_B1_15 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_00: SW_MUX_CTL_PAD_GPIO_B0_00

0x13c - SW_MUX_CTL_PAD_GPIO_B0_00 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_01: SW_MUX_CTL_PAD_GPIO_B0_01

0x140 - SW_MUX_CTL_PAD_GPIO_B0_01 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_02: SW_MUX_CTL_PAD_GPIO_B0_02

0x144 - SW_MUX_CTL_PAD_GPIO_B0_02 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_03: SW_MUX_CTL_PAD_GPIO_B0_03

0x148 - SW_MUX_CTL_PAD_GPIO_B0_03 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_04: SW_MUX_CTL_PAD_GPIO_B0_04

0x14c - SW_MUX_CTL_PAD_GPIO_B0_04 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_05: SW_MUX_CTL_PAD_GPIO_B0_05

0x150 - SW_MUX_CTL_PAD_GPIO_B0_05 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_06: SW_MUX_CTL_PAD_GPIO_B0_06

0x154 - SW_MUX_CTL_PAD_GPIO_B0_06 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_07: SW_MUX_CTL_PAD_GPIO_B0_07

0x158 - SW_MUX_CTL_PAD_GPIO_B0_07 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_08: SW_MUX_CTL_PAD_GPIO_B0_08

0x15c - SW_MUX_CTL_PAD_GPIO_B0_08 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_09: SW_MUX_CTL_PAD_GPIO_B0_09

0x160 - SW_MUX_CTL_PAD_GPIO_B0_09 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_10: SW_MUX_CTL_PAD_GPIO_B0_10

0x164 - SW_MUX_CTL_PAD_GPIO_B0_10 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_11: SW_MUX_CTL_PAD_GPIO_B0_11

0x168 - SW_MUX_CTL_PAD_GPIO_B0_11 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_12: SW_MUX_CTL_PAD_GPIO_B0_12

0x16c - SW_MUX_CTL_PAD_GPIO_B0_12 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_13: SW_MUX_CTL_PAD_GPIO_B0_13

0x170 - SW_MUX_CTL_PAD_GPIO_B0_13 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_14: SW_MUX_CTL_PAD_GPIO_B0_14

0x174 - SW_MUX_CTL_PAD_GPIO_B0_14 SW MUX Control Register

sw_mux_ctl_pad_gpio_b0_15: SW_MUX_CTL_PAD_GPIO_B0_15

0x178 - SW_MUX_CTL_PAD_GPIO_B0_15 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_00: SW_MUX_CTL_PAD_GPIO_B1_00

0x17c - SW_MUX_CTL_PAD_GPIO_B1_00 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_01: SW_MUX_CTL_PAD_GPIO_B1_01

0x180 - SW_MUX_CTL_PAD_GPIO_B1_01 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_02: SW_MUX_CTL_PAD_GPIO_B1_02

0x184 - SW_MUX_CTL_PAD_GPIO_B1_02 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_03: SW_MUX_CTL_PAD_GPIO_B1_03

0x188 - SW_MUX_CTL_PAD_GPIO_B1_03 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_04: SW_MUX_CTL_PAD_GPIO_B1_04

0x18c - SW_MUX_CTL_PAD_GPIO_B1_04 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_05: SW_MUX_CTL_PAD_GPIO_B1_05

0x190 - SW_MUX_CTL_PAD_GPIO_B1_05 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_06: SW_MUX_CTL_PAD_GPIO_B1_06

0x194 - SW_MUX_CTL_PAD_GPIO_B1_06 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_07: SW_MUX_CTL_PAD_GPIO_B1_07

0x198 - SW_MUX_CTL_PAD_GPIO_B1_07 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_08: SW_MUX_CTL_PAD_GPIO_B1_08

0x19c - SW_MUX_CTL_PAD_GPIO_B1_08 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_09: SW_MUX_CTL_PAD_GPIO_B1_09

0x1a0 - SW_MUX_CTL_PAD_GPIO_B1_09 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_10: SW_MUX_CTL_PAD_GPIO_B1_10

0x1a4 - SW_MUX_CTL_PAD_GPIO_B1_10 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_11: SW_MUX_CTL_PAD_GPIO_B1_11

0x1a8 - SW_MUX_CTL_PAD_GPIO_B1_11 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_12: SW_MUX_CTL_PAD_GPIO_B1_12

0x1ac - SW_MUX_CTL_PAD_GPIO_B1_12 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_13: SW_MUX_CTL_PAD_GPIO_B1_13

0x1b0 - SW_MUX_CTL_PAD_GPIO_B1_13 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_14: SW_MUX_CTL_PAD_GPIO_B1_14

0x1b4 - SW_MUX_CTL_PAD_GPIO_B1_14 SW MUX Control Register

sw_mux_ctl_pad_gpio_b1_15: SW_MUX_CTL_PAD_GPIO_B1_15

0x1b8 - SW_MUX_CTL_PAD_GPIO_B1_15 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b0_00: SW_MUX_CTL_PAD_GPIO_SD_B0_00

0x1bc - SW_MUX_CTL_PAD_GPIO_SD_B0_00 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b0_01: SW_MUX_CTL_PAD_GPIO_SD_B0_01

0x1c0 - SW_MUX_CTL_PAD_GPIO_SD_B0_01 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b0_02: SW_MUX_CTL_PAD_GPIO_SD_B0_02

0x1c4 - SW_MUX_CTL_PAD_GPIO_SD_B0_02 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b0_03: SW_MUX_CTL_PAD_GPIO_SD_B0_03

0x1c8 - SW_MUX_CTL_PAD_GPIO_SD_B0_03 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b0_04: SW_MUX_CTL_PAD_GPIO_SD_B0_04

0x1cc - SW_MUX_CTL_PAD_GPIO_SD_B0_04 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b0_05: SW_MUX_CTL_PAD_GPIO_SD_B0_05

0x1d0 - SW_MUX_CTL_PAD_GPIO_SD_B0_05 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_00: SW_MUX_CTL_PAD_GPIO_SD_B1_00

0x1d4 - SW_MUX_CTL_PAD_GPIO_SD_B1_00 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_01: SW_MUX_CTL_PAD_GPIO_SD_B1_01

0x1d8 - SW_MUX_CTL_PAD_GPIO_SD_B1_01 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_02: SW_MUX_CTL_PAD_GPIO_SD_B1_02

0x1dc - SW_MUX_CTL_PAD_GPIO_SD_B1_02 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_03: SW_MUX_CTL_PAD_GPIO_SD_B1_03

0x1e0 - SW_MUX_CTL_PAD_GPIO_SD_B1_03 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_04: SW_MUX_CTL_PAD_GPIO_SD_B1_04

0x1e4 - SW_MUX_CTL_PAD_GPIO_SD_B1_04 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_05: SW_MUX_CTL_PAD_GPIO_SD_B1_05

0x1e8 - SW_MUX_CTL_PAD_GPIO_SD_B1_05 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_06: SW_MUX_CTL_PAD_GPIO_SD_B1_06

0x1ec - SW_MUX_CTL_PAD_GPIO_SD_B1_06 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_07: SW_MUX_CTL_PAD_GPIO_SD_B1_07

0x1f0 - SW_MUX_CTL_PAD_GPIO_SD_B1_07 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_08: SW_MUX_CTL_PAD_GPIO_SD_B1_08

0x1f4 - SW_MUX_CTL_PAD_GPIO_SD_B1_08 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_09: SW_MUX_CTL_PAD_GPIO_SD_B1_09

0x1f8 - SW_MUX_CTL_PAD_GPIO_SD_B1_09 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_10: SW_MUX_CTL_PAD_GPIO_SD_B1_10

0x1fc - SW_MUX_CTL_PAD_GPIO_SD_B1_10 SW MUX Control Register

sw_mux_ctl_pad_gpio_sd_b1_11: SW_MUX_CTL_PAD_GPIO_SD_B1_11

0x200 - SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW MUX Control Register

sw_pad_ctl_pad_gpio_emc_00: SW_PAD_CTL_PAD_GPIO_EMC_00

0x204 - SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_01: SW_PAD_CTL_PAD_GPIO_EMC_01

0x208 - SW_PAD_CTL_PAD_GPIO_EMC_01 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_02: SW_PAD_CTL_PAD_GPIO_EMC_02

0x20c - SW_PAD_CTL_PAD_GPIO_EMC_02 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_03: SW_PAD_CTL_PAD_GPIO_EMC_03

0x210 - SW_PAD_CTL_PAD_GPIO_EMC_03 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_04: SW_PAD_CTL_PAD_GPIO_EMC_04

0x214 - SW_PAD_CTL_PAD_GPIO_EMC_04 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_05: SW_PAD_CTL_PAD_GPIO_EMC_05

0x218 - SW_PAD_CTL_PAD_GPIO_EMC_05 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_06: SW_PAD_CTL_PAD_GPIO_EMC_06

0x21c - SW_PAD_CTL_PAD_GPIO_EMC_06 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_07: SW_PAD_CTL_PAD_GPIO_EMC_07

0x220 - SW_PAD_CTL_PAD_GPIO_EMC_07 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_08: SW_PAD_CTL_PAD_GPIO_EMC_08

0x224 - SW_PAD_CTL_PAD_GPIO_EMC_08 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_09: SW_PAD_CTL_PAD_GPIO_EMC_09

0x228 - SW_PAD_CTL_PAD_GPIO_EMC_09 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_10: SW_PAD_CTL_PAD_GPIO_EMC_10

0x22c - SW_PAD_CTL_PAD_GPIO_EMC_10 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_11: SW_PAD_CTL_PAD_GPIO_EMC_11

0x230 - SW_PAD_CTL_PAD_GPIO_EMC_11 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_12: SW_PAD_CTL_PAD_GPIO_EMC_12

0x234 - SW_PAD_CTL_PAD_GPIO_EMC_12 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_13: SW_PAD_CTL_PAD_GPIO_EMC_13

0x238 - SW_PAD_CTL_PAD_GPIO_EMC_13 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_14: SW_PAD_CTL_PAD_GPIO_EMC_14

0x23c - SW_PAD_CTL_PAD_GPIO_EMC_14 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_15: SW_PAD_CTL_PAD_GPIO_EMC_15

0x240 - SW_PAD_CTL_PAD_GPIO_EMC_15 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_16: SW_PAD_CTL_PAD_GPIO_EMC_16

0x244 - SW_PAD_CTL_PAD_GPIO_EMC_16 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_17: SW_PAD_CTL_PAD_GPIO_EMC_17

0x248 - SW_PAD_CTL_PAD_GPIO_EMC_17 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_18: SW_PAD_CTL_PAD_GPIO_EMC_18

0x24c - SW_PAD_CTL_PAD_GPIO_EMC_18 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_19: SW_PAD_CTL_PAD_GPIO_EMC_19

0x250 - SW_PAD_CTL_PAD_GPIO_EMC_19 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_20: SW_PAD_CTL_PAD_GPIO_EMC_20

0x254 - SW_PAD_CTL_PAD_GPIO_EMC_20 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_21: SW_PAD_CTL_PAD_GPIO_EMC_21

0x258 - SW_PAD_CTL_PAD_GPIO_EMC_21 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_22: SW_PAD_CTL_PAD_GPIO_EMC_22

0x25c - SW_PAD_CTL_PAD_GPIO_EMC_22 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_23: SW_PAD_CTL_PAD_GPIO_EMC_23

0x260 - SW_PAD_CTL_PAD_GPIO_EMC_23 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_24: SW_PAD_CTL_PAD_GPIO_EMC_24

0x264 - SW_PAD_CTL_PAD_GPIO_EMC_24 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_25: SW_PAD_CTL_PAD_GPIO_EMC_25

0x268 - SW_PAD_CTL_PAD_GPIO_EMC_25 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_26: SW_PAD_CTL_PAD_GPIO_EMC_26

0x26c - SW_PAD_CTL_PAD_GPIO_EMC_26 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_27: SW_PAD_CTL_PAD_GPIO_EMC_27

0x270 - SW_PAD_CTL_PAD_GPIO_EMC_27 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_28: SW_PAD_CTL_PAD_GPIO_EMC_28

0x274 - SW_PAD_CTL_PAD_GPIO_EMC_28 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_29: SW_PAD_CTL_PAD_GPIO_EMC_29

0x278 - SW_PAD_CTL_PAD_GPIO_EMC_29 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_30: SW_PAD_CTL_PAD_GPIO_EMC_30

0x27c - SW_PAD_CTL_PAD_GPIO_EMC_30 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_31: SW_PAD_CTL_PAD_GPIO_EMC_31

0x280 - SW_PAD_CTL_PAD_GPIO_EMC_31 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_32: SW_PAD_CTL_PAD_GPIO_EMC_32

0x284 - SW_PAD_CTL_PAD_GPIO_EMC_32 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_33: SW_PAD_CTL_PAD_GPIO_EMC_33

0x288 - SW_PAD_CTL_PAD_GPIO_EMC_33 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_34: SW_PAD_CTL_PAD_GPIO_EMC_34

0x28c - SW_PAD_CTL_PAD_GPIO_EMC_34 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_35: SW_PAD_CTL_PAD_GPIO_EMC_35

0x290 - SW_PAD_CTL_PAD_GPIO_EMC_35 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_36: SW_PAD_CTL_PAD_GPIO_EMC_36

0x294 - SW_PAD_CTL_PAD_GPIO_EMC_36 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_37: SW_PAD_CTL_PAD_GPIO_EMC_37

0x298 - SW_PAD_CTL_PAD_GPIO_EMC_37 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_38: SW_PAD_CTL_PAD_GPIO_EMC_38

0x29c - SW_PAD_CTL_PAD_GPIO_EMC_38 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_39: SW_PAD_CTL_PAD_GPIO_EMC_39

0x2a0 - SW_PAD_CTL_PAD_GPIO_EMC_39 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_40: SW_PAD_CTL_PAD_GPIO_EMC_40

0x2a4 - SW_PAD_CTL_PAD_GPIO_EMC_40 SW PAD Control Register

sw_pad_ctl_pad_gpio_emc_41: SW_PAD_CTL_PAD_GPIO_EMC_41

0x2a8 - SW_PAD_CTL_PAD_GPIO_EMC_41 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_00: SW_PAD_CTL_PAD_GPIO_AD_B0_00

0x2ac - SW_PAD_CTL_PAD_GPIO_AD_B0_00 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_01: SW_PAD_CTL_PAD_GPIO_AD_B0_01

0x2b0 - SW_PAD_CTL_PAD_GPIO_AD_B0_01 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_02: SW_PAD_CTL_PAD_GPIO_AD_B0_02

0x2b4 - SW_PAD_CTL_PAD_GPIO_AD_B0_02 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_03: SW_PAD_CTL_PAD_GPIO_AD_B0_03

0x2b8 - SW_PAD_CTL_PAD_GPIO_AD_B0_03 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_04: SW_PAD_CTL_PAD_GPIO_AD_B0_04

0x2bc - SW_PAD_CTL_PAD_GPIO_AD_B0_04 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_05: SW_PAD_CTL_PAD_GPIO_AD_B0_05

0x2c0 - SW_PAD_CTL_PAD_GPIO_AD_B0_05 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_06: SW_PAD_CTL_PAD_GPIO_AD_B0_06

0x2c4 - SW_PAD_CTL_PAD_GPIO_AD_B0_06 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_07: SW_PAD_CTL_PAD_GPIO_AD_B0_07

0x2c8 - SW_PAD_CTL_PAD_GPIO_AD_B0_07 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_08: SW_PAD_CTL_PAD_GPIO_AD_B0_08

0x2cc - SW_PAD_CTL_PAD_GPIO_AD_B0_08 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_09: SW_PAD_CTL_PAD_GPIO_AD_B0_09

0x2d0 - SW_PAD_CTL_PAD_GPIO_AD_B0_09 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_10: SW_PAD_CTL_PAD_GPIO_AD_B0_10

0x2d4 - SW_PAD_CTL_PAD_GPIO_AD_B0_10 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_11: SW_PAD_CTL_PAD_GPIO_AD_B0_11

0x2d8 - SW_PAD_CTL_PAD_GPIO_AD_B0_11 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_12: SW_PAD_CTL_PAD_GPIO_AD_B0_12

0x2dc - SW_PAD_CTL_PAD_GPIO_AD_B0_12 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_13: SW_PAD_CTL_PAD_GPIO_AD_B0_13

0x2e0 - SW_PAD_CTL_PAD_GPIO_AD_B0_13 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_14: SW_PAD_CTL_PAD_GPIO_AD_B0_14

0x2e4 - SW_PAD_CTL_PAD_GPIO_AD_B0_14 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b0_15: SW_PAD_CTL_PAD_GPIO_AD_B0_15

0x2e8 - SW_PAD_CTL_PAD_GPIO_AD_B0_15 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_00: SW_PAD_CTL_PAD_GPIO_AD_B1_00

0x2ec - SW_PAD_CTL_PAD_GPIO_AD_B1_00 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_01: SW_PAD_CTL_PAD_GPIO_AD_B1_01

0x2f0 - SW_PAD_CTL_PAD_GPIO_AD_B1_01 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_02: SW_PAD_CTL_PAD_GPIO_AD_B1_02

0x2f4 - SW_PAD_CTL_PAD_GPIO_AD_B1_02 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_03: SW_PAD_CTL_PAD_GPIO_AD_B1_03

0x2f8 - SW_PAD_CTL_PAD_GPIO_AD_B1_03 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_04: SW_PAD_CTL_PAD_GPIO_AD_B1_04

0x2fc - SW_PAD_CTL_PAD_GPIO_AD_B1_04 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_05: SW_PAD_CTL_PAD_GPIO_AD_B1_05

0x300 - SW_PAD_CTL_PAD_GPIO_AD_B1_05 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_06: SW_PAD_CTL_PAD_GPIO_AD_B1_06

0x304 - SW_PAD_CTL_PAD_GPIO_AD_B1_06 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_07: SW_PAD_CTL_PAD_GPIO_AD_B1_07

0x308 - SW_PAD_CTL_PAD_GPIO_AD_B1_07 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_08: SW_PAD_CTL_PAD_GPIO_AD_B1_08

0x30c - SW_PAD_CTL_PAD_GPIO_AD_B1_08 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_09: SW_PAD_CTL_PAD_GPIO_AD_B1_09

0x310 - SW_PAD_CTL_PAD_GPIO_AD_B1_09 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_10: SW_PAD_CTL_PAD_GPIO_AD_B1_10

0x314 - SW_PAD_CTL_PAD_GPIO_AD_B1_10 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_11: SW_PAD_CTL_PAD_GPIO_AD_B1_11

0x318 - SW_PAD_CTL_PAD_GPIO_AD_B1_11 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_12: SW_PAD_CTL_PAD_GPIO_AD_B1_12

0x31c - SW_PAD_CTL_PAD_GPIO_AD_B1_12 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_13: SW_PAD_CTL_PAD_GPIO_AD_B1_13

0x320 - SW_PAD_CTL_PAD_GPIO_AD_B1_13 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_14: SW_PAD_CTL_PAD_GPIO_AD_B1_14

0x324 - SW_PAD_CTL_PAD_GPIO_AD_B1_14 SW PAD Control Register

sw_pad_ctl_pad_gpio_ad_b1_15: SW_PAD_CTL_PAD_GPIO_AD_B1_15

0x328 - SW_PAD_CTL_PAD_GPIO_AD_B1_15 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_00: SW_PAD_CTL_PAD_GPIO_B0_00

0x32c - SW_PAD_CTL_PAD_GPIO_B0_00 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_01: SW_PAD_CTL_PAD_GPIO_B0_01

0x330 - SW_PAD_CTL_PAD_GPIO_B0_01 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_02: SW_PAD_CTL_PAD_GPIO_B0_02

0x334 - SW_PAD_CTL_PAD_GPIO_B0_02 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_03: SW_PAD_CTL_PAD_GPIO_B0_03

0x338 - SW_PAD_CTL_PAD_GPIO_B0_03 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_04: SW_PAD_CTL_PAD_GPIO_B0_04

0x33c - SW_PAD_CTL_PAD_GPIO_B0_04 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_05: SW_PAD_CTL_PAD_GPIO_B0_05

0x340 - SW_PAD_CTL_PAD_GPIO_B0_05 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_06: SW_PAD_CTL_PAD_GPIO_B0_06

0x344 - SW_PAD_CTL_PAD_GPIO_B0_06 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_07: SW_PAD_CTL_PAD_GPIO_B0_07

0x348 - SW_PAD_CTL_PAD_GPIO_B0_07 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_08: SW_PAD_CTL_PAD_GPIO_B0_08

0x34c - SW_PAD_CTL_PAD_GPIO_B0_08 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_09: SW_PAD_CTL_PAD_GPIO_B0_09

0x350 - SW_PAD_CTL_PAD_GPIO_B0_09 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_10: SW_PAD_CTL_PAD_GPIO_B0_10

0x354 - SW_PAD_CTL_PAD_GPIO_B0_10 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_11: SW_PAD_CTL_PAD_GPIO_B0_11

0x358 - SW_PAD_CTL_PAD_GPIO_B0_11 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_12: SW_PAD_CTL_PAD_GPIO_B0_12

0x35c - SW_PAD_CTL_PAD_GPIO_B0_12 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_13: SW_PAD_CTL_PAD_GPIO_B0_13

0x360 - SW_PAD_CTL_PAD_GPIO_B0_13 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_14: SW_PAD_CTL_PAD_GPIO_B0_14

0x364 - SW_PAD_CTL_PAD_GPIO_B0_14 SW PAD Control Register

sw_pad_ctl_pad_gpio_b0_15: SW_PAD_CTL_PAD_GPIO_B0_15

0x368 - SW_PAD_CTL_PAD_GPIO_B0_15 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_00: SW_PAD_CTL_PAD_GPIO_B1_00

0x36c - SW_PAD_CTL_PAD_GPIO_B1_00 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_01: SW_PAD_CTL_PAD_GPIO_B1_01

0x370 - SW_PAD_CTL_PAD_GPIO_B1_01 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_02: SW_PAD_CTL_PAD_GPIO_B1_02

0x374 - SW_PAD_CTL_PAD_GPIO_B1_02 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_03: SW_PAD_CTL_PAD_GPIO_B1_03

0x378 - SW_PAD_CTL_PAD_GPIO_B1_03 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_04: SW_PAD_CTL_PAD_GPIO_B1_04

0x37c - SW_PAD_CTL_PAD_GPIO_B1_04 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_05: SW_PAD_CTL_PAD_GPIO_B1_05

0x380 - SW_PAD_CTL_PAD_GPIO_B1_05 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_06: SW_PAD_CTL_PAD_GPIO_B1_06

0x384 - SW_PAD_CTL_PAD_GPIO_B1_06 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_07: SW_PAD_CTL_PAD_GPIO_B1_07

0x388 - SW_PAD_CTL_PAD_GPIO_B1_07 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_08: SW_PAD_CTL_PAD_GPIO_B1_08

0x38c - SW_PAD_CTL_PAD_GPIO_B1_08 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_09: SW_PAD_CTL_PAD_GPIO_B1_09

0x390 - SW_PAD_CTL_PAD_GPIO_B1_09 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_10: SW_PAD_CTL_PAD_GPIO_B1_10

0x394 - SW_PAD_CTL_PAD_GPIO_B1_10 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_11: SW_PAD_CTL_PAD_GPIO_B1_11

0x398 - SW_PAD_CTL_PAD_GPIO_B1_11 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_12: SW_PAD_CTL_PAD_GPIO_B1_12

0x39c - SW_PAD_CTL_PAD_GPIO_B1_12 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_13: SW_PAD_CTL_PAD_GPIO_B1_13

0x3a0 - SW_PAD_CTL_PAD_GPIO_B1_13 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_14: SW_PAD_CTL_PAD_GPIO_B1_14

0x3a4 - SW_PAD_CTL_PAD_GPIO_B1_14 SW PAD Control Register

sw_pad_ctl_pad_gpio_b1_15: SW_PAD_CTL_PAD_GPIO_B1_15

0x3a8 - SW_PAD_CTL_PAD_GPIO_B1_15 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b0_00: SW_PAD_CTL_PAD_GPIO_SD_B0_00

0x3ac - SW_PAD_CTL_PAD_GPIO_SD_B0_00 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b0_01: SW_PAD_CTL_PAD_GPIO_SD_B0_01

0x3b0 - SW_PAD_CTL_PAD_GPIO_SD_B0_01 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b0_02: SW_PAD_CTL_PAD_GPIO_SD_B0_02

0x3b4 - SW_PAD_CTL_PAD_GPIO_SD_B0_02 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b0_03: SW_PAD_CTL_PAD_GPIO_SD_B0_03

0x3b8 - SW_PAD_CTL_PAD_GPIO_SD_B0_03 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b0_04: SW_PAD_CTL_PAD_GPIO_SD_B0_04

0x3bc - SW_PAD_CTL_PAD_GPIO_SD_B0_04 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b0_05: SW_PAD_CTL_PAD_GPIO_SD_B0_05

0x3c0 - SW_PAD_CTL_PAD_GPIO_SD_B0_05 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_00: SW_PAD_CTL_PAD_GPIO_SD_B1_00

0x3c4 - SW_PAD_CTL_PAD_GPIO_SD_B1_00 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_01: SW_PAD_CTL_PAD_GPIO_SD_B1_01

0x3c8 - SW_PAD_CTL_PAD_GPIO_SD_B1_01 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_02: SW_PAD_CTL_PAD_GPIO_SD_B1_02

0x3cc - SW_PAD_CTL_PAD_GPIO_SD_B1_02 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_03: SW_PAD_CTL_PAD_GPIO_SD_B1_03

0x3d0 - SW_PAD_CTL_PAD_GPIO_SD_B1_03 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_04: SW_PAD_CTL_PAD_GPIO_SD_B1_04

0x3d4 - SW_PAD_CTL_PAD_GPIO_SD_B1_04 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_05: SW_PAD_CTL_PAD_GPIO_SD_B1_05

0x3d8 - SW_PAD_CTL_PAD_GPIO_SD_B1_05 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_06: SW_PAD_CTL_PAD_GPIO_SD_B1_06

0x3dc - SW_PAD_CTL_PAD_GPIO_SD_B1_06 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_07: SW_PAD_CTL_PAD_GPIO_SD_B1_07

0x3e0 - SW_PAD_CTL_PAD_GPIO_SD_B1_07 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_08: SW_PAD_CTL_PAD_GPIO_SD_B1_08

0x3e4 - SW_PAD_CTL_PAD_GPIO_SD_B1_08 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_09: SW_PAD_CTL_PAD_GPIO_SD_B1_09

0x3e8 - SW_PAD_CTL_PAD_GPIO_SD_B1_09 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_10: SW_PAD_CTL_PAD_GPIO_SD_B1_10

0x3ec - SW_PAD_CTL_PAD_GPIO_SD_B1_10 SW PAD Control Register

sw_pad_ctl_pad_gpio_sd_b1_11: SW_PAD_CTL_PAD_GPIO_SD_B1_11

0x3f0 - SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW PAD Control Register

anatop_usb_otg1_id_select_input: ANATOP_USB_OTG1_ID_SELECT_INPUT

0x3f4 - ANATOP_USB_OTG1_ID_SELECT_INPUT DAISY Register

anatop_usb_otg2_id_select_input: ANATOP_USB_OTG2_ID_SELECT_INPUT

0x3f8 - ANATOP_USB_OTG2_ID_SELECT_INPUT DAISY Register

ccm_pmic_ready_select_input: CCM_PMIC_READY_SELECT_INPUT

0x3fc - CCM_PMIC_READY_SELECT_INPUT DAISY Register

csi_data02_select_input: CSI_DATA02_SELECT_INPUT

0x400 - CSI_DATA02_SELECT_INPUT DAISY Register

csi_data03_select_input: CSI_DATA03_SELECT_INPUT

0x404 - CSI_DATA03_SELECT_INPUT DAISY Register

csi_data04_select_input: CSI_DATA04_SELECT_INPUT

0x408 - CSI_DATA04_SELECT_INPUT DAISY Register

csi_data05_select_input: CSI_DATA05_SELECT_INPUT

0x40c - CSI_DATA05_SELECT_INPUT DAISY Register

csi_data06_select_input: CSI_DATA06_SELECT_INPUT

0x410 - CSI_DATA06_SELECT_INPUT DAISY Register

csi_data07_select_input: CSI_DATA07_SELECT_INPUT

0x414 - CSI_DATA07_SELECT_INPUT DAISY Register

csi_data08_select_input: CSI_DATA08_SELECT_INPUT

0x418 - CSI_DATA08_SELECT_INPUT DAISY Register

csi_data09_select_input: CSI_DATA09_SELECT_INPUT

0x41c - CSI_DATA09_SELECT_INPUT DAISY Register

csi_hsync_select_input: CSI_HSYNC_SELECT_INPUT

0x420 - CSI_HSYNC_SELECT_INPUT DAISY Register

csi_pixclk_select_input: CSI_PIXCLK_SELECT_INPUT

0x424 - CSI_PIXCLK_SELECT_INPUT DAISY Register

csi_vsync_select_input: CSI_VSYNC_SELECT_INPUT

0x428 - CSI_VSYNC_SELECT_INPUT DAISY Register

enet_ipg_clk_rmii_select_input: ENET_IPG_CLK_RMII_SELECT_INPUT

0x42c - ENET_IPG_CLK_RMII_SELECT_INPUT DAISY Register

enet_mdio_select_input: ENET_MDIO_SELECT_INPUT

0x430 - ENET_MDIO_SELECT_INPUT DAISY Register

enet0_rxdata_select_input: ENET0_RXDATA_SELECT_INPUT

0x434 - ENET0_RXDATA_SELECT_INPUT DAISY Register

enet1_rxdata_select_input: ENET1_RXDATA_SELECT_INPUT

0x438 - ENET1_RXDATA_SELECT_INPUT DAISY Register

enet_rxen_select_input: ENET_RXEN_SELECT_INPUT

0x43c - ENET_RXEN_SELECT_INPUT DAISY Register

enet_rxerr_select_input: ENET_RXERR_SELECT_INPUT

0x440 - ENET_RXERR_SELECT_INPUT DAISY Register

enet0_timer_select_input: ENET0_TIMER_SELECT_INPUT

0x444 - ENET0_TIMER_SELECT_INPUT DAISY Register

enet_txclk_select_input: ENET_TXCLK_SELECT_INPUT

0x448 - ENET_TXCLK_SELECT_INPUT DAISY Register

flexcan1_rx_select_input: FLEXCAN1_RX_SELECT_INPUT

0x44c - FLEXCAN1_RX_SELECT_INPUT DAISY Register

flexcan2_rx_select_input: FLEXCAN2_RX_SELECT_INPUT

0x450 - FLEXCAN2_RX_SELECT_INPUT DAISY Register

flexpwm1_pwma3_select_input: FLEXPWM1_PWMA3_SELECT_INPUT

0x454 - FLEXPWM1_PWMA3_SELECT_INPUT DAISY Register

flexpwm1_pwma0_select_input: FLEXPWM1_PWMA0_SELECT_INPUT

0x458 - FLEXPWM1_PWMA0_SELECT_INPUT DAISY Register

flexpwm1_pwma1_select_input: FLEXPWM1_PWMA1_SELECT_INPUT

0x45c - FLEXPWM1_PWMA1_SELECT_INPUT DAISY Register

flexpwm1_pwma2_select_input: FLEXPWM1_PWMA2_SELECT_INPUT

0x460 - FLEXPWM1_PWMA2_SELECT_INPUT DAISY Register

flexpwm1_pwmb3_select_input: FLEXPWM1_PWMB3_SELECT_INPUT

0x464 - FLEXPWM1_PWMB3_SELECT_INPUT DAISY Register

flexpwm1_pwmb0_select_input: FLEXPWM1_PWMB0_SELECT_INPUT

0x468 - FLEXPWM1_PWMB0_SELECT_INPUT DAISY Register

flexpwm1_pwmb1_select_input: FLEXPWM1_PWMB1_SELECT_INPUT

0x46c - FLEXPWM1_PWMB1_SELECT_INPUT DAISY Register

flexpwm1_pwmb2_select_input: FLEXPWM1_PWMB2_SELECT_INPUT

0x470 - FLEXPWM1_PWMB2_SELECT_INPUT DAISY Register

flexpwm2_pwma3_select_input: FLEXPWM2_PWMA3_SELECT_INPUT

0x474 - FLEXPWM2_PWMA3_SELECT_INPUT DAISY Register

flexpwm2_pwma0_select_input: FLEXPWM2_PWMA0_SELECT_INPUT

0x478 - FLEXPWM2_PWMA0_SELECT_INPUT DAISY Register

flexpwm2_pwma1_select_input: FLEXPWM2_PWMA1_SELECT_INPUT

0x47c - FLEXPWM2_PWMA1_SELECT_INPUT DAISY Register

flexpwm2_pwma2_select_input: FLEXPWM2_PWMA2_SELECT_INPUT

0x480 - FLEXPWM2_PWMA2_SELECT_INPUT DAISY Register

flexpwm2_pwmb3_select_input: FLEXPWM2_PWMB3_SELECT_INPUT

0x484 - FLEXPWM2_PWMB3_SELECT_INPUT DAISY Register

flexpwm2_pwmb0_select_input: FLEXPWM2_PWMB0_SELECT_INPUT

0x488 - FLEXPWM2_PWMB0_SELECT_INPUT DAISY Register

flexpwm2_pwmb1_select_input: FLEXPWM2_PWMB1_SELECT_INPUT

0x48c - FLEXPWM2_PWMB1_SELECT_INPUT DAISY Register

flexpwm2_pwmb2_select_input: FLEXPWM2_PWMB2_SELECT_INPUT

0x490 - FLEXPWM2_PWMB2_SELECT_INPUT DAISY Register

flexpwm4_pwma0_select_input: FLEXPWM4_PWMA0_SELECT_INPUT

0x494 - FLEXPWM4_PWMA0_SELECT_INPUT DAISY Register

flexpwm4_pwma1_select_input: FLEXPWM4_PWMA1_SELECT_INPUT

0x498 - FLEXPWM4_PWMA1_SELECT_INPUT DAISY Register

flexpwm4_pwma2_select_input: FLEXPWM4_PWMA2_SELECT_INPUT

0x49c - FLEXPWM4_PWMA2_SELECT_INPUT DAISY Register

flexpwm4_pwma3_select_input: FLEXPWM4_PWMA3_SELECT_INPUT

0x4a0 - FLEXPWM4_PWMA3_SELECT_INPUT DAISY Register

flexspia_dqs_select_input: FLEXSPIA_DQS_SELECT_INPUT

0x4a4 - FLEXSPIA_DQS_SELECT_INPUT DAISY Register

flexspia_data0_select_input: FLEXSPIA_DATA0_SELECT_INPUT

0x4a8 - FLEXSPIA_DATA0_SELECT_INPUT DAISY Register

flexspia_data1_select_input: FLEXSPIA_DATA1_SELECT_INPUT

0x4ac - FLEXSPIA_DATA1_SELECT_INPUT DAISY Register

flexspia_data2_select_input: FLEXSPIA_DATA2_SELECT_INPUT

0x4b0 - FLEXSPIA_DATA2_SELECT_INPUT DAISY Register

flexspia_data3_select_input: FLEXSPIA_DATA3_SELECT_INPUT

0x4b4 - FLEXSPIA_DATA3_SELECT_INPUT DAISY Register

flexspib_data0_select_input: FLEXSPIB_DATA0_SELECT_INPUT

0x4b8 - FLEXSPIB_DATA0_SELECT_INPUT DAISY Register

flexspib_data1_select_input: FLEXSPIB_DATA1_SELECT_INPUT

0x4bc - FLEXSPIB_DATA1_SELECT_INPUT DAISY Register

flexspib_data2_select_input: FLEXSPIB_DATA2_SELECT_INPUT

0x4c0 - FLEXSPIB_DATA2_SELECT_INPUT DAISY Register

flexspib_data3_select_input: FLEXSPIB_DATA3_SELECT_INPUT

0x4c4 - FLEXSPIB_DATA3_SELECT_INPUT DAISY Register

flexspia_sck_select_input: FLEXSPIA_SCK_SELECT_INPUT

0x4c8 - FLEXSPIA_SCK_SELECT_INPUT DAISY Register

lpi2c1_scl_select_input: LPI2C1_SCL_SELECT_INPUT

0x4cc - LPI2C1_SCL_SELECT_INPUT DAISY Register

lpi2c1_sda_select_input: LPI2C1_SDA_SELECT_INPUT

0x4d0 - LPI2C1_SDA_SELECT_INPUT DAISY Register

lpi2c2_scl_select_input: LPI2C2_SCL_SELECT_INPUT

0x4d4 - LPI2C2_SCL_SELECT_INPUT DAISY Register

lpi2c2_sda_select_input: LPI2C2_SDA_SELECT_INPUT

0x4d8 - LPI2C2_SDA_SELECT_INPUT DAISY Register

lpi2c3_scl_select_input: LPI2C3_SCL_SELECT_INPUT

0x4dc - LPI2C3_SCL_SELECT_INPUT DAISY Register

lpi2c3_sda_select_input: LPI2C3_SDA_SELECT_INPUT

0x4e0 - LPI2C3_SDA_SELECT_INPUT DAISY Register

lpi2c4_scl_select_input: LPI2C4_SCL_SELECT_INPUT

0x4e4 - LPI2C4_SCL_SELECT_INPUT DAISY Register

lpi2c4_sda_select_input: LPI2C4_SDA_SELECT_INPUT

0x4e8 - LPI2C4_SDA_SELECT_INPUT DAISY Register

lpspi1_pcs0_select_input: LPSPI1_PCS0_SELECT_INPUT

0x4ec - LPSPI1_PCS0_SELECT_INPUT DAISY Register

lpspi1_sck_select_input: LPSPI1_SCK_SELECT_INPUT

0x4f0 - LPSPI1_SCK_SELECT_INPUT DAISY Register

lpspi1_sdi_select_input: LPSPI1_SDI_SELECT_INPUT

0x4f4 - LPSPI1_SDI_SELECT_INPUT DAISY Register

lpspi1_sdo_select_input: LPSPI1_SDO_SELECT_INPUT

0x4f8 - LPSPI1_SDO_SELECT_INPUT DAISY Register

lpspi2_pcs0_select_input: LPSPI2_PCS0_SELECT_INPUT

0x4fc - LPSPI2_PCS0_SELECT_INPUT DAISY Register

lpspi2_sck_select_input: LPSPI2_SCK_SELECT_INPUT

0x500 - LPSPI2_SCK_SELECT_INPUT DAISY Register

lpspi2_sdi_select_input: LPSPI2_SDI_SELECT_INPUT

0x504 - LPSPI2_SDI_SELECT_INPUT DAISY Register

lpspi2_sdo_select_input: LPSPI2_SDO_SELECT_INPUT

0x508 - LPSPI2_SDO_SELECT_INPUT DAISY Register

lpspi3_pcs0_select_input: LPSPI3_PCS0_SELECT_INPUT

0x50c - LPSPI3_PCS0_SELECT_INPUT DAISY Register

lpspi3_sck_select_input: LPSPI3_SCK_SELECT_INPUT

0x510 - LPSPI3_SCK_SELECT_INPUT DAISY Register

lpspi3_sdi_select_input: LPSPI3_SDI_SELECT_INPUT

0x514 - LPSPI3_SDI_SELECT_INPUT DAISY Register

lpspi3_sdo_select_input: LPSPI3_SDO_SELECT_INPUT

0x518 - LPSPI3_SDO_SELECT_INPUT DAISY Register

lpspi4_pcs0_select_input: LPSPI4_PCS0_SELECT_INPUT

0x51c - LPSPI4_PCS0_SELECT_INPUT DAISY Register

lpspi4_sck_select_input: LPSPI4_SCK_SELECT_INPUT

0x520 - LPSPI4_SCK_SELECT_INPUT DAISY Register

lpspi4_sdi_select_input: LPSPI4_SDI_SELECT_INPUT

0x524 - LPSPI4_SDI_SELECT_INPUT DAISY Register

lpspi4_sdo_select_input: LPSPI4_SDO_SELECT_INPUT

0x528 - LPSPI4_SDO_SELECT_INPUT DAISY Register

lpuart2_rx_select_input: LPUART2_RX_SELECT_INPUT

0x52c - LPUART2_RX_SELECT_INPUT DAISY Register

lpuart2_tx_select_input: LPUART2_TX_SELECT_INPUT

0x530 - LPUART2_TX_SELECT_INPUT DAISY Register

lpuart3_cts_b_select_input: LPUART3_CTS_B_SELECT_INPUT

0x534 - LPUART3_CTS_B_SELECT_INPUT DAISY Register

lpuart3_rx_select_input: LPUART3_RX_SELECT_INPUT

0x538 - LPUART3_RX_SELECT_INPUT DAISY Register

lpuart3_tx_select_input: LPUART3_TX_SELECT_INPUT

0x53c - LPUART3_TX_SELECT_INPUT DAISY Register

lpuart4_rx_select_input: LPUART4_RX_SELECT_INPUT

0x540 - LPUART4_RX_SELECT_INPUT DAISY Register

lpuart4_tx_select_input: LPUART4_TX_SELECT_INPUT

0x544 - LPUART4_TX_SELECT_INPUT DAISY Register

lpuart5_rx_select_input: LPUART5_RX_SELECT_INPUT

0x548 - LPUART5_RX_SELECT_INPUT DAISY Register

lpuart5_tx_select_input: LPUART5_TX_SELECT_INPUT

0x54c - LPUART5_TX_SELECT_INPUT DAISY Register

lpuart6_rx_select_input: LPUART6_RX_SELECT_INPUT

0x550 - LPUART6_RX_SELECT_INPUT DAISY Register

lpuart6_tx_select_input: LPUART6_TX_SELECT_INPUT

0x554 - LPUART6_TX_SELECT_INPUT DAISY Register

lpuart7_rx_select_input: LPUART7_RX_SELECT_INPUT

0x558 - LPUART7_RX_SELECT_INPUT DAISY Register

lpuart7_tx_select_input: LPUART7_TX_SELECT_INPUT

0x55c - LPUART7_TX_SELECT_INPUT DAISY Register

lpuart8_rx_select_input: LPUART8_RX_SELECT_INPUT

0x560 - LPUART8_RX_SELECT_INPUT DAISY Register

lpuart8_tx_select_input: LPUART8_TX_SELECT_INPUT

0x564 - LPUART8_TX_SELECT_INPUT DAISY Register

nmi_select_input: NMI_SELECT_INPUT

0x568 - NMI_GLUE_NMI_SELECT_INPUT DAISY Register

qtimer2_timer0_select_input: QTIMER2_TIMER0_SELECT_INPUT

0x56c - QTIMER2_TIMER0_SELECT_INPUT DAISY Register

qtimer2_timer1_select_input: QTIMER2_TIMER1_SELECT_INPUT

0x570 - QTIMER2_TIMER1_SELECT_INPUT DAISY Register

qtimer2_timer2_select_input: QTIMER2_TIMER2_SELECT_INPUT

0x574 - QTIMER2_TIMER2_SELECT_INPUT DAISY Register

qtimer2_timer3_select_input: QTIMER2_TIMER3_SELECT_INPUT

0x578 - QTIMER2_TIMER3_SELECT_INPUT DAISY Register

qtimer3_timer0_select_input: QTIMER3_TIMER0_SELECT_INPUT

0x57c - QTIMER3_TIMER0_SELECT_INPUT DAISY Register

qtimer3_timer1_select_input: QTIMER3_TIMER1_SELECT_INPUT

0x580 - QTIMER3_TIMER1_SELECT_INPUT DAISY Register

qtimer3_timer2_select_input: QTIMER3_TIMER2_SELECT_INPUT

0x584 - QTIMER3_TIMER2_SELECT_INPUT DAISY Register

qtimer3_timer3_select_input: QTIMER3_TIMER3_SELECT_INPUT

0x588 - QTIMER3_TIMER3_SELECT_INPUT DAISY Register

sai1_mclk2_select_input: SAI1_MCLK2_SELECT_INPUT

0x58c - SAI1_MCLK2_SELECT_INPUT DAISY Register

sai1_rx_bclk_select_input: SAI1_RX_BCLK_SELECT_INPUT

0x590 - SAI1_RX_BCLK_SELECT_INPUT DAISY Register

sai1_rx_data0_select_input: SAI1_RX_DATA0_SELECT_INPUT

0x594 - SAI1_RX_DATA0_SELECT_INPUT DAISY Register

sai1_rx_data1_select_input: SAI1_RX_DATA1_SELECT_INPUT

0x598 - SAI1_RX_DATA1_SELECT_INPUT DAISY Register

sai1_rx_data2_select_input: SAI1_RX_DATA2_SELECT_INPUT

0x59c - SAI1_RX_DATA2_SELECT_INPUT DAISY Register

sai1_rx_data3_select_input: SAI1_RX_DATA3_SELECT_INPUT

0x5a0 - SAI1_RX_DATA3_SELECT_INPUT DAISY Register

sai1_rx_sync_select_input: SAI1_RX_SYNC_SELECT_INPUT

0x5a4 - SAI1_RX_SYNC_SELECT_INPUT DAISY Register

sai1_tx_bclk_select_input: SAI1_TX_BCLK_SELECT_INPUT

0x5a8 - SAI1_TX_BCLK_SELECT_INPUT DAISY Register

sai1_tx_sync_select_input: SAI1_TX_SYNC_SELECT_INPUT

0x5ac - SAI1_TX_SYNC_SELECT_INPUT DAISY Register

sai2_mclk2_select_input: SAI2_MCLK2_SELECT_INPUT

0x5b0 - SAI2_MCLK2_SELECT_INPUT DAISY Register

sai2_rx_bclk_select_input: SAI2_RX_BCLK_SELECT_INPUT

0x5b4 - SAI2_RX_BCLK_SELECT_INPUT DAISY Register

sai2_rx_data0_select_input: SAI2_RX_DATA0_SELECT_INPUT

0x5b8 - SAI2_RX_DATA0_SELECT_INPUT DAISY Register

sai2_rx_sync_select_input: SAI2_RX_SYNC_SELECT_INPUT

0x5bc - SAI2_RX_SYNC_SELECT_INPUT DAISY Register

sai2_tx_bclk_select_input: SAI2_TX_BCLK_SELECT_INPUT

0x5c0 - SAI2_TX_BCLK_SELECT_INPUT DAISY Register

sai2_tx_sync_select_input: SAI2_TX_SYNC_SELECT_INPUT

0x5c4 - SAI2_TX_SYNC_SELECT_INPUT DAISY Register

spdif_in_select_input: SPDIF_IN_SELECT_INPUT

0x5c8 - SPDIF_IN_SELECT_INPUT DAISY Register

usb_otg2_oc_select_input: USB_OTG2_OC_SELECT_INPUT

0x5cc - USB_OTG2_OC_SELECT_INPUT DAISY Register

usb_otg1_oc_select_input: USB_OTG1_OC_SELECT_INPUT

0x5d0 - USB_OTG1_OC_SELECT_INPUT DAISY Register

usdhc1_cd_b_select_input: USDHC1_CD_B_SELECT_INPUT

0x5d4 - USDHC1_CD_B_SELECT_INPUT DAISY Register

usdhc1_wp_select_input: USDHC1_WP_SELECT_INPUT

0x5d8 - USDHC1_WP_SELECT_INPUT DAISY Register

usdhc2_clk_select_input: USDHC2_CLK_SELECT_INPUT

0x5dc - USDHC2_CLK_SELECT_INPUT DAISY Register

usdhc2_cd_b_select_input: USDHC2_CD_B_SELECT_INPUT

0x5e0 - USDHC2_CD_B_SELECT_INPUT DAISY Register

usdhc2_cmd_select_input: USDHC2_CMD_SELECT_INPUT

0x5e4 - USDHC2_CMD_SELECT_INPUT DAISY Register

usdhc2_data0_select_input: USDHC2_DATA0_SELECT_INPUT

0x5e8 - USDHC2_DATA0_SELECT_INPUT DAISY Register

usdhc2_data1_select_input: USDHC2_DATA1_SELECT_INPUT

0x5ec - USDHC2_DATA1_SELECT_INPUT DAISY Register

usdhc2_data2_select_input: USDHC2_DATA2_SELECT_INPUT

0x5f0 - USDHC2_DATA2_SELECT_INPUT DAISY Register

usdhc2_data3_select_input: USDHC2_DATA3_SELECT_INPUT

0x5f4 - USDHC2_DATA3_SELECT_INPUT DAISY Register

usdhc2_data4_select_input: USDHC2_DATA4_SELECT_INPUT

0x5f8 - USDHC2_DATA4_SELECT_INPUT DAISY Register

usdhc2_data5_select_input: USDHC2_DATA5_SELECT_INPUT

0x5fc - USDHC2_DATA5_SELECT_INPUT DAISY Register

usdhc2_data6_select_input: USDHC2_DATA6_SELECT_INPUT

0x600 - USDHC2_DATA6_SELECT_INPUT DAISY Register

usdhc2_data7_select_input: USDHC2_DATA7_SELECT_INPUT

0x604 - USDHC2_DATA7_SELECT_INPUT DAISY Register

usdhc2_wp_select_input: USDHC2_WP_SELECT_INPUT

0x608 - USDHC2_WP_SELECT_INPUT DAISY Register

xbar1_in02_select_input: XBAR1_IN02_SELECT_INPUT

0x60c - XBAR1_IN02_SELECT_INPUT DAISY Register

xbar1_in03_select_input: XBAR1_IN03_SELECT_INPUT

0x610 - XBAR1_IN03_SELECT_INPUT DAISY Register

xbar1_in04_select_input: XBAR1_IN04_SELECT_INPUT

0x614 - XBAR1_IN04_SELECT_INPUT DAISY Register

xbar1_in05_select_input: XBAR1_IN05_SELECT_INPUT

0x618 - XBAR1_IN05_SELECT_INPUT DAISY Register

xbar1_in06_select_input: XBAR1_IN06_SELECT_INPUT

0x61c - XBAR1_IN06_SELECT_INPUT DAISY Register

xbar1_in07_select_input: XBAR1_IN07_SELECT_INPUT

0x620 - XBAR1_IN07_SELECT_INPUT DAISY Register

xbar1_in08_select_input: XBAR1_IN08_SELECT_INPUT

0x624 - XBAR1_IN08_SELECT_INPUT DAISY Register

xbar1_in09_select_input: XBAR1_IN09_SELECT_INPUT

0x628 - XBAR1_IN09_SELECT_INPUT DAISY Register

xbar1_in17_select_input: XBAR1_IN17_SELECT_INPUT

0x62c - XBAR1_IN17_SELECT_INPUT DAISY Register

xbar1_in18_select_input: XBAR1_IN18_SELECT_INPUT

0x630 - XBAR1_IN18_SELECT_INPUT DAISY Register

xbar1_in20_select_input: XBAR1_IN20_SELECT_INPUT

0x634 - XBAR1_IN20_SELECT_INPUT DAISY Register

xbar1_in22_select_input: XBAR1_IN22_SELECT_INPUT

0x638 - XBAR1_IN22_SELECT_INPUT DAISY Register

xbar1_in23_select_input: XBAR1_IN23_SELECT_INPUT

0x63c - XBAR1_IN23_SELECT_INPUT DAISY Register

xbar1_in24_select_input: XBAR1_IN24_SELECT_INPUT

0x640 - XBAR1_IN24_SELECT_INPUT DAISY Register

xbar1_in14_select_input: XBAR1_IN14_SELECT_INPUT

0x644 - XBAR1_IN14_SELECT_INPUT DAISY Register

xbar1_in15_select_input: XBAR1_IN15_SELECT_INPUT

0x648 - XBAR1_IN15_SELECT_INPUT DAISY Register

xbar1_in16_select_input: XBAR1_IN16_SELECT_INPUT

0x64c - XBAR1_IN16_SELECT_INPUT DAISY Register

xbar1_in25_select_input: XBAR1_IN25_SELECT_INPUT

0x650 - XBAR1_IN25_SELECT_INPUT DAISY Register

xbar1_in19_select_input: XBAR1_IN19_SELECT_INPUT

0x654 - XBAR1_IN19_SELECT_INPUT DAISY Register

xbar1_in21_select_input: XBAR1_IN21_SELECT_INPUT

0x658 - XBAR1_IN23_SELECT_INPUT DAISY Register

sw_mux_ctl_pad_gpio_spi_b0_00: SW_MUX_CTL_PAD_GPIO_SPI_B0_00

0x65c - SW_MUX_CTL_PAD_GPIO_SPI_B0_00 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_01: SW_MUX_CTL_PAD_GPIO_SPI_B0_01

0x660 - SW_MUX_CTL_PAD_GPIO_SPI_B0_01 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_02: SW_MUX_CTL_PAD_GPIO_SPI_B0_02

0x664 - SW_MUX_CTL_PAD_GPIO_SPI_B0_02 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_03: SW_MUX_CTL_PAD_GPIO_SPI_B0_03

0x668 - SW_MUX_CTL_PAD_GPIO_SPI_B0_03 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_04: SW_MUX_CTL_PAD_GPIO_SPI_B0_04

0x66c - SW_MUX_CTL_PAD_GPIO_SPI_B0_04 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_05: SW_MUX_CTL_PAD_GPIO_SPI_B0_05

0x670 - SW_MUX_CTL_PAD_GPIO_SPI_B0_05 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_06: SW_MUX_CTL_PAD_GPIO_SPI_B0_06

0x674 - SW_MUX_CTL_PAD_GPIO_SPI_B0_06 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_07: SW_MUX_CTL_PAD_GPIO_SPI_B0_07

0x678 - SW_MUX_CTL_PAD_GPIO_SPI_B0_07 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_08: SW_MUX_CTL_PAD_GPIO_SPI_B0_08

0x67c - SW_MUX_CTL_PAD_GPIO_SPI_B0_08 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_09: SW_MUX_CTL_PAD_GPIO_SPI_B0_09

0x680 - SW_MUX_CTL_PAD_GPIO_SPI_B0_09 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_10: SW_MUX_CTL_PAD_GPIO_SPI_B0_10

0x684 - SW_MUX_CTL_PAD_GPIO_SPI_B0_10 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_11: SW_MUX_CTL_PAD_GPIO_SPI_B0_11

0x688 - SW_MUX_CTL_PAD_GPIO_SPI_B0_11 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_12: SW_MUX_CTL_PAD_GPIO_SPI_B0_12

0x68c - SW_MUX_CTL_PAD_GPIO_SPI_B0_12 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b0_13: SW_MUX_CTL_PAD_GPIO_SPI_B0_13

0x690 - SW_MUX_CTL_PAD_GPIO_SPI_B0_13 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b1_00: SW_MUX_CTL_PAD_GPIO_SPI_B1_00

0x694 - SW_MUX_CTL_PAD_GPIO_SPI_B1_00 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b1_01: SW_MUX_CTL_PAD_GPIO_SPI_B1_01

0x698 - SW_MUX_CTL_PAD_GPIO_SPI_B1_01 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b1_02: SW_MUX_CTL_PAD_GPIO_SPI_B1_02

0x69c - SW_MUX_CTL_PAD_GPIO_SPI_B1_02 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b1_03: SW_MUX_CTL_PAD_GPIO_SPI_B1_03

0x6a0 - SW_MUX_CTL_PAD_GPIO_SPI_B1_03 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b1_04: SW_MUX_CTL_PAD_GPIO_SPI_B1_04

0x6a4 - SW_MUX_CTL_PAD_GPIO_SPI_B1_04 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b1_05: SW_MUX_CTL_PAD_GPIO_SPI_B1_05

0x6a8 - SW_MUX_CTL_PAD_GPIO_SPI_B1_05 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b1_06: SW_MUX_CTL_PAD_GPIO_SPI_B1_06

0x6ac - SW_MUX_CTL_PAD_GPIO_SPI_B1_06 SW MUX Control Register

sw_mux_ctl_pad_gpio_spi_b1_07: SW_MUX_CTL_PAD_GPIO_SPI_B1_07

0x6b0 - SW_MUX_CTL_PAD_GPIO_SPI_B1_07 SW MUX Control Register

sw_pad_ctl_pad_gpio_spi_b0_00: SW_PAD_CTL_PAD_GPIO_SPI_B0_00

0x6b4 - SW_PAD_CTL_PAD_GPIO_SPI_B0_00 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_01: SW_PAD_CTL_PAD_GPIO_SPI_B0_01

0x6b8 - SW_PAD_CTL_PAD_GPIO_SPI_B0_01 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_02: SW_PAD_CTL_PAD_GPIO_SPI_B0_02

0x6bc - SW_PAD_CTL_PAD_GPIO_SPI_B0_02 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_03: SW_PAD_CTL_PAD_GPIO_SPI_B0_03

0x6c0 - SW_PAD_CTL_PAD_GPIO_SPI_B0_03 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_04: SW_PAD_CTL_PAD_GPIO_SPI_B0_04

0x6c4 - SW_PAD_CTL_PAD_GPIO_SPI_B0_04 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_05: SW_PAD_CTL_PAD_GPIO_SPI_B0_05

0x6c8 - SW_PAD_CTL_PAD_GPIO_SPI_B0_05 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_06: SW_PAD_CTL_PAD_GPIO_SPI_B0_06

0x6cc - SW_PAD_CTL_PAD_GPIO_SPI_B0_06 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_07: SW_PAD_CTL_PAD_GPIO_SPI_B0_07

0x6d0 - SW_PAD_CTL_PAD_GPIO_SPI_B0_07 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_08: SW_PAD_CTL_PAD_GPIO_SPI_B0_08

0x6d4 - SW_PAD_CTL_PAD_GPIO_SPI_B0_08 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_09: SW_PAD_CTL_PAD_GPIO_SPI_B0_09

0x6d8 - SW_PAD_CTL_PAD_GPIO_SPI_B0_09 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_10: SW_PAD_CTL_PAD_GPIO_SPI_B0_10

0x6dc - SW_PAD_CTL_PAD_GPIO_SPI_B0_10 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_11: SW_PAD_CTL_PAD_GPIO_SPI_B0_11

0x6e0 - SW_PAD_CTL_PAD_GPIO_SPI_B0_11 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_12: SW_PAD_CTL_PAD_GPIO_SPI_B0_12

0x6e4 - SW_PAD_CTL_PAD_GPIO_SPI_B0_12 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b0_13: SW_PAD_CTL_PAD_GPIO_SPI_B0_13

0x6e8 - SW_PAD_CTL_PAD_GPIO_SPI_B0_13 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b1_00: SW_PAD_CTL_PAD_GPIO_SPI_B1_00

0x6ec - SW_PAD_CTL_PAD_GPIO_SPI_B1_00 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b1_01: SW_PAD_CTL_PAD_GPIO_SPI_B1_01

0x6f0 - SW_PAD_CTL_PAD_GPIO_SPI_B1_01 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b1_02: SW_PAD_CTL_PAD_GPIO_SPI_B1_02

0x6f4 - SW_PAD_CTL_PAD_GPIO_SPI_B1_02 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b1_03: SW_PAD_CTL_PAD_GPIO_SPI_B1_03

0x6f8 - SW_PAD_CTL_PAD_GPIO_SPI_B1_03 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b1_04: SW_PAD_CTL_PAD_GPIO_SPI_B1_04

0x6fc - SW_PAD_CTL_PAD_GPIO_SPI_B1_04 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b1_05: SW_PAD_CTL_PAD_GPIO_SPI_B1_05

0x700 - SW_PAD_CTL_PAD_GPIO_SPI_B1_05 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b1_06: SW_PAD_CTL_PAD_GPIO_SPI_B1_06

0x704 - SW_PAD_CTL_PAD_GPIO_SPI_B1_06 SW PAD Control Register

sw_pad_ctl_pad_gpio_spi_b1_07: SW_PAD_CTL_PAD_GPIO_SPI_B1_07

0x708 - SW_PAD_CTL_PAD_GPIO_SPI_B1_07 SW PAD Control Register

enet2_ipg_clk_rmii_select_input: ENET2_IPG_CLK_RMII_SELECT_INPUT

0x70c - ENET2_IPG_CLK_RMII_SELECT_INPUT DAISY Register

enet2_ipp_ind_mac0_mdio_select_input: ENET2_IPP_IND_MAC0_MDIO_SELECT_INPUT

0x710 - ENET2_IPP_IND_MAC0_MDIO_SELECT_INPUT DAISY Register

enet2_ipp_ind_mac0_rxdata_select_input_0: ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_0

0x714 - ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_0 DAISY Register

enet2_ipp_ind_mac0_rxdata_select_input_1: ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_1

0x718 - ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_1 DAISY Register

enet2_ipp_ind_mac0_rxen_select_input: ENET2_IPP_IND_MAC0_RXEN_SELECT_INPUT

0x71c - ENET2_IPP_IND_MAC0_RXEN_SELECT_INPUT DAISY Register

enet2_ipp_ind_mac0_rxerr_select_input: ENET2_IPP_IND_MAC0_RXERR_SELECT_INPUT

0x720 - ENET2_IPP_IND_MAC0_RXERR_SELECT_INPUT DAISY Register

enet2_ipp_ind_mac0_timer_select_input_0: ENET2_IPP_IND_MAC0_TIMER_SELECT_INPUT_0

0x724 - ENET2_IPP_IND_MAC0_TIMER_SELECT_INPUT_0 DAISY Register

enet2_ipp_ind_mac0_txclk_select_input: ENET2_IPP_IND_MAC0_TXCLK_SELECT_INPUT

0x728 - ENET2_IPP_IND_MAC0_TXCLK_SELECT_INPUT DAISY Register

flexspi2_ipp_ind_dqs_fa_select_input: FLEXSPI2_IPP_IND_DQS_FA_SELECT_INPUT

0x72c - FLEXSPI2_IPP_IND_DQS_FA_SELECT_INPUT DAISY Register

flexspi2_ipp_ind_io_fa_bit0_select_input: FLEXSPI2_IPP_IND_IO_FA_BIT0_SELECT_INPUT

0x730 - FLEXSPI2_IPP_IND_IO_FA_BIT0_SELECT_INPUT DAISY Register

flexspi2_ipp_ind_io_fa_bit1_select_input: FLEXSPI2_IPP_IND_IO_FA_BIT1_SELECT_INPUT

0x734 - FLEXSPI2_IPP_IND_IO_FA_BIT1_SELECT_INPUT DAISY Register

flexspi2_ipp_ind_io_fa_bit2_select_input: FLEXSPI2_IPP_IND_IO_FA_BIT2_SELECT_INPUT

0x738 - FLEXSPI2_IPP_IND_IO_FA_BIT2_SELECT_INPUT DAISY Register

flexspi2_ipp_ind_io_fa_bit3_select_input: FLEXSPI2_IPP_IND_IO_FA_BIT3_SELECT_INPUT

0x73c - FLEXSPI2_IPP_IND_IO_FA_BIT3_SELECT_INPUT DAISY Register

flexspi2_ipp_ind_io_fb_bit0_select_input: FLEXSPI2_IPP_IND_IO_FB_BIT0_SELECT_INPUT

0x740 - FLEXSPI2_IPP_IND_IO_FB_BIT0_SELECT_INPUT DAISY Register

flexspi2_ipp_ind_io_fb_bit1_select_input: FLEXSPI2_IPP_IND_IO_FB_BIT1_SELECT_INPUT

0x744 - FLEXSPI2_IPP_IND_IO_FB_BIT1_SELECT_INPUT DAISY Register

flexspi2_ipp_ind_io_fb_bit2_select_input: FLEXSPI2_IPP_IND_IO_FB_BIT2_SELECT_INPUT

0x748 - FLEXSPI2_IPP_IND_IO_FB_BIT2_SELECT_INPUT DAISY Register

flexspi2_ipp_ind_io_fb_bit3_select_input: FLEXSPI2_IPP_IND_IO_FB_BIT3_SELECT_INPUT

0x74c - FLEXSPI2_IPP_IND_IO_FB_BIT3_SELECT_INPUT DAISY Register

flexspi2_ipp_ind_sck_fa_select_input: FLEXSPI2_IPP_IND_SCK_FA_SELECT_INPUT

0x750 - FLEXSPI2_IPP_IND_SCK_FA_SELECT_INPUT DAISY Register

flexspi2_ipp_ind_sck_fb_select_input: FLEXSPI2_IPP_IND_SCK_FB_SELECT_INPUT

0x754 - FLEXSPI2_IPP_IND_SCK_FB_SELECT_INPUT DAISY Register

gpt1_ipp_ind_capin1_select_input: GPT1_IPP_IND_CAPIN1_SELECT_INPUT

0x758 - GPT1_IPP_IND_CAPIN1_SELECT_INPUT DAISY Register

gpt1_ipp_ind_capin2_select_input: GPT1_IPP_IND_CAPIN2_SELECT_INPUT

0x75c - GPT1_IPP_IND_CAPIN2_SELECT_INPUT DAISY Register

gpt1_ipp_ind_clkin_select_input: GPT1_IPP_IND_CLKIN_SELECT_INPUT

0x760 - GPT1_IPP_IND_CLKIN_SELECT_INPUT DAISY Register

gpt2_ipp_ind_capin1_select_input: GPT2_IPP_IND_CAPIN1_SELECT_INPUT

0x764 - GPT2_IPP_IND_CAPIN1_SELECT_INPUT DAISY Register

gpt2_ipp_ind_capin2_select_input: GPT2_IPP_IND_CAPIN2_SELECT_INPUT

0x768 - GPT2_IPP_IND_CAPIN2_SELECT_INPUT DAISY Register

gpt2_ipp_ind_clkin_select_input: GPT2_IPP_IND_CLKIN_SELECT_INPUT

0x76c - GPT2_IPP_IND_CLKIN_SELECT_INPUT DAISY Register

sai3_ipg_clk_sai_mclk_select_input_2: SAI3_IPG_CLK_SAI_MCLK_SELECT_INPUT_2

0x770 - SAI3_IPG_CLK_SAI_MCLK_SELECT_INPUT_2 DAISY Register

sai3_ipp_ind_sai_rxbclk_select_input: SAI3_IPP_IND_SAI_RXBCLK_SELECT_INPUT

0x774 - SAI3_IPP_IND_SAI_RXBCLK_SELECT_INPUT DAISY Register

sai3_ipp_ind_sai_rxdata_select_input_0: SAI3_IPP_IND_SAI_RXDATA_SELECT_INPUT_0

0x778 - SAI3_IPP_IND_SAI_RXDATA_SELECT_INPUT_0 DAISY Register

sai3_ipp_ind_sai_rxsync_select_input: SAI3_IPP_IND_SAI_RXSYNC_SELECT_INPUT

0x77c - SAI3_IPP_IND_SAI_RXSYNC_SELECT_INPUT DAISY Register

sai3_ipp_ind_sai_txbclk_select_input: SAI3_IPP_IND_SAI_TXBCLK_SELECT_INPUT

0x780 - SAI3_IPP_IND_SAI_TXBCLK_SELECT_INPUT DAISY Register

sai3_ipp_ind_sai_txsync_select_input: SAI3_IPP_IND_SAI_TXSYNC_SELECT_INPUT

0x784 - SAI3_IPP_IND_SAI_TXSYNC_SELECT_INPUT DAISY Register

semc_i_ipp_ind_dqs4_select_input: SEMC_I_IPP_IND_DQS4_SELECT_INPUT

0x788 - SEMC_I_IPP_IND_DQS4_SELECT_INPUT DAISY Register

canfd_ipp_ind_canrx_select_input: CANFD_IPP_IND_CANRX_SELECT_INPUT

0x78c - CANFD_IPP_IND_CANRX_SELECT_INPUT DAISY Register