[][src]Type Definition imxrt1062_flexspi::inten::W

type W = W<u32, INTEN>;

Writer for register INTEN

Methods

impl W[src]

pub fn ipcmddoneen(&mut self) -> IPCMDDONEEN_W[src]

Bit 0 - IP triggered Command Sequences Execution finished interrupt enable.

pub fn ipcmdgeen(&mut self) -> IPCMDGEEN_W[src]

Bit 1 - IP triggered Command Sequences Grant Timeout interrupt enable.

pub fn ahbcmdgeen(&mut self) -> AHBCMDGEEN_W[src]

Bit 2 - AHB triggered Command Sequences Grant Timeout interrupt enable.

pub fn ipcmderren(&mut self) -> IPCMDERREN_W[src]

Bit 3 - IP triggered Command Sequences Error Detected interrupt enable.

pub fn ahbcmderren(&mut self) -> AHBCMDERREN_W[src]

Bit 4 - AHB triggered Command Sequences Error Detected interrupt enable.

pub fn iprxwaen(&mut self) -> IPRXWAEN_W[src]

Bit 5 - IP RX FIFO WaterMark available interrupt enable.

pub fn iptxween(&mut self) -> IPTXWEEN_W[src]

Bit 6 - IP TX FIFO WaterMark empty interrupt enable.

pub fn sckstopbyrden(&mut self) -> SCKSTOPBYRDEN_W[src]

Bit 8 - SCK is stopped during command sequence because Async RX FIFO full interrupt enable.

pub fn sckstopbywren(&mut self) -> SCKSTOPBYWREN_W[src]

Bit 9 - SCK is stopped during command sequence because Async TX FIFO empty interrupt enable.

pub fn ahbbustimeouten(&mut self) -> AHBBUSTIMEOUTEN_W[src]

Bit 10 - AHB Bus timeout interrupt.Refer Interrupts chapter for more details.

pub fn seqtimeouten(&mut self) -> SEQTIMEOUTEN_W[src]

Bit 11 - Sequence execution timeout interrupt enable.Refer Interrupts chapter for more details.