Struct imxrt1062_flexio1::W

pub struct W<U, REG> { /* fields omitted */ }

Register writer

Used as an argument to the closures in the write and modify methods of the register

Methods

impl<U, REG> W<U, REG>

pub unsafe fn bits(&mut self, bits: U) -> &mut Self

Writes raw bits to the register

impl W<u32, Reg<u32, _CTRL>>

pub fn flexen(&mut self) -> FLEXEN_W

Bit 0 - FlexIO Enable

pub fn swrst(&mut self) -> SWRST_W

Bit 1 - Software Reset

pub fn fastacc(&mut self) -> FASTACC_W

Bit 2 - Fast Access

pub fn dbge(&mut self) -> DBGE_W

Bit 30 - Debug Enable

pub fn dozen(&mut self) -> DOZEN_W

Bit 31 - Doze Enable

impl W<u32, Reg<u32, _SHIFTSTAT>>

pub fn ssf(&mut self) -> SSF_W

Bits 0:3 - Shifter Status Flag

impl W<u32, Reg<u32, _SHIFTERR>>

pub fn sef(&mut self) -> SEF_W

Bits 0:3 - Shifter Error Flags

impl W<u32, Reg<u32, _TIMSTAT>>

pub fn tsf(&mut self) -> TSF_W

Bits 0:3 - Timer Status Flags

impl W<u32, Reg<u32, _SHIFTSIEN>>

pub fn ssie(&mut self) -> SSIE_W

Bits 0:3 - Shifter Status Interrupt Enable

impl W<u32, Reg<u32, _SHIFTEIEN>>

pub fn seie(&mut self) -> SEIE_W

Bits 0:3 - Shifter Error Interrupt Enable

impl W<u32, Reg<u32, _TIMIEN>>

pub fn teie(&mut self) -> TEIE_W

Bits 0:3 - Timer Status Interrupt Enable

impl W<u32, Reg<u32, _SHIFTSDEN>>

pub fn ssde(&mut self) -> SSDE_W

Bits 0:3 - Shifter Status DMA Enable

impl W<u32, Reg<u32, _SHIFTSTATE>>

pub fn state(&mut self) -> STATE_W

Bits 0:2 - Current State Pointer

impl W<u32, Reg<u32, _SHIFTCTL>>

pub fn smod(&mut self) -> SMOD_W

Bits 0:2 - Shifter Mode

pub fn pinpol(&mut self) -> PINPOL_W

Bit 7 - Shifter Pin Polarity

pub fn pinsel(&mut self) -> PINSEL_W

Bits 8:11 - Shifter Pin Select

pub fn pincfg(&mut self) -> PINCFG_W

Bits 16:17 - Shifter Pin Configuration

pub fn timpol(&mut self) -> TIMPOL_W

Bit 23 - Timer Polarity

pub fn timsel(&mut self) -> TIMSEL_W

Bits 24:25 - Timer Select

impl W<u32, Reg<u32, _SHIFTCFG>>

pub fn sstart(&mut self) -> SSTART_W

Bits 0:1 - Shifter Start bit

pub fn sstop(&mut self) -> SSTOP_W

Bits 4:5 - Shifter Stop bit

pub fn insrc(&mut self) -> INSRC_W

Bit 8 - Input Source

pub fn pwidth(&mut self) -> PWIDTH_W

Bits 16:19 - Parallel Width

impl W<u32, Reg<u32, _SHIFTBUF>>

pub fn shiftbuf(&mut self) -> SHIFTBUF_W

Bits 0:31 - Shift Buffer

impl W<u32, Reg<u32, _SHIFTBUFBIS>>

pub fn shiftbufbis(&mut self) -> SHIFTBUFBIS_W

Bits 0:31 - Shift Buffer

impl W<u32, Reg<u32, _SHIFTBUFBYS>>

pub fn shiftbufbys(&mut self) -> SHIFTBUFBYS_W

Bits 0:31 - Shift Buffer

impl W<u32, Reg<u32, _SHIFTBUFBBS>>

pub fn shiftbufbbs(&mut self) -> SHIFTBUFBBS_W

Bits 0:31 - Shift Buffer

impl W<u32, Reg<u32, _TIMCTL>>

pub fn timod(&mut self) -> TIMOD_W

Bits 0:1 - Timer Mode

pub fn pinpol(&mut self) -> PINPOL_W

Bit 7 - Timer Pin Polarity

pub fn pinsel(&mut self) -> PINSEL_W

Bits 8:11 - Timer Pin Select

pub fn pincfg(&mut self) -> PINCFG_W

Bits 16:17 - Timer Pin Configuration

pub fn trgsrc(&mut self) -> TRGSRC_W

Bit 22 - Trigger Source

pub fn trgpol(&mut self) -> TRGPOL_W

Bit 23 - Trigger Polarity

pub fn trgsel(&mut self) -> TRGSEL_W

Bits 24:28 - Trigger Select

impl W<u32, Reg<u32, _TIMCFG>>

pub fn tstart(&mut self) -> TSTART_W

Bit 1 - Timer Start Bit

pub fn tstop(&mut self) -> TSTOP_W

Bits 4:5 - Timer Stop Bit

pub fn timena(&mut self) -> TIMENA_W

Bits 8:10 - Timer Enable

pub fn timdis(&mut self) -> TIMDIS_W

Bits 12:14 - Timer Disable

pub fn timrst(&mut self) -> TIMRST_W

Bits 16:18 - Timer Reset

pub fn timdec(&mut self) -> TIMDEC_W

Bits 20:21 - Timer Decrement

pub fn timout(&mut self) -> TIMOUT_W

Bits 24:25 - Timer Output

impl W<u32, Reg<u32, _TIMCMP>>

pub fn cmp(&mut self) -> CMP_W

Bits 0:15 - Timer Compare Value

impl W<u32, Reg<u32, _SHIFTBUFNBS>>

pub fn shiftbufnbs(&mut self) -> SHIFTBUFNBS_W

Bits 0:31 - Shift Buffer

impl W<u32, Reg<u32, _SHIFTBUFHWS>>

pub fn shiftbufhws(&mut self) -> SHIFTBUFHWS_W

Bits 0:31 - Shift Buffer

impl W<u32, Reg<u32, _SHIFTBUFNIS>>

pub fn shiftbufnis(&mut self) -> SHIFTBUFNIS_W

Bits 0:31 - Shift Buffer