Struct imxrt1062_enc1::W

pub struct W<U, REG> { /* fields omitted */ }

Register writer

Used as an argument to the closures in the write and modify methods of the register

Methods

impl<U, REG> W<U, REG>

pub unsafe fn bits(&mut self, bits: U) -> &mut Self

Writes raw bits to the register

impl W<u16, Reg<u16, _CTRL>>

pub fn cmpie(&mut self) -> CMPIE_W

Bit 0 - Compare Interrupt Enable

pub fn cmpirq(&mut self) -> CMPIRQ_W

Bit 1 - Compare Interrupt Request

pub fn wde(&mut self) -> WDE_W

Bit 2 - Watchdog Enable

pub fn die(&mut self) -> DIE_W

Bit 3 - Watchdog Timeout Interrupt Enable

pub fn dirq(&mut self) -> DIRQ_W

Bit 4 - Watchdog Timeout Interrupt Request

pub fn xne(&mut self) -> XNE_W

Bit 5 - Use Negative Edge of INDEX Pulse

pub fn xip(&mut self) -> XIP_W

Bit 6 - INDEX Triggered Initialization of Position Counters UPOS and LPOS

pub fn xie(&mut self) -> XIE_W

Bit 7 - INDEX Pulse Interrupt Enable

pub fn xirq(&mut self) -> XIRQ_W

Bit 8 - INDEX Pulse Interrupt Request

pub fn ph1(&mut self) -> PH1_W

Bit 9 - Enable Signal Phase Count Mode

pub fn rev(&mut self) -> REV_W

Bit 10 - Enable Reverse Direction Counting

pub fn swip(&mut self) -> SWIP_W

Bit 11 - Software Triggered Initialization of Position Counters UPOS and LPOS

pub fn hne(&mut self) -> HNE_W

Bit 12 - Use Negative Edge of HOME Input

pub fn hip(&mut self) -> HIP_W

Bit 13 - Enable HOME to Initialize Position Counters UPOS and LPOS

pub fn hie(&mut self) -> HIE_W

Bit 14 - HOME Interrupt Enable

pub fn hirq(&mut self) -> HIRQ_W

Bit 15 - HOME Signal Transition Interrupt Request

impl W<u16, Reg<u16, _FILT>>

pub fn filt_per(&mut self) -> FILT_PER_W

Bits 0:7 - Input Filter Sample Period

pub fn filt_cnt(&mut self) -> FILT_CNT_W

Bits 8:10 - Input Filter Sample Count

impl W<u16, Reg<u16, _WTR>>

pub fn wdog(&mut self) -> WDOG_W

Bits 0:15 - WDOG[15:0] is a binary representation of the number of clock cycles plus one that the watchdog timer counts before timing out and optionally generating an interrupt

impl W<u16, Reg<u16, _POSD>>

pub fn posd(&mut self) -> POSD_W

Bits 0:15 - This read/write register contains the position change in value occurring between each read of the position register

impl W<u16, Reg<u16, _REV>>

pub fn rev(&mut self) -> REV_W

Bits 0:15 - This read/write register contains the current value of the revolution counter.

impl W<u16, Reg<u16, _UPOS>>

pub fn pos(&mut self) -> POS_W

Bits 0:15 - This read/write register contains the upper (most significant) half of the position counter

impl W<u16, Reg<u16, _LPOS>>

pub fn pos(&mut self) -> POS_W

Bits 0:15 - This read/write register contains the lower (least significant) half of the position counter

impl W<u16, Reg<u16, _UINIT>>

pub fn init(&mut self) -> INIT_W

Bits 0:15 - This read/write register contains the value to be used to initialize the upper half of the position counter (UPOS)

impl W<u16, Reg<u16, _LINIT>>

pub fn init(&mut self) -> INIT_W

Bits 0:15 - This read/write register contains the value to be used to initialize the lower half of the position counter (LPOS)

impl W<u16, Reg<u16, _TST>>

pub fn test_count(&mut self) -> TEST_COUNT_W

Bits 0:7 - These bits hold the number of quadrature advances to generate.

pub fn test_period(&mut self) -> TEST_PERIOD_W

Bits 8:12 - These bits hold the period of quadrature phase in IPBus clock cycles.

pub fn qdn(&mut self) -> QDN_W

Bit 13 - Quadrature Decoder Negative Signal

pub fn tce(&mut self) -> TCE_W

Bit 14 - Test Counter Enable

pub fn ten(&mut self) -> TEN_W

Bit 15 - Test Mode Enable

impl W<u16, Reg<u16, _CTRL2>>

pub fn updhld(&mut self) -> UPDHLD_W

Bit 0 - Update Hold Registers

pub fn updpos(&mut self) -> UPDPOS_W

Bit 1 - Update Position Registers

pub fn mod_(&mut self) -> MOD_W

Bit 2 - Enable Modulo Counting

pub fn ruie(&mut self) -> RUIE_W

Bit 4 - Roll-under Interrupt Enable

pub fn ruirq(&mut self) -> RUIRQ_W

Bit 5 - Roll-under Interrupt Request

pub fn roie(&mut self) -> ROIE_W

Bit 6 - Roll-over Interrupt Enable

pub fn roirq(&mut self) -> ROIRQ_W

Bit 7 - Roll-over Interrupt Request

pub fn revmod(&mut self) -> REVMOD_W

Bit 8 - Revolution Counter Modulus Enable

pub fn outctl(&mut self) -> OUTCTL_W

Bit 9 - Output Control

pub fn sabie(&mut self) -> SABIE_W

Bit 10 - Simultaneous PHASEA and PHASEB Change Interrupt Enable

pub fn sabirq(&mut self) -> SABIRQ_W

Bit 11 - Simultaneous PHASEA and PHASEB Change Interrupt Request

impl W<u16, Reg<u16, _UMOD>>

pub fn mod_(&mut self) -> MOD_W

Bits 0:15 - This read/write register contains the upper (most significant) half of the modulus register

impl W<u16, Reg<u16, _LMOD>>

pub fn mod_(&mut self) -> MOD_W

Bits 0:15 - This read/write register contains the lower (least significant) half of the modulus register

impl W<u16, Reg<u16, _UCOMP>>

pub fn comp(&mut self) -> COMP_W

Bits 0:15 - This read/write register contains the upper (most significant) half of the position compare register

impl W<u16, Reg<u16, _LCOMP>>

pub fn comp(&mut self) -> COMP_W

Bits 0:15 - This read/write register contains the lower (least significant) half of the position compare register