[][src]Struct imxrt1062_bee::W

pub struct W<U, REG> { /* fields omitted */ }

Register writer

Used as an argument to the closures in the write and modify methods of the register

Methods

impl<U, REG> W<U, REG>[src]

pub unsafe fn bits(&mut self, bits: U) -> &mut Self[src]

Writes raw bits to the register

impl W<u32, Reg<u32, _CTRL>>[src]

pub fn bee_enable(&mut self) -> BEE_ENABLE_W[src]

Bit 0 - BEE enable bit

pub fn ctrl_clk_en(&mut self) -> CTRL_CLK_EN_W[src]

Bit 1 - Clock enable input, low inactive

pub fn ctrl_sftrst_n(&mut self) -> CTRL_SFTRST_N_W[src]

Bit 2 - Soft reset input, low active

pub fn key_valid(&mut self) -> KEY_VALID_W[src]

Bit 4 - AES-128 key is ready

pub fn key_region_sel(&mut self) -> KEY_REGION_SEL_W[src]

Bit 5 - AES key region select

pub fn ac_prot_en(&mut self) -> AC_PROT_EN_W[src]

Bit 6 - Enable access permission control When AC_PROT_EN is asserted, all encrypted regions are limited to be ARM core access only

pub fn little_endian(&mut self) -> LITTLE_ENDIAN_W[src]

Bit 7 - Endian swap control for the 16 bytes input and output data of AES core.

pub fn security_level_r0(&mut self) -> SECURITY_LEVEL_R0_W[src]

Bits 8:9 - Security level of the allowed access for memory region0

pub fn ctrl_aes_mode_r0(&mut self) -> CTRL_AES_MODE_R0_W[src]

Bit 10 - AES mode of region0

pub fn security_level_r1(&mut self) -> SECURITY_LEVEL_R1_W[src]

Bits 12:13 - Security level of the allowed access for memory region1

pub fn ctrl_aes_mode_r1(&mut self) -> CTRL_AES_MODE_R1_W[src]

Bit 14 - AES mode of region1

pub fn bee_enable_lock(&mut self) -> BEE_ENABLE_LOCK_W[src]

Bit 16 - Lock bit for bee_enable

pub fn ctrl_clk_en_lock(&mut self) -> CTRL_CLK_EN_LOCK_W[src]

Bit 17 - Lock bit for ctrl_clk_en

pub fn ctrl_sftrst_n_lock(&mut self) -> CTRL_SFTRST_N_LOCK_W[src]

Bit 18 - Lock bit for ctrl_sftrst

pub fn region1_addr_lock(&mut self) -> REGION1_ADDR_LOCK_W[src]

Bit 19 - Lock bit for region1 address boundary

pub fn key_valid_lock(&mut self) -> KEY_VALID_LOCK_W[src]

Bit 20 - Lock bit for key_valid

pub fn key_region_sel_lock(&mut self) -> KEY_REGION_SEL_LOCK_W[src]

Bit 21 - Lock bit for key_region_sel

pub fn ac_prot_en_lock(&mut self) -> AC_PROT_EN_LOCK_W[src]

Bit 22 - Lock bit for ac_prot

pub fn little_endian_lock(&mut self) -> LITTLE_ENDIAN_LOCK_W[src]

Bit 23 - Lock bit for little_endian

pub fn security_level_r0_lock(&mut self) -> SECURITY_LEVEL_R0_LOCK_W[src]

Bits 24:25 - Lock bits for security_level_r0

pub fn ctrl_aes_mode_r0_lock(&mut self) -> CTRL_AES_MODE_R0_LOCK_W[src]

Bit 26 - Lock bit for region0 ctrl_aes_mode

pub fn region0_key_lock(&mut self) -> REGION0_KEY_LOCK_W[src]

Bit 27 - Lock bit for region0 AES key

pub fn security_level_r1_lock(&mut self) -> SECURITY_LEVEL_R1_LOCK_W[src]

Bits 28:29 - Lock bits for security_level_r1

pub fn ctrl_aes_mode_r1_lock(&mut self) -> CTRL_AES_MODE_R1_LOCK_W[src]

Bit 30 - Lock bit for region1 ctrl_aes_mode

pub fn region1_key_lock(&mut self) -> REGION1_KEY_LOCK_W[src]

Bit 31 - Lock bit for region1 AES key

impl W<u32, Reg<u32, _ADDR_OFFSET0>>[src]

pub fn addr_offset0(&mut self) -> ADDR_OFFSET0_W[src]

Bits 0:15 - Signed offset for BEE region 0

pub fn addr_offset0_lock(&mut self) -> ADDR_OFFSET0_LOCK_W[src]

Bits 16:31 - Lock bits for addr_offset0

impl W<u32, Reg<u32, _ADDR_OFFSET1>>[src]

pub fn addr_offset1(&mut self) -> ADDR_OFFSET1_W[src]

Bits 0:15 - Signed offset for BEE region 1

pub fn addr_offset1_lock(&mut self) -> ADDR_OFFSET1_LOCK_W[src]

Bits 16:31 - Lock bits for addr_offset1

impl W<u32, Reg<u32, _AES_KEY0_W0>>[src]

pub fn key0(&mut self) -> KEY0_W[src]

Bits 0:31 - AES 128 key from software

impl W<u32, Reg<u32, _AES_KEY0_W1>>[src]

pub fn key1(&mut self) -> KEY1_W[src]

Bits 0:31 - AES 128 key from software

impl W<u32, Reg<u32, _AES_KEY0_W2>>[src]

pub fn key2(&mut self) -> KEY2_W[src]

Bits 0:31 - AES 128 key from software

impl W<u32, Reg<u32, _AES_KEY0_W3>>[src]

pub fn key3(&mut self) -> KEY3_W[src]

Bits 0:31 - AES 128 key from software

impl W<u32, Reg<u32, _STATUS>>[src]

pub fn irq_vec(&mut self) -> IRQ_VEC_W[src]

Bits 0:7 - bit 7: Protected region-3 access violation bit 6: Protected region-2 access violation bit 5: Protected region-1 access violation bit 4: Protected region-0 access violation bit 3: Region-1 read channel security violation bit 2: Read channel illegal access detected bit 1: Region-0 read channel security violation bit 0: Disable abort

impl W<u32, Reg<u32, _CTR_NONCE0_W0>>[src]

pub fn nonce00(&mut self) -> NONCE00_W[src]

Bits 0:31 - Nonce0 from software for CTR, for region0. Nonce0={Nonce03,Nonce02,Nonce01,Nonce00}

impl W<u32, Reg<u32, _CTR_NONCE0_W1>>[src]

pub fn nonce01(&mut self) -> NONCE01_W[src]

Bits 0:31 - Nonce0 from software for CTR, for region0. Nonce0={Nonce03,Nonce02,Nonce01,Nonce00}

impl W<u32, Reg<u32, _CTR_NONCE0_W2>>[src]

pub fn nonce02(&mut self) -> NONCE02_W[src]

Bits 0:31 - Nonce0 from software for CTR, for region0. Nonce0={Nonce03,Nonce02,Nonce01,Nonce00}

impl W<u32, Reg<u32, _CTR_NONCE0_W3>>[src]

pub fn nonce03(&mut self) -> NONCE03_W[src]

Bits 0:31 - Nonce0 from software for CTR, for region0. Nonce0={Nonce03,Nonce02,Nonce01,Nonce00}

impl W<u32, Reg<u32, _CTR_NONCE1_W0>>[src]

pub fn nonce10(&mut self) -> NONCE10_W[src]

Bits 0:31 - Nonce1 from software for CTR, for region1. Nonce1={Nonce13,Nonce12,Nonce11,Nonce10}

impl W<u32, Reg<u32, _CTR_NONCE1_W1>>[src]

pub fn nonce11(&mut self) -> NONCE11_W[src]

Bits 0:31 - Nonce1 from software for CTR, for region1. Nonce1={Nonce13,Nonce12,Nonce11,Nonce10}

impl W<u32, Reg<u32, _CTR_NONCE1_W2>>[src]

pub fn nonce12(&mut self) -> NONCE12_W[src]

Bits 0:31 - Nonce1 from software for CTR, for region1. Nonce1={Nonce13,Nonce12,Nonce11,Nonce10}

impl W<u32, Reg<u32, _CTR_NONCE1_W3>>[src]

pub fn nonce13(&mut self) -> NONCE13_W[src]

Bits 0:31 - Nonce1 from software for CTR, for region1. Nonce1={Nonce13,Nonce12,Nonce11,Nonce10}

impl W<u32, Reg<u32, _REGION1_TOP>>[src]

pub fn region1_top(&mut self) -> REGION1_TOP_W[src]

Bits 0:31 - Address upper limit of region1

impl W<u32, Reg<u32, _REGION1_BOT>>[src]

pub fn region1_bot(&mut self) -> REGION1_BOT_W[src]

Bits 0:31 - Address lower limit of region1

Auto Trait Implementations

impl<U, REG> Send for W<U, REG> where
    REG: Send,
    U: Send

impl<U, REG> Sync for W<U, REG> where
    REG: Sync,
    U: Sync

impl<U, REG> Unpin for W<U, REG> where
    REG: Unpin,
    U: Unpin

Blanket Implementations

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Borrow<T> for T where
    T: ?Sized
[src]

impl<T> BorrowMut<T> for T where
    T: ?Sized
[src]

impl<T> From<T> for T[src]

impl<T, U> Into<U> for T where
    U: From<T>, 
[src]

impl<T, U> TryFrom<U> for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto<U> for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.