#[repr(C)]
pub struct RegisterBlock {
Show 479 fields pub SW_MUX_CTL_PAD_GPIO_EMC_00: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_01: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_02: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_03: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_04: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_05: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_06: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_07: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_08: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_09: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_10: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_11: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_12: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_13: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_14: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_15: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_16: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_17: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_18: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_19: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_20: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_21: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_22: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_23: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_24: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_25: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_26: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_27: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_28: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_29: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_30: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_31: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_32: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_33: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_34: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_35: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_36: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_37: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_38: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_39: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_40: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_EMC_41: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_00: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_01: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_02: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_03: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_04: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_05: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_06: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_07: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_08: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_09: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_10: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_11: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_12: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_13: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_14: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B0_15: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_00: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_01: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_02: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_03: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_04: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_05: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_06: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_07: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_08: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_09: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_10: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_11: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_12: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_13: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_14: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_AD_B1_15: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_00: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_01: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_02: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_03: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_04: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_05: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_06: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_07: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_08: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_09: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_10: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_11: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_12: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_13: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_14: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B0_15: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_00: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_01: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_02: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_03: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_04: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_05: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_06: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_07: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_08: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_09: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_10: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_11: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_12: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_13: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_14: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_B1_15: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B0_00: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B0_01: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B0_02: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B0_03: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B0_04: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B0_05: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_00: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_01: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_02: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_03: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_04: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_05: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_06: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_07: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_08: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_09: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_10: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SD_B1_11: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_00: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_01: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_02: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_03: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_04: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_05: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_06: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_07: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_08: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_09: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_10: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_11: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_12: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_13: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_14: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_15: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_16: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_17: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_18: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_19: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_20: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_21: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_22: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_23: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_24: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_25: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_26: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_27: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_28: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_29: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_30: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_31: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_32: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_33: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_34: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_35: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_36: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_37: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_38: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_39: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_40: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_EMC_41: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_00: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_01: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_02: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_03: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_04: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_05: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_06: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_07: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_08: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_09: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_10: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_11: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_12: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_13: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_14: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B0_15: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_00: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_01: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_02: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_03: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_04: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_05: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_06: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_07: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_08: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_09: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_10: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_11: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_12: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_13: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_14: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_AD_B1_15: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_00: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_01: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_02: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_03: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_04: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_05: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_06: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_07: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_08: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_09: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_10: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_11: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_12: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_13: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_14: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B0_15: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_00: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_01: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_02: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_03: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_04: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_05: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_06: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_07: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_08: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_09: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_10: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_11: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_12: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_13: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_14: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_B1_15: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B0_00: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B0_01: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B0_02: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B0_03: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B0_04: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B0_05: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_00: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_01: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_02: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_03: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_04: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_05: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_06: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_07: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_08: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_09: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_10: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SD_B1_11: RWRegister<u32>, pub ANATOP_USB_OTG1_ID_SELECT_INPUT: RWRegister<u32>, pub ANATOP_USB_OTG2_ID_SELECT_INPUT: RWRegister<u32>, pub CCM_PMIC_READY_SELECT_INPUT: RWRegister<u32>, pub CSI_DATA02_SELECT_INPUT: RWRegister<u32>, pub CSI_DATA03_SELECT_INPUT: RWRegister<u32>, pub CSI_DATA04_SELECT_INPUT: RWRegister<u32>, pub CSI_DATA05_SELECT_INPUT: RWRegister<u32>, pub CSI_DATA06_SELECT_INPUT: RWRegister<u32>, pub CSI_DATA07_SELECT_INPUT: RWRegister<u32>, pub CSI_DATA08_SELECT_INPUT: RWRegister<u32>, pub CSI_DATA09_SELECT_INPUT: RWRegister<u32>, pub CSI_HSYNC_SELECT_INPUT: RWRegister<u32>, pub CSI_PIXCLK_SELECT_INPUT: RWRegister<u32>, pub CSI_VSYNC_SELECT_INPUT: RWRegister<u32>, pub ENET_IPG_CLK_RMII_SELECT_INPUT: RWRegister<u32>, pub ENET_MDIO_SELECT_INPUT: RWRegister<u32>, pub ENET0_RXDATA_SELECT_INPUT: RWRegister<u32>, pub ENET1_RXDATA_SELECT_INPUT: RWRegister<u32>, pub ENET_RXEN_SELECT_INPUT: RWRegister<u32>, pub ENET_RXERR_SELECT_INPUT: RWRegister<u32>, pub ENET0_TIMER_SELECT_INPUT: RWRegister<u32>, pub ENET_TXCLK_SELECT_INPUT: RWRegister<u32>, pub FLEXCAN1_RX_SELECT_INPUT: RWRegister<u32>, pub FLEXCAN2_RX_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM1_PWMA3_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM1_PWMA0_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM1_PWMA1_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM1_PWMA2_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM1_PWMB3_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM1_PWMB0_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM1_PWMB1_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM1_PWMB2_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM2_PWMA3_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM2_PWMA0_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM2_PWMA1_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM2_PWMA2_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM2_PWMB3_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM2_PWMB0_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM2_PWMB1_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM2_PWMB2_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM4_PWMA0_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM4_PWMA1_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM4_PWMA2_SELECT_INPUT: RWRegister<u32>, pub FLEXPWM4_PWMA3_SELECT_INPUT: RWRegister<u32>, pub FLEXSPIA_DQS_SELECT_INPUT: RWRegister<u32>, pub FLEXSPIA_DATA0_SELECT_INPUT: RWRegister<u32>, pub FLEXSPIA_DATA1_SELECT_INPUT: RWRegister<u32>, pub FLEXSPIA_DATA2_SELECT_INPUT: RWRegister<u32>, pub FLEXSPIA_DATA3_SELECT_INPUT: RWRegister<u32>, pub FLEXSPIB_DATA0_SELECT_INPUT: RWRegister<u32>, pub FLEXSPIB_DATA1_SELECT_INPUT: RWRegister<u32>, pub FLEXSPIB_DATA2_SELECT_INPUT: RWRegister<u32>, pub FLEXSPIB_DATA3_SELECT_INPUT: RWRegister<u32>, pub FLEXSPIA_SCK_SELECT_INPUT: RWRegister<u32>, pub LPI2C1_SCL_SELECT_INPUT: RWRegister<u32>, pub LPI2C1_SDA_SELECT_INPUT: RWRegister<u32>, pub LPI2C2_SCL_SELECT_INPUT: RWRegister<u32>, pub LPI2C2_SDA_SELECT_INPUT: RWRegister<u32>, pub LPI2C3_SCL_SELECT_INPUT: RWRegister<u32>, pub LPI2C3_SDA_SELECT_INPUT: RWRegister<u32>, pub LPI2C4_SCL_SELECT_INPUT: RWRegister<u32>, pub LPI2C4_SDA_SELECT_INPUT: RWRegister<u32>, pub LPSPI1_PCS0_SELECT_INPUT: RWRegister<u32>, pub LPSPI1_SCK_SELECT_INPUT: RWRegister<u32>, pub LPSPI1_SDI_SELECT_INPUT: RWRegister<u32>, pub LPSPI1_SDO_SELECT_INPUT: RWRegister<u32>, pub LPSPI2_PCS0_SELECT_INPUT: RWRegister<u32>, pub LPSPI2_SCK_SELECT_INPUT: RWRegister<u32>, pub LPSPI2_SDI_SELECT_INPUT: RWRegister<u32>, pub LPSPI2_SDO_SELECT_INPUT: RWRegister<u32>, pub LPSPI3_PCS0_SELECT_INPUT: RWRegister<u32>, pub LPSPI3_SCK_SELECT_INPUT: RWRegister<u32>, pub LPSPI3_SDI_SELECT_INPUT: RWRegister<u32>, pub LPSPI3_SDO_SELECT_INPUT: RWRegister<u32>, pub LPSPI4_PCS0_SELECT_INPUT: RWRegister<u32>, pub LPSPI4_SCK_SELECT_INPUT: RWRegister<u32>, pub LPSPI4_SDI_SELECT_INPUT: RWRegister<u32>, pub LPSPI4_SDO_SELECT_INPUT: RWRegister<u32>, pub LPUART2_RX_SELECT_INPUT: RWRegister<u32>, pub LPUART2_TX_SELECT_INPUT: RWRegister<u32>, pub LPUART3_CTS_B_SELECT_INPUT: RWRegister<u32>, pub LPUART3_RX_SELECT_INPUT: RWRegister<u32>, pub LPUART3_TX_SELECT_INPUT: RWRegister<u32>, pub LPUART4_RX_SELECT_INPUT: RWRegister<u32>, pub LPUART4_TX_SELECT_INPUT: RWRegister<u32>, pub LPUART5_RX_SELECT_INPUT: RWRegister<u32>, pub LPUART5_TX_SELECT_INPUT: RWRegister<u32>, pub LPUART6_RX_SELECT_INPUT: RWRegister<u32>, pub LPUART6_TX_SELECT_INPUT: RWRegister<u32>, pub LPUART7_RX_SELECT_INPUT: RWRegister<u32>, pub LPUART7_TX_SELECT_INPUT: RWRegister<u32>, pub LPUART8_RX_SELECT_INPUT: RWRegister<u32>, pub LPUART8_TX_SELECT_INPUT: RWRegister<u32>, pub NMI_SELECT_INPUT: RWRegister<u32>, pub QTIMER2_TIMER0_SELECT_INPUT: RWRegister<u32>, pub QTIMER2_TIMER1_SELECT_INPUT: RWRegister<u32>, pub QTIMER2_TIMER2_SELECT_INPUT: RWRegister<u32>, pub QTIMER2_TIMER3_SELECT_INPUT: RWRegister<u32>, pub QTIMER3_TIMER0_SELECT_INPUT: RWRegister<u32>, pub QTIMER3_TIMER1_SELECT_INPUT: RWRegister<u32>, pub QTIMER3_TIMER2_SELECT_INPUT: RWRegister<u32>, pub QTIMER3_TIMER3_SELECT_INPUT: RWRegister<u32>, pub SAI1_MCLK2_SELECT_INPUT: RWRegister<u32>, pub SAI1_RX_BCLK_SELECT_INPUT: RWRegister<u32>, pub SAI1_RX_DATA0_SELECT_INPUT: RWRegister<u32>, pub SAI1_RX_DATA1_SELECT_INPUT: RWRegister<u32>, pub SAI1_RX_DATA2_SELECT_INPUT: RWRegister<u32>, pub SAI1_RX_DATA3_SELECT_INPUT: RWRegister<u32>, pub SAI1_RX_SYNC_SELECT_INPUT: RWRegister<u32>, pub SAI1_TX_BCLK_SELECT_INPUT: RWRegister<u32>, pub SAI1_TX_SYNC_SELECT_INPUT: RWRegister<u32>, pub SAI2_MCLK2_SELECT_INPUT: RWRegister<u32>, pub SAI2_RX_BCLK_SELECT_INPUT: RWRegister<u32>, pub SAI2_RX_DATA0_SELECT_INPUT: RWRegister<u32>, pub SAI2_RX_SYNC_SELECT_INPUT: RWRegister<u32>, pub SAI2_TX_BCLK_SELECT_INPUT: RWRegister<u32>, pub SAI2_TX_SYNC_SELECT_INPUT: RWRegister<u32>, pub SPDIF_IN_SELECT_INPUT: RWRegister<u32>, pub USB_OTG2_OC_SELECT_INPUT: RWRegister<u32>, pub USB_OTG1_OC_SELECT_INPUT: RWRegister<u32>, pub USDHC1_CD_B_SELECT_INPUT: RWRegister<u32>, pub USDHC1_WP_SELECT_INPUT: RWRegister<u32>, pub USDHC2_CLK_SELECT_INPUT: RWRegister<u32>, pub USDHC2_CD_B_SELECT_INPUT: RWRegister<u32>, pub USDHC2_CMD_SELECT_INPUT: RWRegister<u32>, pub USDHC2_DATA0_SELECT_INPUT: RWRegister<u32>, pub USDHC2_DATA1_SELECT_INPUT: RWRegister<u32>, pub USDHC2_DATA2_SELECT_INPUT: RWRegister<u32>, pub USDHC2_DATA3_SELECT_INPUT: RWRegister<u32>, pub USDHC2_DATA4_SELECT_INPUT: RWRegister<u32>, pub USDHC2_DATA5_SELECT_INPUT: RWRegister<u32>, pub USDHC2_DATA6_SELECT_INPUT: RWRegister<u32>, pub USDHC2_DATA7_SELECT_INPUT: RWRegister<u32>, pub USDHC2_WP_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN02_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN03_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN04_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN05_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN06_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN07_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN08_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN09_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN17_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN18_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN20_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN22_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN23_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN24_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN14_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN15_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN16_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN25_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN19_SELECT_INPUT: RWRegister<u32>, pub XBAR1_IN21_SELECT_INPUT: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_00: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_01: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_02: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_03: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_04: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_05: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_06: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_07: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_08: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_09: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_10: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_11: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_12: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B0_13: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B1_00: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B1_01: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B1_02: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B1_03: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B1_04: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B1_05: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B1_06: RWRegister<u32>, pub SW_MUX_CTL_PAD_GPIO_SPI_B1_07: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_00: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_01: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_02: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_03: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_04: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_05: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_06: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_07: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_08: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_09: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_10: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_11: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_12: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B0_13: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B1_00: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B1_01: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B1_02: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B1_03: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B1_04: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B1_05: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B1_06: RWRegister<u32>, pub SW_PAD_CTL_PAD_GPIO_SPI_B1_07: RWRegister<u32>, pub ENET2_IPG_CLK_RMII_SELECT_INPUT: RWRegister<u32>, pub ENET2_IPP_IND_MAC0_MDIO_SELECT_INPUT: RWRegister<u32>, pub ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_0: RWRegister<u32>, pub ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_1: RWRegister<u32>, pub ENET2_IPP_IND_MAC0_RXEN_SELECT_INPUT: RWRegister<u32>, pub ENET2_IPP_IND_MAC0_RXERR_SELECT_INPUT: RWRegister<u32>, pub ENET2_IPP_IND_MAC0_TIMER_SELECT_INPUT_0: RWRegister<u32>, pub ENET2_IPP_IND_MAC0_TXCLK_SELECT_INPUT: RWRegister<u32>, pub FLEXSPI2_IPP_IND_DQS_FA_SELECT_INPUT: RWRegister<u32>, pub FLEXSPI2_IPP_IND_IO_FA_BIT0_SELECT_INPUT: RWRegister<u32>, pub FLEXSPI2_IPP_IND_IO_FA_BIT1_SELECT_INPUT: RWRegister<u32>, pub FLEXSPI2_IPP_IND_IO_FA_BIT2_SELECT_INPUT: RWRegister<u32>, pub FLEXSPI2_IPP_IND_IO_FA_BIT3_SELECT_INPUT: RWRegister<u32>, pub FLEXSPI2_IPP_IND_IO_FB_BIT0_SELECT_INPUT: RWRegister<u32>, pub FLEXSPI2_IPP_IND_IO_FB_BIT1_SELECT_INPUT: RWRegister<u32>, pub FLEXSPI2_IPP_IND_IO_FB_BIT2_SELECT_INPUT: RWRegister<u32>, pub FLEXSPI2_IPP_IND_IO_FB_BIT3_SELECT_INPUT: RWRegister<u32>, pub FLEXSPI2_IPP_IND_SCK_FA_SELECT_INPUT: RWRegister<u32>, pub FLEXSPI2_IPP_IND_SCK_FB_SELECT_INPUT: RWRegister<u32>, pub GPT1_IPP_IND_CAPIN1_SELECT_INPUT: RWRegister<u32>, pub GPT1_IPP_IND_CAPIN2_SELECT_INPUT: RWRegister<u32>, pub GPT1_IPP_IND_CLKIN_SELECT_INPUT: RWRegister<u32>, pub GPT2_IPP_IND_CAPIN1_SELECT_INPUT: RWRegister<u32>, pub GPT2_IPP_IND_CAPIN2_SELECT_INPUT: RWRegister<u32>, pub GPT2_IPP_IND_CLKIN_SELECT_INPUT: RWRegister<u32>, pub SAI3_IPG_CLK_SAI_MCLK_SELECT_INPUT_2: RWRegister<u32>, pub SAI3_IPP_IND_SAI_RXBCLK_SELECT_INPUT: RWRegister<u32>, pub SAI3_IPP_IND_SAI_RXDATA_SELECT_INPUT_0: RWRegister<u32>, pub SAI3_IPP_IND_SAI_RXSYNC_SELECT_INPUT: RWRegister<u32>, pub SAI3_IPP_IND_SAI_TXBCLK_SELECT_INPUT: RWRegister<u32>, pub SAI3_IPP_IND_SAI_TXSYNC_SELECT_INPUT: RWRegister<u32>, pub SEMC_I_IPP_IND_DQS4_SELECT_INPUT: RWRegister<u32>, pub CANFD_IPP_IND_CANRX_SELECT_INPUT: RWRegister<u32>, /* private fields */
}
Expand description

IOMUXC

Fields§

§SW_MUX_CTL_PAD_GPIO_EMC_00: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_00 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_01: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_01 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_02: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_02 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_03: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_03 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_04: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_04 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_05: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_05 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_06: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_06 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_07: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_07 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_08: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_08 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_09: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_09 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_10: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_10 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_11: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_11 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_12: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_12 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_13: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_13 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_14: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_14 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_15: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_15 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_16: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_16 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_17: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_17 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_18: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_18 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_19: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_19 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_20: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_20 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_21: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_21 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_22: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_22 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_23: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_23 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_24: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_24 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_25: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_25 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_26: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_26 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_27: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_27 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_28: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_28 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_29: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_29 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_30: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_30 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_31: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_31 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_32: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_32 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_33: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_33 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_34: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_34 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_35: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_35 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_36: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_36 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_37: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_37 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_38: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_38 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_39: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_39 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_40: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_40 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_EMC_41: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_EMC_41 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_00: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_00 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_01: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_01 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_02: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_02 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_03: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_03 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_04: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_04 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_05: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_05 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_06: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_06 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_07: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_07 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_08: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_08 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_09: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_09 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_10: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_10 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_11: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_11 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_12: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_12 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_13: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_13 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_14: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_14 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B0_15: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B0_15 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_00: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_00 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_01: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_01 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_02: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_02 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_03: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_03 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_04: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_04 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_05: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_05 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_06: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_06 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_07: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_07 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_08: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_08 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_09: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_09 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_10: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_10 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_11: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_11 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_12: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_12 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_13: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_13 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_14: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_14 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_AD_B1_15: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_AD_B1_15 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_00: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_00 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_01: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_01 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_02: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_02 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_03: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_03 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_04: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_04 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_05: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_05 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_06: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_06 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_07: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_07 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_08: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_08 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_09: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_09 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_10: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_10 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_11: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_11 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_12: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_12 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_13: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_13 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_14: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_14 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B0_15: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B0_15 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_00: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_00 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_01: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_01 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_02: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_02 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_03: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_03 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_04: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_04 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_05: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_05 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_06: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_06 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_07: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_07 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_08: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_08 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_09: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_09 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_10: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_10 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_11: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_11 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_12: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_12 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_13: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_13 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_14: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_14 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_B1_15: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_B1_15 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B0_00: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B0_00 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B0_01: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B0_01 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B0_02: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B0_02 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B0_03: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B0_03 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B0_04: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B0_04 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B0_05: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B0_05 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_00: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_00 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_01: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_01 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_02: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_02 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_03: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_03 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_04: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_04 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_05: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_05 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_06: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_06 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_07: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_07 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_08: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_08 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_09: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_09 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_10: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_10 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SD_B1_11: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SD_B1_11 SW MUX Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_00: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_00 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_01: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_01 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_02: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_02 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_03: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_03 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_04: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_04 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_05: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_05 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_06: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_06 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_07: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_07 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_08: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_08 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_09: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_09 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_10: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_10 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_11: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_11 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_12: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_12 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_13: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_13 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_14: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_14 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_15: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_15 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_16: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_16 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_17: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_17 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_18: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_18 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_19: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_19 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_20: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_20 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_21: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_21 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_22: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_22 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_23: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_23 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_24: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_24 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_25: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_25 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_26: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_26 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_27: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_27 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_28: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_28 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_29: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_29 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_30: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_30 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_31: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_31 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_32: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_32 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_33: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_33 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_34: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_34 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_35: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_35 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_36: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_36 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_37: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_37 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_38: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_38 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_39: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_39 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_40: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_40 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_EMC_41: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_EMC_41 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_00: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_00 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_01: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_01 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_02: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_02 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_03: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_03 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_04: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_04 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_05: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_05 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_06: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_06 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_07: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_07 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_08: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_08 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_09: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_09 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_10: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_10 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_11: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_11 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_12: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_12 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_13: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_13 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_14: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_14 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B0_15: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B0_15 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_00: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_00 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_01: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_01 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_02: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_02 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_03: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_03 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_04: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_04 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_05: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_05 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_06: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_06 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_07: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_07 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_08: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_08 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_09: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_09 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_10: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_10 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_11: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_11 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_12: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_12 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_13: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_13 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_14: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_14 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_AD_B1_15: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_AD_B1_15 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_00: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_00 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_01: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_01 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_02: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_02 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_03: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_03 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_04: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_04 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_05: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_05 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_06: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_06 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_07: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_07 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_08: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_08 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_09: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_09 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_10: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_10 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_11: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_11 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_12: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_12 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_13: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_13 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_14: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_14 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B0_15: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B0_15 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_00: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_00 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_01: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_01 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_02: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_02 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_03: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_03 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_04: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_04 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_05: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_05 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_06: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_06 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_07: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_07 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_08: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_08 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_09: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_09 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_10: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_10 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_11: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_11 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_12: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_12 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_13: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_13 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_14: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_14 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_B1_15: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_B1_15 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B0_00: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B0_00 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B0_01: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B0_01 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B0_02: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B0_02 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B0_03: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B0_03 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B0_04: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B0_04 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B0_05: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B0_05 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_00: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_00 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_01: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_01 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_02: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_02 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_03: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_03 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_04: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_04 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_05: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_05 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_06: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_06 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_07: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_07 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_08: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_08 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_09: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_09 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_10: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_10 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SD_B1_11: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SD_B1_11 SW PAD Control Register

§ANATOP_USB_OTG1_ID_SELECT_INPUT: RWRegister<u32>

ANATOP_USB_OTG1_ID_SELECT_INPUT DAISY Register

§ANATOP_USB_OTG2_ID_SELECT_INPUT: RWRegister<u32>

ANATOP_USB_OTG2_ID_SELECT_INPUT DAISY Register

§CCM_PMIC_READY_SELECT_INPUT: RWRegister<u32>

CCM_PMIC_READY_SELECT_INPUT DAISY Register

§CSI_DATA02_SELECT_INPUT: RWRegister<u32>

CSI_DATA02_SELECT_INPUT DAISY Register

§CSI_DATA03_SELECT_INPUT: RWRegister<u32>

CSI_DATA03_SELECT_INPUT DAISY Register

§CSI_DATA04_SELECT_INPUT: RWRegister<u32>

CSI_DATA04_SELECT_INPUT DAISY Register

§CSI_DATA05_SELECT_INPUT: RWRegister<u32>

CSI_DATA05_SELECT_INPUT DAISY Register

§CSI_DATA06_SELECT_INPUT: RWRegister<u32>

CSI_DATA06_SELECT_INPUT DAISY Register

§CSI_DATA07_SELECT_INPUT: RWRegister<u32>

CSI_DATA07_SELECT_INPUT DAISY Register

§CSI_DATA08_SELECT_INPUT: RWRegister<u32>

CSI_DATA08_SELECT_INPUT DAISY Register

§CSI_DATA09_SELECT_INPUT: RWRegister<u32>

CSI_DATA09_SELECT_INPUT DAISY Register

§CSI_HSYNC_SELECT_INPUT: RWRegister<u32>

CSI_HSYNC_SELECT_INPUT DAISY Register

§CSI_PIXCLK_SELECT_INPUT: RWRegister<u32>

CSI_PIXCLK_SELECT_INPUT DAISY Register

§CSI_VSYNC_SELECT_INPUT: RWRegister<u32>

CSI_VSYNC_SELECT_INPUT DAISY Register

§ENET_IPG_CLK_RMII_SELECT_INPUT: RWRegister<u32>

ENET_IPG_CLK_RMII_SELECT_INPUT DAISY Register

§ENET_MDIO_SELECT_INPUT: RWRegister<u32>

ENET_MDIO_SELECT_INPUT DAISY Register

§ENET0_RXDATA_SELECT_INPUT: RWRegister<u32>

ENET0_RXDATA_SELECT_INPUT DAISY Register

§ENET1_RXDATA_SELECT_INPUT: RWRegister<u32>

ENET1_RXDATA_SELECT_INPUT DAISY Register

§ENET_RXEN_SELECT_INPUT: RWRegister<u32>

ENET_RXEN_SELECT_INPUT DAISY Register

§ENET_RXERR_SELECT_INPUT: RWRegister<u32>

ENET_RXERR_SELECT_INPUT DAISY Register

§ENET0_TIMER_SELECT_INPUT: RWRegister<u32>

ENET0_TIMER_SELECT_INPUT DAISY Register

§ENET_TXCLK_SELECT_INPUT: RWRegister<u32>

ENET_TXCLK_SELECT_INPUT DAISY Register

§FLEXCAN1_RX_SELECT_INPUT: RWRegister<u32>

FLEXCAN1_RX_SELECT_INPUT DAISY Register

§FLEXCAN2_RX_SELECT_INPUT: RWRegister<u32>

FLEXCAN2_RX_SELECT_INPUT DAISY Register

§FLEXPWM1_PWMA3_SELECT_INPUT: RWRegister<u32>

FLEXPWM1_PWMA3_SELECT_INPUT DAISY Register

§FLEXPWM1_PWMA0_SELECT_INPUT: RWRegister<u32>

FLEXPWM1_PWMA0_SELECT_INPUT DAISY Register

§FLEXPWM1_PWMA1_SELECT_INPUT: RWRegister<u32>

FLEXPWM1_PWMA1_SELECT_INPUT DAISY Register

§FLEXPWM1_PWMA2_SELECT_INPUT: RWRegister<u32>

FLEXPWM1_PWMA2_SELECT_INPUT DAISY Register

§FLEXPWM1_PWMB3_SELECT_INPUT: RWRegister<u32>

FLEXPWM1_PWMB3_SELECT_INPUT DAISY Register

§FLEXPWM1_PWMB0_SELECT_INPUT: RWRegister<u32>

FLEXPWM1_PWMB0_SELECT_INPUT DAISY Register

§FLEXPWM1_PWMB1_SELECT_INPUT: RWRegister<u32>

FLEXPWM1_PWMB1_SELECT_INPUT DAISY Register

§FLEXPWM1_PWMB2_SELECT_INPUT: RWRegister<u32>

FLEXPWM1_PWMB2_SELECT_INPUT DAISY Register

§FLEXPWM2_PWMA3_SELECT_INPUT: RWRegister<u32>

FLEXPWM2_PWMA3_SELECT_INPUT DAISY Register

§FLEXPWM2_PWMA0_SELECT_INPUT: RWRegister<u32>

FLEXPWM2_PWMA0_SELECT_INPUT DAISY Register

§FLEXPWM2_PWMA1_SELECT_INPUT: RWRegister<u32>

FLEXPWM2_PWMA1_SELECT_INPUT DAISY Register

§FLEXPWM2_PWMA2_SELECT_INPUT: RWRegister<u32>

FLEXPWM2_PWMA2_SELECT_INPUT DAISY Register

§FLEXPWM2_PWMB3_SELECT_INPUT: RWRegister<u32>

FLEXPWM2_PWMB3_SELECT_INPUT DAISY Register

§FLEXPWM2_PWMB0_SELECT_INPUT: RWRegister<u32>

FLEXPWM2_PWMB0_SELECT_INPUT DAISY Register

§FLEXPWM2_PWMB1_SELECT_INPUT: RWRegister<u32>

FLEXPWM2_PWMB1_SELECT_INPUT DAISY Register

§FLEXPWM2_PWMB2_SELECT_INPUT: RWRegister<u32>

FLEXPWM2_PWMB2_SELECT_INPUT DAISY Register

§FLEXPWM4_PWMA0_SELECT_INPUT: RWRegister<u32>

FLEXPWM4_PWMA0_SELECT_INPUT DAISY Register

§FLEXPWM4_PWMA1_SELECT_INPUT: RWRegister<u32>

FLEXPWM4_PWMA1_SELECT_INPUT DAISY Register

§FLEXPWM4_PWMA2_SELECT_INPUT: RWRegister<u32>

FLEXPWM4_PWMA2_SELECT_INPUT DAISY Register

§FLEXPWM4_PWMA3_SELECT_INPUT: RWRegister<u32>

FLEXPWM4_PWMA3_SELECT_INPUT DAISY Register

§FLEXSPIA_DQS_SELECT_INPUT: RWRegister<u32>

FLEXSPIA_DQS_SELECT_INPUT DAISY Register

§FLEXSPIA_DATA0_SELECT_INPUT: RWRegister<u32>

FLEXSPIA_DATA0_SELECT_INPUT DAISY Register

§FLEXSPIA_DATA1_SELECT_INPUT: RWRegister<u32>

FLEXSPIA_DATA1_SELECT_INPUT DAISY Register

§FLEXSPIA_DATA2_SELECT_INPUT: RWRegister<u32>

FLEXSPIA_DATA2_SELECT_INPUT DAISY Register

§FLEXSPIA_DATA3_SELECT_INPUT: RWRegister<u32>

FLEXSPIA_DATA3_SELECT_INPUT DAISY Register

§FLEXSPIB_DATA0_SELECT_INPUT: RWRegister<u32>

FLEXSPIB_DATA0_SELECT_INPUT DAISY Register

§FLEXSPIB_DATA1_SELECT_INPUT: RWRegister<u32>

FLEXSPIB_DATA1_SELECT_INPUT DAISY Register

§FLEXSPIB_DATA2_SELECT_INPUT: RWRegister<u32>

FLEXSPIB_DATA2_SELECT_INPUT DAISY Register

§FLEXSPIB_DATA3_SELECT_INPUT: RWRegister<u32>

FLEXSPIB_DATA3_SELECT_INPUT DAISY Register

§FLEXSPIA_SCK_SELECT_INPUT: RWRegister<u32>

FLEXSPIA_SCK_SELECT_INPUT DAISY Register

§LPI2C1_SCL_SELECT_INPUT: RWRegister<u32>

LPI2C1_SCL_SELECT_INPUT DAISY Register

§LPI2C1_SDA_SELECT_INPUT: RWRegister<u32>

LPI2C1_SDA_SELECT_INPUT DAISY Register

§LPI2C2_SCL_SELECT_INPUT: RWRegister<u32>

LPI2C2_SCL_SELECT_INPUT DAISY Register

§LPI2C2_SDA_SELECT_INPUT: RWRegister<u32>

LPI2C2_SDA_SELECT_INPUT DAISY Register

§LPI2C3_SCL_SELECT_INPUT: RWRegister<u32>

LPI2C3_SCL_SELECT_INPUT DAISY Register

§LPI2C3_SDA_SELECT_INPUT: RWRegister<u32>

LPI2C3_SDA_SELECT_INPUT DAISY Register

§LPI2C4_SCL_SELECT_INPUT: RWRegister<u32>

LPI2C4_SCL_SELECT_INPUT DAISY Register

§LPI2C4_SDA_SELECT_INPUT: RWRegister<u32>

LPI2C4_SDA_SELECT_INPUT DAISY Register

§LPSPI1_PCS0_SELECT_INPUT: RWRegister<u32>

LPSPI1_PCS0_SELECT_INPUT DAISY Register

§LPSPI1_SCK_SELECT_INPUT: RWRegister<u32>

LPSPI1_SCK_SELECT_INPUT DAISY Register

§LPSPI1_SDI_SELECT_INPUT: RWRegister<u32>

LPSPI1_SDI_SELECT_INPUT DAISY Register

§LPSPI1_SDO_SELECT_INPUT: RWRegister<u32>

LPSPI1_SDO_SELECT_INPUT DAISY Register

§LPSPI2_PCS0_SELECT_INPUT: RWRegister<u32>

LPSPI2_PCS0_SELECT_INPUT DAISY Register

§LPSPI2_SCK_SELECT_INPUT: RWRegister<u32>

LPSPI2_SCK_SELECT_INPUT DAISY Register

§LPSPI2_SDI_SELECT_INPUT: RWRegister<u32>

LPSPI2_SDI_SELECT_INPUT DAISY Register

§LPSPI2_SDO_SELECT_INPUT: RWRegister<u32>

LPSPI2_SDO_SELECT_INPUT DAISY Register

§LPSPI3_PCS0_SELECT_INPUT: RWRegister<u32>

LPSPI3_PCS0_SELECT_INPUT DAISY Register

§LPSPI3_SCK_SELECT_INPUT: RWRegister<u32>

LPSPI3_SCK_SELECT_INPUT DAISY Register

§LPSPI3_SDI_SELECT_INPUT: RWRegister<u32>

LPSPI3_SDI_SELECT_INPUT DAISY Register

§LPSPI3_SDO_SELECT_INPUT: RWRegister<u32>

LPSPI3_SDO_SELECT_INPUT DAISY Register

§LPSPI4_PCS0_SELECT_INPUT: RWRegister<u32>

LPSPI4_PCS0_SELECT_INPUT DAISY Register

§LPSPI4_SCK_SELECT_INPUT: RWRegister<u32>

LPSPI4_SCK_SELECT_INPUT DAISY Register

§LPSPI4_SDI_SELECT_INPUT: RWRegister<u32>

LPSPI4_SDI_SELECT_INPUT DAISY Register

§LPSPI4_SDO_SELECT_INPUT: RWRegister<u32>

LPSPI4_SDO_SELECT_INPUT DAISY Register

§LPUART2_RX_SELECT_INPUT: RWRegister<u32>

LPUART2_RX_SELECT_INPUT DAISY Register

§LPUART2_TX_SELECT_INPUT: RWRegister<u32>

LPUART2_TX_SELECT_INPUT DAISY Register

§LPUART3_CTS_B_SELECT_INPUT: RWRegister<u32>

LPUART3_CTS_B_SELECT_INPUT DAISY Register

§LPUART3_RX_SELECT_INPUT: RWRegister<u32>

LPUART3_RX_SELECT_INPUT DAISY Register

§LPUART3_TX_SELECT_INPUT: RWRegister<u32>

LPUART3_TX_SELECT_INPUT DAISY Register

§LPUART4_RX_SELECT_INPUT: RWRegister<u32>

LPUART4_RX_SELECT_INPUT DAISY Register

§LPUART4_TX_SELECT_INPUT: RWRegister<u32>

LPUART4_TX_SELECT_INPUT DAISY Register

§LPUART5_RX_SELECT_INPUT: RWRegister<u32>

LPUART5_RX_SELECT_INPUT DAISY Register

§LPUART5_TX_SELECT_INPUT: RWRegister<u32>

LPUART5_TX_SELECT_INPUT DAISY Register

§LPUART6_RX_SELECT_INPUT: RWRegister<u32>

LPUART6_RX_SELECT_INPUT DAISY Register

§LPUART6_TX_SELECT_INPUT: RWRegister<u32>

LPUART6_TX_SELECT_INPUT DAISY Register

§LPUART7_RX_SELECT_INPUT: RWRegister<u32>

LPUART7_RX_SELECT_INPUT DAISY Register

§LPUART7_TX_SELECT_INPUT: RWRegister<u32>

LPUART7_TX_SELECT_INPUT DAISY Register

§LPUART8_RX_SELECT_INPUT: RWRegister<u32>

LPUART8_RX_SELECT_INPUT DAISY Register

§LPUART8_TX_SELECT_INPUT: RWRegister<u32>

LPUART8_TX_SELECT_INPUT DAISY Register

§NMI_SELECT_INPUT: RWRegister<u32>

NMI_GLUE_NMI_SELECT_INPUT DAISY Register

§QTIMER2_TIMER0_SELECT_INPUT: RWRegister<u32>

QTIMER2_TIMER0_SELECT_INPUT DAISY Register

§QTIMER2_TIMER1_SELECT_INPUT: RWRegister<u32>

QTIMER2_TIMER1_SELECT_INPUT DAISY Register

§QTIMER2_TIMER2_SELECT_INPUT: RWRegister<u32>

QTIMER2_TIMER2_SELECT_INPUT DAISY Register

§QTIMER2_TIMER3_SELECT_INPUT: RWRegister<u32>

QTIMER2_TIMER3_SELECT_INPUT DAISY Register

§QTIMER3_TIMER0_SELECT_INPUT: RWRegister<u32>

QTIMER3_TIMER0_SELECT_INPUT DAISY Register

§QTIMER3_TIMER1_SELECT_INPUT: RWRegister<u32>

QTIMER3_TIMER1_SELECT_INPUT DAISY Register

§QTIMER3_TIMER2_SELECT_INPUT: RWRegister<u32>

QTIMER3_TIMER2_SELECT_INPUT DAISY Register

§QTIMER3_TIMER3_SELECT_INPUT: RWRegister<u32>

QTIMER3_TIMER3_SELECT_INPUT DAISY Register

§SAI1_MCLK2_SELECT_INPUT: RWRegister<u32>

SAI1_MCLK2_SELECT_INPUT DAISY Register

§SAI1_RX_BCLK_SELECT_INPUT: RWRegister<u32>

SAI1_RX_BCLK_SELECT_INPUT DAISY Register

§SAI1_RX_DATA0_SELECT_INPUT: RWRegister<u32>

SAI1_RX_DATA0_SELECT_INPUT DAISY Register

§SAI1_RX_DATA1_SELECT_INPUT: RWRegister<u32>

SAI1_RX_DATA1_SELECT_INPUT DAISY Register

§SAI1_RX_DATA2_SELECT_INPUT: RWRegister<u32>

SAI1_RX_DATA2_SELECT_INPUT DAISY Register

§SAI1_RX_DATA3_SELECT_INPUT: RWRegister<u32>

SAI1_RX_DATA3_SELECT_INPUT DAISY Register

§SAI1_RX_SYNC_SELECT_INPUT: RWRegister<u32>

SAI1_RX_SYNC_SELECT_INPUT DAISY Register

§SAI1_TX_BCLK_SELECT_INPUT: RWRegister<u32>

SAI1_TX_BCLK_SELECT_INPUT DAISY Register

§SAI1_TX_SYNC_SELECT_INPUT: RWRegister<u32>

SAI1_TX_SYNC_SELECT_INPUT DAISY Register

§SAI2_MCLK2_SELECT_INPUT: RWRegister<u32>

SAI2_MCLK2_SELECT_INPUT DAISY Register

§SAI2_RX_BCLK_SELECT_INPUT: RWRegister<u32>

SAI2_RX_BCLK_SELECT_INPUT DAISY Register

§SAI2_RX_DATA0_SELECT_INPUT: RWRegister<u32>

SAI2_RX_DATA0_SELECT_INPUT DAISY Register

§SAI2_RX_SYNC_SELECT_INPUT: RWRegister<u32>

SAI2_RX_SYNC_SELECT_INPUT DAISY Register

§SAI2_TX_BCLK_SELECT_INPUT: RWRegister<u32>

SAI2_TX_BCLK_SELECT_INPUT DAISY Register

§SAI2_TX_SYNC_SELECT_INPUT: RWRegister<u32>

SAI2_TX_SYNC_SELECT_INPUT DAISY Register

§SPDIF_IN_SELECT_INPUT: RWRegister<u32>

SPDIF_IN_SELECT_INPUT DAISY Register

§USB_OTG2_OC_SELECT_INPUT: RWRegister<u32>

USB_OTG2_OC_SELECT_INPUT DAISY Register

§USB_OTG1_OC_SELECT_INPUT: RWRegister<u32>

USB_OTG1_OC_SELECT_INPUT DAISY Register

§USDHC1_CD_B_SELECT_INPUT: RWRegister<u32>

USDHC1_CD_B_SELECT_INPUT DAISY Register

§USDHC1_WP_SELECT_INPUT: RWRegister<u32>

USDHC1_WP_SELECT_INPUT DAISY Register

§USDHC2_CLK_SELECT_INPUT: RWRegister<u32>

USDHC2_CLK_SELECT_INPUT DAISY Register

§USDHC2_CD_B_SELECT_INPUT: RWRegister<u32>

USDHC2_CD_B_SELECT_INPUT DAISY Register

§USDHC2_CMD_SELECT_INPUT: RWRegister<u32>

USDHC2_CMD_SELECT_INPUT DAISY Register

§USDHC2_DATA0_SELECT_INPUT: RWRegister<u32>

USDHC2_DATA0_SELECT_INPUT DAISY Register

§USDHC2_DATA1_SELECT_INPUT: RWRegister<u32>

USDHC2_DATA1_SELECT_INPUT DAISY Register

§USDHC2_DATA2_SELECT_INPUT: RWRegister<u32>

USDHC2_DATA2_SELECT_INPUT DAISY Register

§USDHC2_DATA3_SELECT_INPUT: RWRegister<u32>

USDHC2_DATA3_SELECT_INPUT DAISY Register

§USDHC2_DATA4_SELECT_INPUT: RWRegister<u32>

USDHC2_DATA4_SELECT_INPUT DAISY Register

§USDHC2_DATA5_SELECT_INPUT: RWRegister<u32>

USDHC2_DATA5_SELECT_INPUT DAISY Register

§USDHC2_DATA6_SELECT_INPUT: RWRegister<u32>

USDHC2_DATA6_SELECT_INPUT DAISY Register

§USDHC2_DATA7_SELECT_INPUT: RWRegister<u32>

USDHC2_DATA7_SELECT_INPUT DAISY Register

§USDHC2_WP_SELECT_INPUT: RWRegister<u32>

USDHC2_WP_SELECT_INPUT DAISY Register

§XBAR1_IN02_SELECT_INPUT: RWRegister<u32>

XBAR1_IN02_SELECT_INPUT DAISY Register

§XBAR1_IN03_SELECT_INPUT: RWRegister<u32>

XBAR1_IN03_SELECT_INPUT DAISY Register

§XBAR1_IN04_SELECT_INPUT: RWRegister<u32>

XBAR1_IN04_SELECT_INPUT DAISY Register

§XBAR1_IN05_SELECT_INPUT: RWRegister<u32>

XBAR1_IN05_SELECT_INPUT DAISY Register

§XBAR1_IN06_SELECT_INPUT: RWRegister<u32>

XBAR1_IN06_SELECT_INPUT DAISY Register

§XBAR1_IN07_SELECT_INPUT: RWRegister<u32>

XBAR1_IN07_SELECT_INPUT DAISY Register

§XBAR1_IN08_SELECT_INPUT: RWRegister<u32>

XBAR1_IN08_SELECT_INPUT DAISY Register

§XBAR1_IN09_SELECT_INPUT: RWRegister<u32>

XBAR1_IN09_SELECT_INPUT DAISY Register

§XBAR1_IN17_SELECT_INPUT: RWRegister<u32>

XBAR1_IN17_SELECT_INPUT DAISY Register

§XBAR1_IN18_SELECT_INPUT: RWRegister<u32>

XBAR1_IN18_SELECT_INPUT DAISY Register

§XBAR1_IN20_SELECT_INPUT: RWRegister<u32>

XBAR1_IN20_SELECT_INPUT DAISY Register

§XBAR1_IN22_SELECT_INPUT: RWRegister<u32>

XBAR1_IN22_SELECT_INPUT DAISY Register

§XBAR1_IN23_SELECT_INPUT: RWRegister<u32>

XBAR1_IN23_SELECT_INPUT DAISY Register

§XBAR1_IN24_SELECT_INPUT: RWRegister<u32>

XBAR1_IN24_SELECT_INPUT DAISY Register

§XBAR1_IN14_SELECT_INPUT: RWRegister<u32>

XBAR1_IN14_SELECT_INPUT DAISY Register

§XBAR1_IN15_SELECT_INPUT: RWRegister<u32>

XBAR1_IN15_SELECT_INPUT DAISY Register

§XBAR1_IN16_SELECT_INPUT: RWRegister<u32>

XBAR1_IN16_SELECT_INPUT DAISY Register

§XBAR1_IN25_SELECT_INPUT: RWRegister<u32>

XBAR1_IN25_SELECT_INPUT DAISY Register

§XBAR1_IN19_SELECT_INPUT: RWRegister<u32>

XBAR1_IN19_SELECT_INPUT DAISY Register

§XBAR1_IN21_SELECT_INPUT: RWRegister<u32>

XBAR1_IN23_SELECT_INPUT DAISY Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_00: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_00 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_01: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_01 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_02: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_02 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_03: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_03 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_04: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_04 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_05: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_05 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_06: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_06 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_07: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_07 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_08: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_08 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_09: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_09 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_10: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_10 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_11: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_11 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_12: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_12 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B0_13: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B0_13 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B1_00: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B1_00 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B1_01: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B1_01 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B1_02: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B1_02 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B1_03: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B1_03 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B1_04: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B1_04 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B1_05: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B1_05 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B1_06: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B1_06 SW MUX Control Register

§SW_MUX_CTL_PAD_GPIO_SPI_B1_07: RWRegister<u32>

SW_MUX_CTL_PAD_GPIO_SPI_B1_07 SW MUX Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_00: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_00 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_01: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_01 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_02: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_02 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_03: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_03 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_04: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_04 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_05: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_05 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_06: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_06 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_07: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_07 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_08: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_08 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_09: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_09 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_10: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_10 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_11: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_11 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_12: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_12 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B0_13: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B0_13 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B1_00: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B1_00 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B1_01: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B1_01 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B1_02: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B1_02 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B1_03: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B1_03 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B1_04: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B1_04 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B1_05: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B1_05 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B1_06: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B1_06 SW PAD Control Register

§SW_PAD_CTL_PAD_GPIO_SPI_B1_07: RWRegister<u32>

SW_PAD_CTL_PAD_GPIO_SPI_B1_07 SW PAD Control Register

§ENET2_IPG_CLK_RMII_SELECT_INPUT: RWRegister<u32>

ENET2_IPG_CLK_RMII_SELECT_INPUT DAISY Register

§ENET2_IPP_IND_MAC0_MDIO_SELECT_INPUT: RWRegister<u32>

ENET2_IPP_IND_MAC0_MDIO_SELECT_INPUT DAISY Register

§ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_0: RWRegister<u32>

ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_0 DAISY Register

§ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_1: RWRegister<u32>

ENET2_IPP_IND_MAC0_RXDATA_SELECT_INPUT_1 DAISY Register

§ENET2_IPP_IND_MAC0_RXEN_SELECT_INPUT: RWRegister<u32>

ENET2_IPP_IND_MAC0_RXEN_SELECT_INPUT DAISY Register

§ENET2_IPP_IND_MAC0_RXERR_SELECT_INPUT: RWRegister<u32>

ENET2_IPP_IND_MAC0_RXERR_SELECT_INPUT DAISY Register

§ENET2_IPP_IND_MAC0_TIMER_SELECT_INPUT_0: RWRegister<u32>

ENET2_IPP_IND_MAC0_TIMER_SELECT_INPUT_0 DAISY Register

§ENET2_IPP_IND_MAC0_TXCLK_SELECT_INPUT: RWRegister<u32>

ENET2_IPP_IND_MAC0_TXCLK_SELECT_INPUT DAISY Register

§FLEXSPI2_IPP_IND_DQS_FA_SELECT_INPUT: RWRegister<u32>

FLEXSPI2_IPP_IND_DQS_FA_SELECT_INPUT DAISY Register

§FLEXSPI2_IPP_IND_IO_FA_BIT0_SELECT_INPUT: RWRegister<u32>

FLEXSPI2_IPP_IND_IO_FA_BIT0_SELECT_INPUT DAISY Register

§FLEXSPI2_IPP_IND_IO_FA_BIT1_SELECT_INPUT: RWRegister<u32>

FLEXSPI2_IPP_IND_IO_FA_BIT1_SELECT_INPUT DAISY Register

§FLEXSPI2_IPP_IND_IO_FA_BIT2_SELECT_INPUT: RWRegister<u32>

FLEXSPI2_IPP_IND_IO_FA_BIT2_SELECT_INPUT DAISY Register

§FLEXSPI2_IPP_IND_IO_FA_BIT3_SELECT_INPUT: RWRegister<u32>

FLEXSPI2_IPP_IND_IO_FA_BIT3_SELECT_INPUT DAISY Register

§FLEXSPI2_IPP_IND_IO_FB_BIT0_SELECT_INPUT: RWRegister<u32>

FLEXSPI2_IPP_IND_IO_FB_BIT0_SELECT_INPUT DAISY Register

§FLEXSPI2_IPP_IND_IO_FB_BIT1_SELECT_INPUT: RWRegister<u32>

FLEXSPI2_IPP_IND_IO_FB_BIT1_SELECT_INPUT DAISY Register

§FLEXSPI2_IPP_IND_IO_FB_BIT2_SELECT_INPUT: RWRegister<u32>

FLEXSPI2_IPP_IND_IO_FB_BIT2_SELECT_INPUT DAISY Register

§FLEXSPI2_IPP_IND_IO_FB_BIT3_SELECT_INPUT: RWRegister<u32>

FLEXSPI2_IPP_IND_IO_FB_BIT3_SELECT_INPUT DAISY Register

§FLEXSPI2_IPP_IND_SCK_FA_SELECT_INPUT: RWRegister<u32>

FLEXSPI2_IPP_IND_SCK_FA_SELECT_INPUT DAISY Register

§FLEXSPI2_IPP_IND_SCK_FB_SELECT_INPUT: RWRegister<u32>

FLEXSPI2_IPP_IND_SCK_FB_SELECT_INPUT DAISY Register

§GPT1_IPP_IND_CAPIN1_SELECT_INPUT: RWRegister<u32>

GPT1_IPP_IND_CAPIN1_SELECT_INPUT DAISY Register

§GPT1_IPP_IND_CAPIN2_SELECT_INPUT: RWRegister<u32>

GPT1_IPP_IND_CAPIN2_SELECT_INPUT DAISY Register

§GPT1_IPP_IND_CLKIN_SELECT_INPUT: RWRegister<u32>

GPT1_IPP_IND_CLKIN_SELECT_INPUT DAISY Register

§GPT2_IPP_IND_CAPIN1_SELECT_INPUT: RWRegister<u32>

GPT2_IPP_IND_CAPIN1_SELECT_INPUT DAISY Register

§GPT2_IPP_IND_CAPIN2_SELECT_INPUT: RWRegister<u32>

GPT2_IPP_IND_CAPIN2_SELECT_INPUT DAISY Register

§GPT2_IPP_IND_CLKIN_SELECT_INPUT: RWRegister<u32>

GPT2_IPP_IND_CLKIN_SELECT_INPUT DAISY Register

§SAI3_IPG_CLK_SAI_MCLK_SELECT_INPUT_2: RWRegister<u32>

SAI3_IPG_CLK_SAI_MCLK_SELECT_INPUT_2 DAISY Register

§SAI3_IPP_IND_SAI_RXBCLK_SELECT_INPUT: RWRegister<u32>

SAI3_IPP_IND_SAI_RXBCLK_SELECT_INPUT DAISY Register

§SAI3_IPP_IND_SAI_RXDATA_SELECT_INPUT_0: RWRegister<u32>

SAI3_IPP_IND_SAI_RXDATA_SELECT_INPUT_0 DAISY Register

§SAI3_IPP_IND_SAI_RXSYNC_SELECT_INPUT: RWRegister<u32>

SAI3_IPP_IND_SAI_RXSYNC_SELECT_INPUT DAISY Register

§SAI3_IPP_IND_SAI_TXBCLK_SELECT_INPUT: RWRegister<u32>

SAI3_IPP_IND_SAI_TXBCLK_SELECT_INPUT DAISY Register

§SAI3_IPP_IND_SAI_TXSYNC_SELECT_INPUT: RWRegister<u32>

SAI3_IPP_IND_SAI_TXSYNC_SELECT_INPUT DAISY Register

§SEMC_I_IPP_IND_DQS4_SELECT_INPUT: RWRegister<u32>

SEMC_I_IPP_IND_DQS4_SELECT_INPUT DAISY Register

§CANFD_IPP_IND_CANRX_SELECT_INPUT: RWRegister<u32>

CANFD_IPP_IND_CANRX_SELECT_INPUT DAISY Register

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