Struct imxrt_ral::flexio::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {

    pub VERID: RORegister<u32>,
    pub PARAM: RORegister<u32>,
    pub CTRL: RWRegister<u32>,
    pub PIN: RORegister<u32>,
    pub SHIFTSTAT: RWRegister<u32>,
    pub SHIFTERR: RWRegister<u32>,
    pub TIMSTAT: RWRegister<u32>,
    pub SHIFTSIEN: RWRegister<u32>,
    pub SHIFTEIEN: RWRegister<u32>,
    pub TIMIEN: RWRegister<u32>,
    pub SHIFTSDEN: RWRegister<u32>,
    pub SHIFTSTATE: RWRegister<u32>,
    pub SHIFTCTL: [RWRegister<u32>; 8],
    pub SHIFTCFG: [RWRegister<u32>; 8],
    pub SHIFTBUF: [RWRegister<u32>; 8],
    pub SHIFTBUFBIS: [RWRegister<u32>; 8],
    pub SHIFTBUFBYS: [RWRegister<u32>; 8],
    pub SHIFTBUFBBS: [RWRegister<u32>; 8],
    pub TIMCTL: [RWRegister<u32>; 8],
    pub TIMCFG: [RWRegister<u32>; 8],
    pub TIMCMP: [RWRegister<u32>; 8],
    pub SHIFTBUFNBS: [RWRegister<u32>; 8],
    pub SHIFTBUFHWS: [RWRegister<u32>; 8],
    pub SHIFTBUFNIS: [RWRegister<u32>; 8],
    /* private fields */
}

FLEXIO

Fields

VERID: RORegister<u32>

Version ID Register

PARAM: RORegister<u32>

Parameter Register

CTRL: RWRegister<u32>

FlexIO Control Register

PIN: RORegister<u32>

Pin State Register

SHIFTSTAT: RWRegister<u32>

Shifter Status Register

SHIFTERR: RWRegister<u32>

Shifter Error Register

TIMSTAT: RWRegister<u32>

Timer Status Register

SHIFTSIEN: RWRegister<u32>

Shifter Status Interrupt Enable

SHIFTEIEN: RWRegister<u32>

Shifter Error Interrupt Enable

TIMIEN: RWRegister<u32>

Timer Interrupt Enable Register

SHIFTSDEN: RWRegister<u32>

Shifter Status DMA Enable

SHIFTSTATE: RWRegister<u32>

Shifter State Register

SHIFTCTL: [RWRegister<u32>; 8]

Shifter Control N Register

SHIFTCFG: [RWRegister<u32>; 8]

Shifter Configuration N Register

SHIFTBUF: [RWRegister<u32>; 8]

Shifter Buffer N Register

SHIFTBUFBIS: [RWRegister<u32>; 8]

Shifter Buffer N Bit Swapped Register

SHIFTBUFBYS: [RWRegister<u32>; 8]

Shifter Buffer N Byte Swapped Register

SHIFTBUFBBS: [RWRegister<u32>; 8]

Shifter Buffer N Bit Byte Swapped Register

TIMCTL: [RWRegister<u32>; 8]

Timer Control N Register

TIMCFG: [RWRegister<u32>; 8]

Timer Configuration N Register

TIMCMP: [RWRegister<u32>; 8]

Timer Compare N Register

SHIFTBUFNBS: [RWRegister<u32>; 8]

Shifter Buffer N Nibble Byte Swapped Register

SHIFTBUFHWS: [RWRegister<u32>; 8]

Shifter Buffer N Half Word Swapped Register

SHIFTBUFNIS: [RWRegister<u32>; 8]

Shifter Buffer N Nibble Swapped Register