imxrt_hal/chip/imxrt10xx/ccm/
pre_periph_clk_pll1.rs

1//! Pre-peripheral clock.
2
3use crate::ral::{self, ccm::CCM};
4
5/// Pre-peripheral clock selection.
6#[derive(Debug, Clone, Copy, PartialEq, Eq)]
7#[repr(u32)]
8pub enum Selection {
9    /// PLL2.
10    Pll2 = 0,
11    /// PFD2 of PLL2
12    Pll2Pfd2 = 1,
13    /// PFD0 of PLL2.
14    Pll2Pfd0 = 2,
15    /// PLL1.
16    Pll1 = 3,
17}
18
19/// Set the pre-peripheral clock selection.
20#[inline(always)]
21pub fn set_selection(ccm: &mut CCM, selection: Selection) {
22    ral::modify_reg!(ral::ccm, ccm, CBCMR, PRE_PERIPH_CLK_SEL: selection as u32);
23}
24
25/// Returns the pre-peripheral clock selection.
26#[inline(always)]
27pub fn selection(ccm: &CCM) -> Selection {
28    use Selection::*;
29    match ral::read_reg!(ral::ccm, ccm, CBCMR, PRE_PERIPH_CLK_SEL) {
30        0 => Pll2,
31        1 => Pll2Pfd2,
32        2 => Pll2Pfd0,
33        3 => Pll1,
34        _ => unreachable!(),
35    }
36}