icm426xx/
lib.rs

1#![no_std]
2#![cfg_attr(not(doctest), doc = include_str!(concat!(env!("CARGO_MANIFEST_DIR"), "/README.md")))]
3
4pub mod fifo;
5pub mod ll;
6pub mod ready;
7pub mod register_bank;
8pub mod uninitialized;
9
10// Reexports.
11pub use fifo::{Sample, Timestamp};
12pub use uninitialized::{Config, InterruptMode, InterruptPolarity, OutputDataRate};
13
14#[derive(Debug)]
15pub struct Uninitialized;
16
17/// Indicates that the `ICM42688` instance is ready to be used
18#[derive(Debug)]
19pub struct Ready;
20
21/// Represents all possible errors that can occur in the icm426xx driver.
22#[derive(Debug)]
23#[cfg_attr(feature = "defmt", derive(defmt::Format))]
24pub enum Error<BusError> {
25    /// An error occurred on the underlying communication bus.
26    Bus(BusError),
27
28    /// The 'Who Am I' check failed during initialization.
29    /// This indicates either the wrong device or a communication issue.
30    /// The stored u8 indicates the returned response from the device.
31    WhoAmIMismatch(u8),
32
33    /// The code has been to slow in reading samples out of the FIFO. The
34    /// user is recommended to mitigate by restarting the device if this
35    /// happens.
36    FifoOverflow,
37}
38
39/// Helper trait to convert bus errors into our top-level Error::Bus variant.
40impl<BusError> From<BusError> for Error<BusError> {
41    fn from(error: BusError) -> Self {
42        Error::Bus(error)
43    }
44}
45
46/// ICM42688 top-level driver
47///
48/// Usage:
49///
50/// ```rust,ignore
51/// # use async_std::prelude::*; // Just for the runtime
52/// # use embedded_hal_mock::eh1::spi::{Mock as SpiMock, Transaction as SpiTransaction};
53/// # use embedded_hal_mock::eh1::digital::Mock as PinMock;
54/// # use embedded_hal_mock::eh1::digital::{State as PinState, Transaction as PinTransaction};
55/// # use embedded_hal_mock::eh1::delay::NoopDelay as Delay;
56/// # #[async_std::main]
57/// async fn main() {
58///     let spi = SpiMock::new(&[]);
59///     let mut pin = PinMock::new(&[PinTransaction::set(PinState::High)]);
60///     let spidev =
61///         embedded_hal_bus::spi::ExclusiveDevice::new_no_delay(spi, pin.clone()).unwrap();
62///     let mut icm = icm426xx::ICM42688::new(spidev);
63///     let mut icm = icm.initialize(Delay).await.unwrap();
64///     let mut bank = icm.ll().bank::<{ icm426xx::register_bank::BANK0 }>();
65///
66///     // print WHO_AM_I register
67///     let who_am_i = bank.who_am_i().async_read().await;
68///     loop {
69///         let fifo_count = icm.read_fifo_count().await;
70///         let mut fifo_buffer = [0u32; 128];
71///         let num_read = icm.read_fifo(&mut fifo_buffer).await.unwrap();
72///     }
73/// }
74/// ```
75pub struct ICM42688<SPI, State> {
76    ll: crate::ll::ICM42688<SPI>,
77    _state: State,
78}
icm426xx/lib.rs

icm426xx/
lib.rs
