pub struct DecoderOptions;Expand description
Decoder options
Implementations§
Source§impl DecoderOptions
impl DecoderOptions
Sourcepub const NO_INVALID_CHECK: u32 = 0x0000_0001
pub const NO_INVALID_CHECK: u32 = 0x0000_0001
Disable some checks for invalid encodings of instructions, eg. most instructions can’t use a LOCK prefix so if one is found, they’re decoded as Code::INVALID unless this option is enabled.
Sourcepub const AMD: u32 = 0x0000_0002
pub const AMD: u32 = 0x0000_0002
AMD decoder: allow 16-bit branch/ret instructions in 64-bit mode, no o64 CALL/JMP FAR [mem], o64 LSS/LFS/LGS, UD0 has no modr/m byte, decode LOCK MOV CR. The AMD decoder can still decode Intel instructions.
Sourcepub const FORCE_RESERVED_NOP: u32 = 0x0000_0004
pub const FORCE_RESERVED_NOP: u32 = 0x0000_0004
Decode opcodes 0F0D and 0F18-0F1F as reserved-nop instructions (eg. Code::Reservednop_rm32_r32_0F1D)
Sourcepub const CMPXCHG486A: u32 = 0x0000_0020
pub const CMPXCHG486A: u32 = 0x0000_0020
Decode 0FA6/0FA7 as CMPXCHG
Sourcepub const LOADALL286: u32 = 0x0000_0100
pub const LOADALL286: u32 = 0x0000_0100
Decode 286 STOREALL/LOADALL (0F04 and 0F05)
Sourcepub const LOADALL386: u32 = 0x0000_0200
pub const LOADALL386: u32 = 0x0000_0200
Decode 386 LOADALL
Sourcepub const NO_WBNOINVD: u32 = 0x0000_4000
pub const NO_WBNOINVD: u32 = 0x0000_4000
Don’t decode WBNOINVD, decode WBINVD instead
Sourcepub const NO_MPFX_0FBC: u32 = 0x0001_0000
pub const NO_MPFX_0FBC: u32 = 0x0001_0000
Don’t decode TZCNT, decode BSF instead
Sourcepub const NO_MPFX_0FBD: u32 = 0x0002_0000
pub const NO_MPFX_0FBD: u32 = 0x0002_0000
Don’t decode LZCNT, decode BSR instead
Sourcepub const NO_LAHF_SAHF_64: u32 = 0x0004_0000
pub const NO_LAHF_SAHF_64: u32 = 0x0004_0000
Don’t decode LAHF and SAHF in 64-bit mode
Sourcepub const CYRIX_SMINT_0F7E: u32 = 0x0020_0000
pub const CYRIX_SMINT_0F7E: u32 = 0x0020_0000
Decode Cyrix SMINT 0F7E (Cyrix 6x86 or earlier)